Xilinx asu ecc standalone - #11053

Open

night1rider wants to merge 3 commits into

wolfSSL:masterfrom

night1rider:Xilinx-ASU-ECC-standalone

Commits on Aug 4, 2026

Xilinx Versal Gen2 ASU port: ECC offload
night1rider
committed
a9168c5
Xilinx Versal Gen2 ASU port: flush the ECC sign DMA output before the op and zeroize the request buffer holding key material
night1rider
committed
77c474f
Benchmark: sweep all compiled ECC curves under WOLFSSL_BENCH_ECC_ALL
night1rider
committed
2a34935