Cortex-M: fuse SAME padding into quantized convolutions

[rascani]

Explicit SAME padding adds an int8 pad operation before convolution. Fuse supported zero-filled SAME_UPPER padding into regular and depthwise Cortex-M operators in both layout pipelines. Preserve shared pad outputs and keep the unsupported MVE 1xN case explicit. Include the MLPerf zero-pad expectations with this change.

Run FuseConvPaddingPass after dialect conversion and before scratch sizing. In the explicit-layout pipeline, propagate layouts before canonicalizing singleton permutations into views, which would hide the padding pattern. One cleanup/canonicalization pair suffices.

Validate four-value padding geometry at export time and use the planned output dimensions for trailing padding. Runtime uses the existing argument validation with support for either two or four padding values; it does not recalculate padding geometry.

Targeted Python and M55 FVP tests cover both layouts, shared pad outputs, regular/grouped/depthwise convolution and the unsupported 1xN fallback. Independent review checked the runtime-check removal and the layout ordering.

Authored with AI assistance from Codex.

[rascani]

Stack from ghstack (oldest at bottom):

• Remove unused exported tensor constants after Cortex-M lowering #22862
• -> Cortex-M: fuse SAME padding into quantized convolutions #22861
• Cortex-M: size scratch buffers in a dedicated pass #22860
• Cortex-M: avoid redundant convolution and pooling work #22859

[pytorch-bot]

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