[masarray]

M4-P0C2B — Opt-in three canonical SV frames per existing GPTimer sample tick

Continues #333 and merged P0C1 + P0C2A. Implements a firmware TX preview behind an explicit stopped-only MULTISV SELECT; legacy single-SV mode remains the default and can be restored via DESELECT.

Code

• Consume the already committed immutable 3-record ARM3 V2 roster on the existing authenticated START handshake, validating each profile through the same compiled_profile_adapter capability gate as legacy V1.
• Build 3 independent canonical SV Ethernet packet templates once on START, each with its own actual SCD multicast MAC, APPID, svID, VLAN and confRev.
• Keep one GPTimer/PTP epoch / publisher FreeRTOS task / EMAC TX. One 250us tick sends MU1 canonical + MU2 canonical + MU3 canonical (serialized Ethernet calls), all with the same smpCnt and single existing smpSynch decision.
• Add independent fixed-point sine engine/signal-state snapshot for MU2/MU3 (next P0D will add independently editable live signal banks).
• Invoke M4ThreeSvGridPlanner in the real publisher path to fail closed on common epoch/sample-count mismatch; skip and account for late slots rather than replay old frames.
• Disable per-stream diagnostic broadcast mirror/probes in 3SV mode; apply existing canonical failure tracking and group stop, with no heap allocation in the 4kHz path.
• Document explicit lab-only setup and do not advertise the fully completed stable SV-MULTI3-V1 capability yet.

Not yet complete

No per-MU live SETPOINTS or independent MU START/STOP, no Studio pagination or SCL deploy UX, and no physical board trace to confirm nominal 12k SV fps / phase error / DMA headroom. Scope stays preview. M3.H.3 official stable assets unaffected.

CI: ESP32-P4 firmware compilation, C++ CI, and relevant PTP/Studio checks. Merge only if green.

Optimizations added during review

• Replaced one 16KiB dynamic std::sin table per SvFixedPointSineEngine with a single ~4KiB static read-only quarter-wave Q30 table shared across three engines. A per-engine instance now holds only the phase accumulator, saving ~48KiB instance RAM in triple-stream firmware (plus avoiding repeated boot-time trig).
• Full 4096-position parity regression versus the M3 formula (<=1 Q30 LSB difference).
• Three-frame measured EMAC submit duration (max) and over-250us deadline-count telemetry, recorded and printed at the normal low-rate stats interval, not per packet.
• Runtime does not advertise final certified SV-MULTI3-V1 and is opt-in until per-MU live state+GUI and physical packet capture have been completed.

[chatgpt-codex-connector]

Codex Review Summary

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Review	Status	Commit	Review trigger
📝 Code Review	✅ Completed 2026-10-25T20:36:27.384774Z	3194a18	PR opened

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[chatgpt-codex-connector]

💡 Codex Review

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Reviewed commit: 3194a18c7f

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[chatgpt-codex-connector]

Track persistent TX failures per stream or per complete batch

When one MU repeatedly fails transmission while another succeeds, each successful frame resets the shared failure streak and marks the fault recovered. For example, if MU1/MU2 succeed and MU3 fails on every tick, the streak never exceeds one, so the 400-failure group-stop check never fires despite MU3 remaining unavailable indefinitely. This can occur under sustained TX descriptor pressure and defeats the advertised bounded, fail-closed three-stream behavior. Maintain per-stream failure streaks, or reset a batch-level streak only when all three canonical transmissions succeed.

AGENTS.md reference: AGENTS.md:L80-L84

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