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94265c0
Read BF16 GeLU, SiLU and their derivatives from lookup tables in MXFP…
tdophung Oct 13, 2026
a16ee09
Add an experimental exact dSiLU activation table
tdophung Oct 13, 2026
0bd0b67
[Common] Add a register-tiled MXFP8 activation kernel that reads the …
tdophung Oct 14, 2026
8a2ffd3
[Common] Build the activation tables in TE common on first use
tdophung Oct 14, 2026
44f8d05
[Common] Make the activation tables opt-in and compute them in the ge…
tdophung Oct 15, 2026
cbbb298
[Common] Extend the register-tiled MXFP8 activation kernel to row and…
tdophung Oct 15, 2026
912efc2
[Common] Use the register-tiled MXFP8 kernel without activation tables
tdophung Oct 16, 2026
17488a6
[Common] Fuse dbias into the register-tiled MXFP8 activation kernel
tdophung Oct 15, 2026
ccaa196
[Common] Support amax, noop and E5M2 output in the register-tiled MXF…
tdophung Oct 16, 2026
8dcd3ad
[Common] Take FP16 inputs in the register-tiled MXFP8 kernel for dSiL…
tdophung Oct 16, 2026
5186a43
[Common] Speed up the dbias reduction of the MXFP8 quantize
tdophung Oct 16, 2026
1ff7b62
[Common] Add a register-tiled MXFP8 kernel for SwiGLU and its gradient
tdophung Oct 16, 2026
5d86058
[Common] Take FP32 inputs in the register-tiled MXFP8 activation kernel
tdophung Oct 16, 2026
f5de75a
[Common] Compute both dSwiGLU gradient halves in one pass in the regi…
tdophung Oct 16, 2026
b688e61
[Common] Support E5M2 output in the register-tiled SwiGLU kernel
tdophung Oct 16, 2026
d18f434
[Common] Build the activation tables with fast math in fast-math builds
tdophung Oct 16, 2026
abbea74
Drop NVTE_MXFP8_REGTILE and the regtile-vs-generic tests
tdophung Oct 26, 2026
f36459c
Template the activation tables on the input type
tdophung Oct 26, 2026
67a83ea
[Common] Read the activation tables in the CuTeDSL MXFP8 kernels
tdophung Oct 27, 2026
478a926
[Common] Fuse dbias into the register-resident CuTeDSL MXFP8 kernel
tdophung Oct 27, 2026
e0b2dea
[Common] Reduce amax in the register-resident CuTeDSL MXFP8 kernel
tdophung Oct 27, 2026
03903aa
[Common] Take any row count in the register-resident CuTeDSL MXFP8 ke…
tdophung Oct 27, 2026
6e09bf8
[Common] Use 256-column tiles for derivatives in the CuTeDSL register…
tdophung Oct 27, 2026
a6504b8
[Common] Take column tails in the register-resident CuTeDSL MXFP8 kernel
tdophung Oct 27, 2026
98dfb67
[Common] Take FP16 and FP32 inputs in the CuTeDSL register-resident M…
tdophung Oct 27, 2026
3c96842
[Common] Match the CUDA kernels in CuTeDSL SiLU, dbias order and NaN-…
tdophung Oct 28, 2026
9fb999e
[Common] Drop the CUDA register-tiled activation kernel; keep the gat…
tdophung Oct 28, 2026
47e947f
[pre-commit.ci] auto fixes from pre-commit.com hooks
pre-commit-ci[bot] Oct 28, 2026
8dae805
[Common] Add CuTeDSL gated MXFP8 kernels, including a register-reside…
tdophung Nov 3, 2026
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12 changes: 12 additions & 0 deletions docs/envvars.rst
Original file line number Diff line number Diff line change
Expand Up @@ -353,6 +353,18 @@ Kernel Configuration
:Default: ``0``
:Description: Disable NVRTC (CUDA Runtime Compilation) support. When set to ``1``, runtime kernel compilation is disabled. Existing transpose operations select their static fallback automatically. NVFP4 4over6 quantization, fused softmax, and normalization paths require their corresponding ``NVTE_BUILD_LEGACY_STATIC_NVFP4``, ``NVTE_BUILD_LEGACY_STATIC_FUSED_SOFTMAX``, or ``NVTE_BUILD_LEGACY_STATIC_NORM`` CMake option to have been enabled when the library was built; otherwise no static fallback is available.

.. envvar:: NVTE_ACTIVATION_TABLE

:Type: ``int`` (0 or 1)
:Default: ``0``
:Description: Experimental. When set to ``1``, read GeLU, SiLU and their derivatives from lookup tables when BF16 inputs are quantized to MXFP8. Each table is built on its first use and kept, once per device and process (under 64 KB per device in total), outside the framework's memory allocator. Results match the computed activations, except that GeLU and SiLU of ``-inf`` give ``-0`` instead of NaN, and derivatives of inputs with ``|x| < 2^-12`` (GeLU) or ``|x| < 2^-9`` (SiLU) are within 1 ulp (GeLU) or 2 ulp (SiLU) of the computed ones. When set to ``0``, the activations are computed. Read on every call.

.. envvar:: NVTE_ACTIVATION_TABLE_EXACT_DSILU

:Type: ``int`` (0 or 1)
:Default: ``0``
:Description: Experimental. Choose the SiLU-derivative lookup table (see :envvar:`NVTE_ACTIVATION_TABLE`). By default the 16 KB table covers ``|x| >= 2^-9`` and smaller inputs use the linear term ``0.5 + x/2``, which is within 2 ulp of the computed derivative. When set to ``1``, a 32 KB table covers ``|x| >= 2^-25``, and the derivative matches the computed one for every input. Read once per process, when the table is built.

.. envvar:: NVTE_USE_CUTLASS_GROUPED_GEMM

:Type: ``int`` (0 or 1)
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1 change: 1 addition & 0 deletions tests/cpp/operator/CMakeLists.txt
Original file line number Diff line number Diff line change
Expand Up @@ -12,6 +12,7 @@ add_executable(test_operator
test_cast_mxfp8_gated_swiglu.cu
test_qdq.cu
test_cast_mxfp8.cu
test_cast_mxfp8_act_exact.cu
test_cast_mxfp8_grouped.cu
test_cast_mxfp8_grouped_scaled_swiglu.cu
test_cast_nvfp4_transpose.cu
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