[Common] Look up table based activation calculation in MXFP8 quantization fused kernels by tdophung · Pull Request #3761 · NVIDIA/TransformerEngine

Read BF16 GeLU, SiLU and their derivatives from lookup tables in MXFP8 quantize

tdophung

and

Oleg-Goncharov

committed

94265c0

Add an experimental exact dSiLU activation table

tdophung

committed

a16ee09

[Common] Add a register-tiled MXFP8 activation kernel that reads the tables

tdophung

committed

0bd0b67

[Common] Build the activation tables in TE common on first use

tdophung

committed

8a2ffd3

[Common] Make the activation tables opt-in and compute them in the generic kernel

tdophung

committed

44f8d05

[Common] Extend the register-tiled MXFP8 activation kernel to row and column tails

tdophung

committed

cbbb298

[Common] Use the register-tiled MXFP8 kernel without activation tables

tdophung

committed

912efc2

[Common] Fuse dbias into the register-tiled MXFP8 activation kernel

tdophung

committed

17488a6

[Common] Support amax, noop and E5M2 output in the register-tiled MXFP8 kernel

tdophung

committed

ccaa196

[Common] Take FP16 inputs in the register-tiled MXFP8 kernel for dSiLU and dbias

tdophung

committed

8dcd3ad

[Common] Speed up the dbias reduction of the MXFP8 quantize

tdophung

committed

5186a43

[Common] Add a register-tiled MXFP8 kernel for SwiGLU and its gradient

tdophung

committed

1ff7b62

[Common] Take FP32 inputs in the register-tiled MXFP8 activation kernel

tdophung

committed

5d86058

[Common] Compute both dSwiGLU gradient halves in one pass in the register-tiled kernel

tdophung

committed

f5de75a

[Common] Support E5M2 output in the register-tiled SwiGLU kernel

tdophung

committed

b688e61

[Common] Build the activation tables with fast math in fast-math builds

tdophung

committed

d18f434

Drop NVTE_MXFP8_REGTILE and the regtile-vs-generic tests

tdophung

committed

abbea74

Template the activation tables on the input type

tdophung

committed

f36459c

[Common] Read the activation tables in the CuTeDSL MXFP8 kernels

tdophung

committed

67a83ea

[Common] Fuse dbias into the register-resident CuTeDSL MXFP8 kernel

tdophung

committed

478a926

[Common] Reduce amax in the register-resident CuTeDSL MXFP8 kernel

tdophung

committed

e0b2dea

[Common] Take any row count in the register-resident CuTeDSL MXFP8 kernel

tdophung

committed

03903aa

[Common] Use 256-column tiles for derivatives in the CuTeDSL register kernel

tdophung

committed

6e09bf8

[Common] Take column tails in the register-resident CuTeDSL MXFP8 kernel

tdophung

committed

a6504b8

[Common] Take FP16 and FP32 inputs in the CuTeDSL register-resident MXFP8 kernel

tdophung

committed

98dfb67

[Common] Match the CUDA kernels in CuTeDSL SiLU, dbias order and NaN-block scales

tdophung

committed

3c96842

[Common] Drop the CUDA register-tiled activation kernel; keep the gated one

tdophung

committed

9fb999e

[pre-commit.ci] auto fixes from pre-commit.com hooks

pre-commit-ci[bot]

authored and

tdophung

committed

47e947f

[Common] Add CuTeDSL gated MXFP8 kernels, including a register-resident one

tdophung

and

kainzhong

committed

8dae805

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[Common] Look up table based activation calculation in MXFP8 quantization fused kernels - #3761

[Common] Look up table based activation calculation in MXFP8 quantization fused kernels#3761
tdophung wants to merge 29 commits into
NVIDIA:mainfrom
tdophung:teddy/bf16-activation-lut

Commits on Nov 9, 2026

Read BF16 GeLU, SiLU and their derivatives from lookup tables in MXFP8 quantize

Add an experimental exact dSiLU activation table

[Common] Add a register-tiled MXFP8 activation kernel that reads the tables

[Common] Build the activation tables in TE common on first use

[Common] Make the activation tables opt-in and compute them in the generic kernel

[Common] Extend the register-tiled MXFP8 activation kernel to row and column tails

[Common] Use the register-tiled MXFP8 kernel without activation tables

[Common] Fuse dbias into the register-tiled MXFP8 activation kernel

[Common] Support amax, noop and E5M2 output in the register-tiled MXFP8 kernel

[Common] Take FP16 inputs in the register-tiled MXFP8 kernel for dSiLU and dbias

[Common] Speed up the dbias reduction of the MXFP8 quantize

[Common] Add a register-tiled MXFP8 kernel for SwiGLU and its gradient

[Common] Take FP32 inputs in the register-tiled MXFP8 activation kernel

[Common] Compute both dSwiGLU gradient halves in one pass in the register-tiled kernel

[Common] Support E5M2 output in the register-tiled SwiGLU kernel

[Common] Build the activation tables with fast math in fast-math builds

Drop NVTE_MXFP8_REGTILE and the regtile-vs-generic tests

Template the activation tables on the input type

[Common] Read the activation tables in the CuTeDSL MXFP8 kernels

[Common] Fuse dbias into the register-resident CuTeDSL MXFP8 kernel

[Common] Reduce amax in the register-resident CuTeDSL MXFP8 kernel

[Common] Take any row count in the register-resident CuTeDSL MXFP8 kernel

[Common] Use 256-column tiles for derivatives in the CuTeDSL register kernel

[Common] Take column tails in the register-resident CuTeDSL MXFP8 kernel

[Common] Take FP16 and FP32 inputs in the CuTeDSL register-resident MXFP8 kernel

[Common] Match the CUDA kernels in CuTeDSL SiLU, dbias order and NaN-block scales

[Common] Drop the CUDA register-tiled activation kernel; keep the gated one

[pre-commit.ci] auto fixes from pre-commit.com hooks

[Common] Add CuTeDSL gated MXFP8 kernels, including a register-resident one