tests: drivers: hwspinlock: Add dt_spec test #99165
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1 task
zephyrbot
added
area: Boards/SoCs
area: Tests
nashif
reviewed
Nov 13, 2025
| - devicetree | ||
| integration_platforms: | ||
| - native_sim | ||
| tests: |
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is this something we want to test on every architecture out there? right now, when this run (not in integration mode), it is built and run on every qemu we have:
INFO - Added initial list of jobs to queue
INFO - 1/56 qemu_malta/qemu_malta/be drivers.hwspinlock.dt_spec.no_spinlock_members PASSED (qemu 1.215s <zephyr>)
INFO - 2/56 qemu_xtensa/dc233c/mmu drivers.hwspinlock.dt_spec.no_spinlock_members PASSED (qemu 1.157s <zephyr>)
INFO - 3/56 qemu_riscv32e/qemu_virt_riscv32e drivers.hwspinlock.dt_spec.no_spinlock_members PASSED (qemu 1.159s <zephyr>)
INFO - 4/56 qemu_malta/qemu_malta drivers.hwspinlock.dt_spec.no_spinlock_members PASSED (qemu 1.346s <zephyr>)
INFO - 5/56 qemu_riscv64/qemu_virt_riscv64 drivers.hwspinlock.dt_spec.no_spinlock_members PASSED (qemu 1.066s <zephyr>)
INFO - 6/56 qemu_xtensa/dc233c drivers.hwspinlock.dt_spec.no_spinlock_members PASSED (qemu 1.065s <zephyr>)
INFO - 7/56 qemu_x86/atom drivers.hwspinlock.dt_spec.no_spinlock_members PASSED (qemu 1.437s <zephyr>)
INFO - 8/56 qemu_riscv32/qemu_virt_riscv32/smp drivers.hwspinlock.dt_spec.no_spinlock_members PASSED (qemu 1.078s <zephyr>)
INFO - 9/56 qemu_riscv32/qemu_virt_riscv32 drivers.hwspinlock.dt_spec.no_spinlock_members PASSED (qemu 1.061s <zephyr>)
INFO - 10/56 qemu_xtensa/sample_controller32/mpu drivers.hwspinlock.dt_spec.no_spinlock_members PASSED (qemu 1.058s <zephyr>)
INFO - 11/56 qemu_riscv64/qemu_virt_riscv64/smp drivers.hwspinlock.dt_spec.no_spinlock_members PASSED (qemu 1.067s <zephyr>)
INFO - 12/56 qemu_rx/r5f562n8 drivers.hwspinlock.dt_spec.no_spinlock_members PASSED (qemu 1.025s <zephyr>)
INFO - 13/56 qemu_x86_64/atom drivers.hwspinlock.dt_spec.no_spinlock_members PASSED (qemu 1.353s <zephyr>)
INFO - 14/56 qemu_cortex_a53/qemu_cortex_a53/smp drivers.hwspinlock.dt_spec.no_spinlock_members PASSED (qemu 1.085s <zephyr>)
INFO - 15/56 qemu_cortex_r5/zynqmp_rpu drivers.hwspinlock.dt_spec.no_spinlock_members PASSED (qemu 4.447s <zephyr>)
INFO - 16/56 qemu_cortex_m0/nrf51822 drivers.hwspinlock.dt_spec.no_spinlock_members PASSED (qemu 1.034s <zephyr>)
INFO - 17/56 qemu_cortex_a53/qemu_cortex_a53 drivers.hwspinlock.dt_spec.no_spinlock_members PASSED (qemu 1.039s <zephyr>)
INFO - 18/56 qemu_arc/qemu_arc_em drivers.hwspinlock.dt_spec.no_spinlock_members PASSED (qemu 1.025s <zephyr>)
INFO - 19/56 qemu_arc/qemu_arc_hs drivers.hwspinlock.dt_spec.no_spinlock_members PASSED (qemu 1.040s <zephyr>)
INFO - 20/56 qemu_arc/qemu_arc_hs6x drivers.hwspinlock.dt_spec.no_spinlock_members PASSED (qemu 1.019s <zephyr>)
INFO - 21/56 qemu_arc/qemu_arc_hs5x drivers.hwspinlock.dt_spec.no_spinlock_members PASSED (qemu 1.018s <zephyr>)
INFO - 22/56 qemu_arc/qemu_arc_hs/xip drivers.hwspinlock.dt_spec.no_spinlock_members PASSED (qemu 1.032s <zephyr>)
INFO - 23/56 qemu_leon3/leon3 drivers.hwspinlock.dt_spec.no_spinlock_members PASSED (qemu 1.059s <zephyr>)
INFO - 24/56 qemu_cortex_a9/xc7z007s drivers.hwspinlock.dt_spec.no_spinlock_members PASSED (qemu 1.967s <zephyr>)
INFO - 25/56 mps2/an385 drivers.hwspinlock.dt_spec.no_spinlock_members PASSED (qemu 1.085s <zephyr>)
INFO - 26/56 mps2/an521/cpu0 drivers.hwspinlock.dt_spec.no_spinlock_members PASSED (qemu 1.299s <zephyr>)
INFO - 27/56 native_sim/native drivers.hwspinlock.dt_spec.no_spinlock_members PASSED (native 0.116s <host>)
INFO - 28/56 qemu_rx/r5f562n8 drivers.hwspinlock.dt_spec PASSED (qemu 1.071s <zephyr>)
INFO - 29/56 qemu_malta/qemu_malta/be drivers.hwspinlock.dt_spec PASSED (qemu 1.114s <zephyr>)
INFO - 30/56 qemu_xtensa/dc233c/mmu drivers.hwspinlock.dt_spec PASSED (qemu 1.070s <zephyr>)
INFO - 31/56 qemu_malta/qemu_malta drivers.hwspinlock.dt_spec PASSED (qemu 1.046s <zephyr>)
INFO - 32/56 qemu_arc/qemu_arc_hs/xip drivers.hwspinlock.dt_spec PASSED (qemu 1.120s <zephyr>)
INFO - 33/56 qemu_cortex_r5/zynqmp_rpu drivers.hwspinlock.dt_spec PASSED (qemu 6.167s <zephyr>)
INFO - 34/56 qemu_riscv64/qemu_virt_riscv64/smp drivers.hwspinlock.dt_spec PASSED (qemu 1.043s <zephyr>)
INFO - 35/56 qemu_xtensa/sample_controller32/mpu drivers.hwspinlock.dt_spec PASSED (qemu 1.056s <zephyr>)
INFO - 36/56 qemu_arc/qemu_arc_hs drivers.hwspinlock.dt_spec PASSED (qemu 1.066s <zephyr>)
INFO - 37/56 qemu_xtensa/dc233c drivers.hwspinlock.dt_spec PASSED (qemu 1.059s <zephyr>)
INFO - 38/56 qemu_arc/qemu_arc_hs5x drivers.hwspinlock.dt_spec PASSED (qemu 1.023s <zephyr>)
INFO - 39/56 qemu_riscv64/qemu_virt_riscv64 drivers.hwspinlock.dt_spec PASSED (qemu 1.030s <zephyr>)
INFO - 40/56 qemu_arc/qemu_arc_em drivers.hwspinlock.dt_spec PASSED (qemu 1.022s <zephyr>)
INFO - 41/56 qemu_cortex_a53/qemu_cortex_a53 drivers.hwspinlock.dt_spec PASSED (qemu 1.051s <zephyr>)
INFO - 42/56 m2gl025_miv/miv drivers.hwspinlock.dt_spec.no_spinlock_members PASSED (renode 31.480s <zephyr>)
INFO - 43/56 qemu_cortex_a53/qemu_cortex_a53/smp drivers.hwspinlock.dt_spec PASSED (qemu 1.059s <zephyr>)
INFO - 44/56 qemu_arc/qemu_arc_hs6x drivers.hwspinlock.dt_spec PASSED (qemu 1.018s <zephyr>)
INFO - 45/56 qemu_x86/atom drivers.hwspinlock.dt_spec PASSED (qemu 1.426s <zephyr>)
INFO - 46/56 qemu_x86_64/atom drivers.hwspinlock.dt_spec PASSED (qemu 1.388s <zephyr>)
INFO - 47/56 qemu_riscv32/qemu_virt_riscv32 drivers.hwspinlock.dt_spec PASSED (qemu 1.046s <zephyr>)
INFO - 48/56 qemu_riscv32/qemu_virt_riscv32/smp drivers.hwspinlock.dt_spec PASSED (qemu 1.331s <zephyr>)
INFO - 49/56 qemu_cortex_m0/nrf51822 drivers.hwspinlock.dt_spec PASSED (qemu 1.125s <zephyr>)
INFO - 50/56 native_sim/native drivers.hwspinlock.dt_spec PASSED (native 0.003s <host>)
INFO - 51/56 qemu_riscv32e/qemu_virt_riscv32e drivers.hwspinlock.dt_spec PASSED (qemu 1.071s <zephyr>)
INFO - 52/56 qemu_leon3/leon3 drivers.hwspinlock.dt_spec PASSED (qemu 1.031s <zephyr>)
INFO - 53/56 mps2/an385 drivers.hwspinlock.dt_spec PASSED (qemu 1.019s <zephyr>)
INFO - 54/56 mps2/an521/cpu0 drivers.hwspinlock.dt_spec PASSED (qemu 1.037s <zephyr>)
INFO - 55/56 qemu_cortex_a9/xc7z007s drivers.hwspinlock.dt_spec PASSED (qemu 1.155s <zephyr>)
INFO - 56/56 m2gl025_miv/miv drivers.hwspinlock.dt_spec PASSED (renode 4.831s <zephyr>)
INFO - 2 test scenarios (94 configurations) selected, 38 configurations filtered (38 by static filter, 0 at runtime).
INFO - 56 of 56 executed test configurations passed (100.00%), 0 built (not run), 0 failed, 0 errored, with no warnings in 120.72 seconds.
INFO - 56 of 56 executed test cases passed (100.00%) on 28 out of total 1259 platforms (2.22%).
INFO - 56 test configurations executed on platforms, 0 test configurations were only built.
INFO - Saving reports...
INFO - Writing JSON report /home/nashif/zephyrproject/zephyr/tests/drivers/hwspinlock/dt_spec/twister-out/twister.json
INFO - Writing xunit report /home/nashif/zephyrproject/zephyr/tests/drivers/hwspinlock/dt_spec/twister-out/twister.xml...
INFO - Writing xunit report /home/nashif/zephyrproject/zephyr/tests/drivers/hwspinlock/dt_spec/twister-out/twister_report.xml...
INFO - Run completed
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Good point. Pushed an alternative proposal that extends an existing test instead of adding a new test.
MaureenHelm
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Fixes formatting of the devicetree overlay to make the new DevicetreeLinting compliance check happy. Signed-off-by: Maureen Helm <maureen.helm@analog.com>
Extends the devicetree library test to exercise the hwspinlock dt spec macros and detect the context initializer build warning that was fixed in commit 8b208b0. Previously the build warning wasn't reproducible in-tree. Signed-off-by: Maureen Helm <maureen.helm@analog.com>
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nashif
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Nov 18, 2025
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Adds a hwspinlock driver test to exercise the dt spec macros and detect the context initializer build warning that was fixed in commit 8b208b0. Previously the build warning wasn't reproducible in-tree.