Skip to content

Commit 3a0382e

Browse files
committed
Improving generate naming
- Adding back the cell name statement within inner loop to help with debugging. - Turning if-else into ifs to fix issue with nested genblk statements. These are mutually exclusive, so it's not an issue.
1 parent cd28511 commit 3a0382e

File tree

2 files changed

+42
-28
lines changed

2 files changed

+42
-28
lines changed

lambdalib/padring/rtl/la_iopadring.v

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -237,6 +237,7 @@ module tb();
237237
localparam [7:0] PIN_AN0 = 8'h01;
238238
localparam [7:0] PIN_RXP = 8'h02;
239239
localparam [7:0] PIN_RXN = 8'h03;
240+
240241
localparam NULL = 8'h0;
241242

242243
localparam [40*NPINS-1:0] CELLMAP =

lambdalib/padring/rtl/la_ioside.v

Lines changed: 41 additions & 28 deletions
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
/*****************************************************************************
2-
* Function: Padring Single Side Module
2+
* Function: Padring Side Module
33
* Copyright: Lambda Project Authors. All rights Reserved.
44
* License: MIT (see LICENSE file in Lambda repository)
55
*
@@ -63,8 +63,9 @@ module la_ioside
6363

6464
for (i = 0; i < NCELLS; i = i + 1)
6565
begin : ipad
66+
// LA_BIDIR
6667
if (CELLMAP[(i*40+16)+:8] == LA_BIDIR)
67-
begin : g0
68+
begin : gbidir
6869
la_iobidir #(.SIDE(SIDE),
6970
.PROP(CELLMAP[(i*40+32)+:8]),
7071
.CFGW(CFGW),
@@ -85,8 +86,9 @@ module la_ioside
8586
// ring
8687
.ioring(ioring[CELLMAP[(i*40+24)+:8]*RINGW+:RINGW]));
8788
end
88-
else if (CELLMAP[(i*40+16)+:8] == LA_INPUT)
89-
begin : g0
89+
// LA_INPUT
90+
if (CELLMAP[(i*40+16)+:8] == LA_INPUT)
91+
begin : ginput
9092
la_ioinput #(.SIDE(SIDE),
9193
.PROP(CELLMAP[(i*40+32)+:8]),
9294
.CFGW(CFGW),
@@ -105,8 +107,9 @@ module la_ioside
105107
// ring
106108
.ioring(ioring[CELLMAP[(i*40+24)+:8]*RINGW+:RINGW]));
107109
end
108-
else if (CELLMAP[(i*40+16)+:8] == LA_ANALOG)
109-
begin : g0
110+
// LA_ANALOG
111+
if (CELLMAP[(i*40+16)+:8] == LA_ANALOG)
112+
begin : ganalog
110113
la_ioanalog #(.SIDE(SIDE),
111114
.PROP(CELLMAP[(i*40+32)+:8]),
112115
.RINGW(RINGW))
@@ -122,8 +125,9 @@ module la_ioside
122125
// ring
123126
.ioring(ioring[CELLMAP[(i*40+24)+:8]*RINGW+:RINGW]));
124127
end
125-
else if (CELLMAP[(i*40+16)+:8] == LA_XTAL)
126-
begin : g0
128+
// LA_XTAL
129+
if (CELLMAP[(i*40+16)+:8] == LA_XTAL)
130+
begin : gxtal
127131
la_ioxtal #(.SIDE(SIDE),
128132
.PROP(CELLMAP[(i*40+32)+:8]),
129133
.CFGW(CFGW),
@@ -142,8 +146,9 @@ module la_ioside
142146
// ring
143147
.ioring(ioring[CELLMAP[(i*40+24)+:8]*RINGW+:RINGW]));
144148
end
145-
else if (CELLMAP[(i*40+16)+:8] == LA_RXDIFF)
146-
begin : g0
149+
// LA_RXDIFF
150+
if (CELLMAP[(i*40+16)+:8] == LA_RXDIFF)
151+
begin : grxdiff
147152
la_iorxdiff #(.SIDE(SIDE),
148153
.PROP(CELLMAP[(i*40+32)+:8]),
149154
.CFGW(CFGW),
@@ -164,8 +169,9 @@ module la_ioside
164169
// ring
165170
.ioring(ioring[CELLMAP[(i*40+24)+:8]*RINGW+:RINGW]));
166171
end
167-
else if (CELLMAP[(i*40+16)+:8] == LA_TXDIFF)
168-
begin : g0
172+
// LA_TXDIFF
173+
if (CELLMAP[(i*40+16)+:8] == LA_TXDIFF)
174+
begin : gtxdiff
169175
la_iotxdiff #(.SIDE(SIDE),
170176
.PROP(CELLMAP[(i*40+32)+:8]),
171177
.CFGW(CFGW),
@@ -184,8 +190,9 @@ module la_ioside
184190
.vssio(vssio[CELLMAP[(i*40+24)+:8]]),
185191
.ioring(ioring[CELLMAP[(i*40+24)+:8]*RINGW+:RINGW]));
186192
end
187-
else if (CELLMAP[(i*40+16)+:8] == LA_POC)
188-
begin : g0
193+
// LA_POC
194+
if (CELLMAP[(i*40+16)+:8] == LA_POC)
195+
begin : gpoc
189196
la_iopoc #(.SIDE(SIDE),
190197
.PROP(CELLMAP[(i*40+32)+:8]),
191198
.RINGW(RINGW))
@@ -195,15 +202,16 @@ module la_ioside
195202
.vssio(vssio[CELLMAP[(i*40+24)+:8]]),
196203
.ioring(ioring[CELLMAP[(i*40+24)+:8]*RINGW+:RINGW]));
197204
end
198-
else if (CELLMAP[(i*40+16)+:8] == LA_CUT)
199-
begin : ila_iocut
205+
// LA_CUT
206+
if (CELLMAP[(i*40+16)+:8] == LA_CUT)
207+
begin : icut
200208
la_iocut #(.SIDE (SIDE),
201209
.PROP (CELLMAP[(i*40+32)+:8]),
202210
.RINGW(RINGW))
203211
i0 (.vss(vss));
204212
end
205-
else if (CELLMAP[(i*40+16)+:8] == LA_VDDIO)
206-
begin : g0
213+
if (CELLMAP[(i*40+16)+:8] == LA_VDDIO)
214+
begin : gvddio
207215
la_iovddio #(.SIDE(SIDE),
208216
.PROP(CELLMAP[(i*40+32)+:8]),
209217
.RINGW(RINGW))
@@ -214,8 +222,9 @@ module la_ioside
214222
.vssio(vssio[CELLMAP[(i*40+24)+:8]]),
215223
.ioring(ioring[CELLMAP[(i*40+24)+:8]*RINGW+:RINGW]));
216224
end
217-
else if (CELLMAP[(i*40+16)+:8] == LA_VSSIO)
218-
begin : g0
225+
// LA_VSSIO
226+
if (CELLMAP[(i*40+16)+:8] == LA_VSSIO)
227+
begin : gvssio
219228
la_iovssio #(.SIDE(SIDE),
220229
.PROP(CELLMAP[(i*40+32)+:8]),
221230
.RINGW(RINGW))
@@ -225,8 +234,9 @@ module la_ioside
225234
.vssio(vssio[CELLMAP[(i*40+24)+:8]]),
226235
.ioring(ioring[CELLMAP[(i*40+24)+:8]*RINGW+:RINGW]));
227236
end
228-
else if (CELLMAP[(i*40+16)+:8] == LA_VDD)
229-
begin : g0
237+
// LA_VDD
238+
if (CELLMAP[(i*40+16)+:8] == LA_VDD)
239+
begin : gvdd
230240
la_iovdd #(.SIDE(SIDE),
231241
.PROP(CELLMAP[(i*40+32)+:8]),
232242
.RINGW(RINGW))
@@ -236,8 +246,9 @@ module la_ioside
236246
.vssio(vssio[CELLMAP[(i*40+24)+:8]]),
237247
.ioring(ioring[CELLMAP[(i*40+24)+:8]*RINGW+:RINGW]));
238248
end
239-
else if (CELLMAP[(i*40+16)+:8] == LA_VSS)
240-
begin : g0
249+
// LA_VSS
250+
if (CELLMAP[(i*40+16)+:8] == LA_VSS)
251+
begin : gvss
241252
la_iovss #(.SIDE(SIDE),
242253
.PROP(CELLMAP[(i*40+32)+:8]),
243254
.RINGW(RINGW))
@@ -247,8 +258,9 @@ module la_ioside
247258
.vssio(vssio[CELLMAP[(i*40+24)+:8]]),
248259
.ioring(ioring[CELLMAP[(i*40+24)+:8]*RINGW+:RINGW]));
249260
end
250-
else if (CELLMAP[(i*40+16)+:8] == LA_VDDA)
251-
begin : g0
261+
// LA_VDDA
262+
if (CELLMAP[(i*40+16)+:8] == LA_VDDA)
263+
begin : gvdda
252264
la_iovdda #(.SIDE(SIDE),
253265
.PROP(CELLMAP[(i*40+32)+:8]),
254266
.RINGW(RINGW))
@@ -258,8 +270,9 @@ module la_ioside
258270
.vssio(vssio[CELLMAP[(i*40+24)+:8]]),
259271
.ioring(ioring[CELLMAP[(i*40+24)+:8]*RINGW+:RINGW]));
260272
end
261-
else if (CELLMAP[(i*40+16)+:8] == LA_VSSA)
262-
begin : g0
273+
// LA_VSSA
274+
if (CELLMAP[(i*40+16)+:8] == LA_VSSA)
275+
begin : gvssa
263276
la_iovssa #(.SIDE(SIDE),
264277
.PROP(CELLMAP[(i*40+32)+:8]),
265278
.RINGW(RINGW))

0 commit comments

Comments
 (0)