Improve resident trimmed ICP moment precision

[rsasaki0109]

Resident trimmed ICP previously accumulated normalized coordinates/products with f32 rounding. A partially gated 262,145-point registration exceeded the existing CPU pose agreement tolerance (0.0008154977).

Default retained-moment arithmetic now carries two f32 words through offsets, normalization, centroid division and covariance products. Integer mantissa products retain residuals; dependent runtime-zero bitcasts preserve intermediate rounding through compensated sums. The explicit GpuIcpTrimPrecision::CompensatedF32 choice retains the previous shader, with precision-selecting APIs in GPU and registration and a facade export.

The same adverse case now has a maximum pose-coordinate difference of 0.0000076293945, within the unchanged 3e-5 threshold. Stable selection, f32 transforms/search, all-gated fitness, CPU Horn solving/stopping, six phases plus selection digits and fixed 176-byte readbacks remain. Fraction one preserves canonical ordinary results; transfers and device limits are unchanged. No dependencies, core changes or unsafe boundaries are added.

Validation:

• Ten native trimming primitive tests, including 2,076 independent f64 arithmetic comparisons, three large fixed-pose moment oracles and a frozen complete previous shader.
• 27 large registration trajectories across three sizes/profiles and one/two/three updates; 486 existing conditions and three rotated guesses; mixed precision/concurrent callers, canonical fraction one, fitness and receipt checks.
• Facade smoke tests; registration all-feature library tests (35 passed, three intentional ignored); Clippy all features/targets, formatting, CPU-only ICP and optional ICP WASM checks.
• Two isolated release timing surveys: 12 size/profile cases each, six stages, three warmups and 20 rotating paired rounds, with output agreement checked. At 262,145 points the precise completed call is 5.79-7.59x faster than CPU and 1.82-2.06x faster than legacy correspondence GPU calls, while taking 1.03-1.11x the previous resident F32 time. At 257 points CPU is 14.7-27.5x faster. These are synthetic single-backend measurements with warm pipelines; full results and within-survey intervals are in the evidence note.

Numerical limits remain for f32 matching near gates/ties, underflow/extreme dynamic range and degenerate geometry. Moment accuracy does not ensure uniformly smaller pose error for every input. The explicit previous arithmetic supports its performance tradeoff.

Evidence: C:/Users/rsasa/Workspace/SpatialRust/notes/2026-10-13_gpu_icp_trimmed_precision.md. ROADMAP, architecture and CHANGELOG describe the final default and remaining solve boundaries. Follows merged PR #177.