Add resident GPU reductions for point-to-plane ICP

[rsasaki0109]

Depends on #171 (resident GPU GICP equations); this PR contains only the point-to-plane slice.

Point-to-plane ICP currently transforms source points and accumulates its 6x6 normal equations on CPU each iteration. Add an explicit register-icp-point-to-plane-gpu path that retains positions/tree/raw target normals for GPU transforms, nearest matching, plane Hessian/gradient and fitness reductions. Each evaluation explicitly downloads 256 bytes; CPU solves normalized equations and converts the existing world step. Raw normals retain relative length weights and zero rows, and ordinary CPU ICP is unchanged.

Finite geometry/normals, supported scales, valid configuration and runtime/device limits are checked. Nonfinite device arithmetic invalidates all payload. f32 transforms/reductions can change matches, pose and stopping; no automatic CPU fallback or placement change is introduced.

Validation:

• GPU library/integration tests: 219 passed (23 existing ignored). Registration library: 35 passed; two explicit native integration tests compare 99,252 points in 108 pose/scale/normal-weight/stopping conditions. Facade smoke passed.
• Independent f64 equations and nonzero-rotation world-step solve, gate/ownership/concurrency/schema/overflow/receipt tests; all-feature and CPU-only Clippy, WASM compilation, minimal facade and formatting passed.
• Two isolated release surveys with 24 conditions and 20 samples per stage: completed calls at 4,097+ points gained 1.06–3.33x in this environment, with within-survey confidence intervals above one. At 257 points CPU remains faster. Maximum measured CPU/device pose-coordinate error was 4.77e-7.

Contracts, full timing tables, transfer receipts and precision limits.