[fjtrujy]

Scope

Standalone, observation-only EE interrupt diagnostics. This PR does not implement preemptive Ctrl-C or change the GDB stub.

• Observe application instruction addresses from a VBlank callback while the EE runs a CPU-bound loop without debugger polling or scheduler yields.
• Compare callback-side CP0 EPC/Cause/Status with the address argument. These are observations, not a restorable register frame.
• Exercise a labeled branch/delay-slot loop and verify its arithmetic result.
• Model an incomplete 128-bit EE register frame in an unlinked, compile-only assembly candidate, with native tests that reject incomplete context.
• Add a read-only bootstrap-vector audit for user-supplied local BIOS references; its result must not be generalized to the live RAM vector.
• Cross-compile probes in CI, verify isolation, and clean generated binaries. No CI job runs an ELF on the PS2.

Validation

On a real PS2, both VBlank probes passed (2026-11-02): 12 interrupts, 11 in the busy loop; and 42 interrupts, 41 in the branch-loop range, with 120,000,000 delay-slot increments. VBlank is disabled before its handler is removed; PS2Link ping succeeded afterward. The callback's address argument reflected application code, while CP0 EPC sampled inside the callback reflected handler context.

The full local build, native tests, GDB/RSP checks, installation check, and cross-compiled probe checks pass. CI covers the same scope, including strict warning flags on the standalone probes.

Deliberate limitations

The callback argument is not a documented writable context pointer. There is no proven interrupted-thread identity, full register snapshot, general BD/EPC recovery, or asynchronous stop/resume. This PR is reviewable as an isolated diagnostic; the separate experimental preemptive implementation remains out of scope.