simd(riscv64): RVV kernels for sum, dot, sqrt and add/sub/mul/div

[tannevaled]

What

riscv64 gets SIMD kernels, generated by go-asmgen (internal/kernels/asmgen/riscv64/gen.go → sum_riscv64.s) for sum, dot, sqrt and add/sub/mul/div.

• No WORDs. Every instruction is a Go 1.27.1 mnemonic: VSETVLI, VLE64V/VSE64V, VFADDVV, VFSUBVV, VFMULVV, VFDIVVV, VFSQRTV, VFMACCVV, VFREDUSUMVS, VFMVSF/VFMVFS. Operand order was decoded from Go's own testdata encodings: VFSUBVV V1, V2, V3 gives V3 = V2 − V1.
• Vector-length agnostic loops. VSETVLI strip-mining with LMUL=8, no scalar tail. sum and dot keep a VLMAX-wide accumulator updated tail-undisturbed, then reduce it with vfredusum.
• Gated on AT_HWCAP bit V (1 << ('V'-'A')), through the auxv parser already used for loong64. V is optional on RISC-V.
• Unchanged: max/min stay scalar, because RVV vfmax/vfmin are IEEE 754-2019 maximumNumber and drop a NaN that NumPy propagates. The GEMM micro-kernel stays the scalar 4×4; an RVV micro-kernel is the next step.
• Build tags. reduce_generic.go and the new dot_generic.go exclude riscv64. The fence and guard tests now include riscv64. CI regenerates and checks sum_riscv64.s in the riscv64 qemu lane.

Tests on real hardware

• SpacemiT X60 (cfarm95, VLEN 256, useRVV = true): kernels and root suites PASS, including the PROT_NONE fence tests and TestParallelStress. Positive control: sumRVV reading len+1 faults.
• SiFive U74, no V (cfarm94, useRVV = false): the same binary takes the scalar path and passes.
• Sabotages, caught on cfarm95: swapped subtraction operands (TestBinSIMD) and a dot that does not advance b (TestDot1DP / TestDotSIMD).
• Elsewhere: coverage 100% (amd64/arm64 gate); go vet on 8 architectures; go test -c on every go tool dist list pair.

Measured (X60, one core pinned to an idle CPU, 6 interleaved rounds, median vs scalar v0.6.1)

	1 Ki	16 Ki	256 Ki
Sum	5.81×	2.51×	1.84×
AddInto / MulInto	3.2–3.3×	1.11–1.13×	1.07–1.12×
DivInto	2.27×	2.30×	2.28×
SqrtInto	2.43×	2.44×	2.47×

MatVec 1024² 2.02×, Dot 2^20 1.29×. The host was 54% busy overall, so measurements ran on a CPU checked idle (2%).

Docs

README (SIMD now covers riscv64; "s390x is next"), perf.md (riscv64 section), plan, and SECURITY.md audit entry.

Version: v0.7.0 (new architecture kernels).

🤖 Generated with Claude Code