Relocated the R_ARM_RELATIVE entries when a GNU ThreadX module starts, so a global pointer initialized with the address of another global now holds the loaded address

ports_module/cortex_m0+/gnu/example_build/sample_threadx_module/gcc_setup.s

@@ -1,4 +1,6 @@
 
+// Some portions generated by Copilot (Opus 5).
+
     .text
     .align 4
     .syntax unified
@@ -73,6 +75,46 @@ got_setup_done:
     movs    r2, #0
     bl      crt0_memory_set
 
+    /* Apply the R_ARM_RELATIVE relocations that target the module data area.  */
+
+    ldr     r3, =__FLASH_segment_start__ // crt0_memory_copy used r3 as a scratch register
+    ldr     r0, =__reldyn_load_start__
+    subs    r0,r0,r3
+    add     r0,r0,r5
+    ldr     r1, =__reldyn_end__
+    subs    r1,r1,r3
+    add     r1,r1,r5
+
+new_reldyn_setup:
+    cmp     r0, r1              // See if there are more relocation entries
+    beq     reldyn_setup_done   // No, done with the relocations
+    ldr     r6, [r0]            // Pickup the r_offset field
+    ldr     r7, [r0, #4]        // Pickup the r_info field
+    adds    r0, r0, #8          // Move to the next entry
+    uxtb    r7, r7              // The relocation type is in the low byte
+    cmp     r7, #23             // Is it R_ARM_RELATIVE?
+    bne     new_reldyn_setup    // No, only R_ARM_RELATIVE is supported
+    cmp     r6, r4              // Does it target the code or the data area?
+    blt     new_reldyn_setup    // The code area is shared and read-only, skip it
+    subs    r6, r6, r4          // Compute offset of data area
+    add     r6, r6, r9          // Build the address of the word to relocate
+    ldr     r7, [r6]            // Pickup the link time address stored there
+    cmp     r7, #0              // Is it 0?
+    beq     new_reldyn_setup    // Yes, just skip the adjustment
+    cmp     r7, r4              // Is it in the code or data area?
+    blt     reldyn_flash_area   // If less than, it is a code address
+    subs    r7, r7, r4          // Compute offset of data area
+    add     r7, r7, r9          // Build address based on the loaded data address
+    b       reldyn_built        // Finished building address
+reldyn_flash_area:
+    subs    r7, r7, r3          // Compute offset of code area
+    add     r7, r7, r5          // Build address based on the loaded code address
+reldyn_built:
+    str     r7, [r6]            // Store the relocated address back
+    b       new_reldyn_setup    // Continue at the top of the loop
+reldyn_setup_done:
+
+
 
     /* Setup heap - not recommended for Threadx but here for compatibility reasons */
 

ports_module/cortex_m0+/gnu/example_build/sample_threadx_module/sample_threadx_module.ld

@@ -211,5 +211,13 @@ SECTIONS
 
   __data_size__ =  __heap_end__ - __RAM_segment_start__;
 
+  /* The dynamic linking metadata is not used by the module manager.  Discarding
+     it keeps it out of the binary image produced from this ELF file.  */
+
+  /DISCARD/ :
+  {
+    *(.dynamic)
+  }
+
 }
 

ports_module/cortex_m3/gnu/example_build/build_threadx_module_sample.bat

@@ -1,5 +1,5 @@
 arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -fpie -fno-plt -mno-pic-data-is-text-relative -msingle-pic-base txm_module_preamble.s
 arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -fpie -fno-plt -mno-pic-data-is-text-relative -msingle-pic-base gcc_setup.S
 arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -fpie -fno-plt -mno-pic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc sample_threadx_module.c
-arm-none-eabi-ld -A cortex-m3 -T sample_threadx_module.ld txm_module_preamble.o gcc_setup.o sample_threadx_module.o -e _txm_module_thread_shell_entry txm.a -o sample_threadx_module.axf -M > sample_threadx_module.map 
+arm-none-eabi-ld -A cortex-m3 -T sample_threadx_module.ld -pie --no-dynamic-linker txm_module_preamble.o gcc_setup.o sample_threadx_module.o -e _txm_module_thread_shell_entry txm.a -o sample_threadx_module.axf -M > sample_threadx_module.map 
 

ports_module/cortex_m3/gnu/example_build/gcc_setup.s

@@ -1,4 +1,6 @@
 
+// Some portions generated by Copilot (Opus 5).
+
     .text
     .align 4
     .syntax unified
@@ -71,6 +73,46 @@ got_setup_done:
     mov     r2, #0
     bl      crt0_memory_set
 
+    /* Apply the R_ARM_RELATIVE relocations that target the module data area.  */
+
+    ldr     r3, =__FLASH_segment_start__ // crt0_memory_copy used r3 as a scratch register
+    ldr     r0, =__reldyn_load_start__
+    sub     r0,r0,r3
+    add     r0,r0,r5
+    ldr     r1, =__reldyn_end__
+    sub     r1,r1,r3
+    add     r1,r1,r5
+
+new_reldyn_setup:
+    cmp     r0, r1              // See if there are more relocation entries
+    beq     reldyn_setup_done   // No, done with the relocations
+    ldr     r6, [r0]            // Pickup the r_offset field
+    ldr     r7, [r0, #4]        // Pickup the r_info field
+    add     r0, r0, #8          // Move to the next entry
+    uxtb    r7, r7              // The relocation type is in the low byte
+    cmp     r7, #23             // Is it R_ARM_RELATIVE?
+    bne     new_reldyn_setup    // No, only R_ARM_RELATIVE is supported
+    cmp     r6, r4              // Does it target the code or the data area?
+    blt     new_reldyn_setup    // The code area is shared and read-only, skip it
+    sub     r6, r6, r4          // Compute offset of data area
+    add     r6, r6, r9          // Build the address of the word to relocate
+    ldr     r7, [r6]            // Pickup the link time address stored there
+    cmp     r7, #0              // Is it 0?
+    beq     new_reldyn_setup    // Yes, just skip the adjustment
+    cmp     r7, r4              // Is it in the code or data area?
+    blt     reldyn_flash_area   // If less than, it is a code address
+    sub     r7, r7, r4          // Compute offset of data area
+    add     r7, r7, r9          // Build address based on the loaded data address
+    b       reldyn_built        // Finished building address
+reldyn_flash_area:
+    sub     r7, r7, r3          // Compute offset of code area
+    add     r7, r7, r5          // Build address based on the loaded code address
+reldyn_built:
+    str     r7, [r6]            // Store the relocated address back
+    b       new_reldyn_setup    // Continue at the top of the loop
+reldyn_setup_done:
+
+
 
     /* Setup heap - not recommended for Threadx but here for compatibility reasons */
 

ports_module/cortex_m3/gnu/example_build/sample_threadx_module.ld

@@ -206,5 +206,13 @@ SECTIONS
 
   __data_size__ =  __heap_end__ - __RAM_segment_start__;
 
+  /* The dynamic linking metadata is not used by the module manager.  Discarding
+     it keeps it out of the binary image produced from this ELF file.  */
+
+  /DISCARD/ :
+  {
+    *(.dynamic)
+  }
+
 }
 

ports_module/cortex_m33/gnu/example_build/gcc_setup.s

@@ -1,4 +1,6 @@
 
+// Some portions generated by Copilot (Opus 5).
+
     .text
     .align 4
     .syntax unified
@@ -71,6 +73,46 @@ got_setup_done:
     mov     r2, #0
     bl      crt0_memory_set
 
+    /* Apply the R_ARM_RELATIVE relocations that target the module data area.  */
+
+    ldr     r3, =__FLASH_segment_start__ // crt0_memory_copy used r3 as a scratch register
+    ldr     r0, =__reldyn_load_start__
+    sub     r0,r0,r3
+    add     r0,r0,r5
+    ldr     r1, =__reldyn_end__
+    sub     r1,r1,r3
+    add     r1,r1,r5
+
+new_reldyn_setup:
+    cmp     r0, r1              // See if there are more relocation entries
+    beq     reldyn_setup_done   // No, done with the relocations
+    ldr     r6, [r0]            // Pickup the r_offset field
+    ldr     r7, [r0, #4]        // Pickup the r_info field
+    add     r0, r0, #8          // Move to the next entry
+    uxtb    r7, r7              // The relocation type is in the low byte
+    cmp     r7, #23             // Is it R_ARM_RELATIVE?
+    bne     new_reldyn_setup    // No, only R_ARM_RELATIVE is supported
+    cmp     r6, r4              // Does it target the code or the data area?
+    blt     new_reldyn_setup    // The code area is shared and read-only, skip it
+    sub     r6, r6, r4          // Compute offset of data area
+    add     r6, r6, r9          // Build the address of the word to relocate
+    ldr     r7, [r6]            // Pickup the link time address stored there
+    cmp     r7, #0              // Is it 0?
+    beq     new_reldyn_setup    // Yes, just skip the adjustment
+    cmp     r7, r4              // Is it in the code or data area?
+    blt     reldyn_flash_area   // If less than, it is a code address
+    sub     r7, r7, r4          // Compute offset of data area
+    add     r7, r7, r9          // Build address based on the loaded data address
+    b       reldyn_built        // Finished building address
+reldyn_flash_area:
+    sub     r7, r7, r3          // Compute offset of code area
+    add     r7, r7, r5          // Build address based on the loaded code address
+reldyn_built:
+    str     r7, [r6]            // Store the relocated address back
+    b       new_reldyn_setup    // Continue at the top of the loop
+reldyn_setup_done:
+
+
 
     /* Setup heap - not recommended for Threadx but here for compatibility reasons */
 

ports_module/cortex_m4/gnu/example_build/build_threadx_module_sample.bat

@@ -1,5 +1,5 @@
 arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -fpie -fno-plt -mno-pic-data-is-text-relative -msingle-pic-base txm_module_preamble.s
 arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -fpie -fno-plt -mno-pic-data-is-text-relative -msingle-pic-base gcc_setup.S
 arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -fpie -fno-plt -mno-pic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc sample_threadx_module.c
-arm-none-eabi-ld -A cortex-m4 -T sample_threadx_module.ld txm_module_preamble.o gcc_setup.o sample_threadx_module.o -e _txm_module_thread_shell_entry txm.a -o sample_threadx_module.axf -M > sample_threadx_module.map 
+arm-none-eabi-ld -A cortex-m4 -T sample_threadx_module.ld -pie --no-dynamic-linker txm_module_preamble.o gcc_setup.o sample_threadx_module.o -e _txm_module_thread_shell_entry txm.a -o sample_threadx_module.axf -M > sample_threadx_module.map 
 

ports_module/cortex_m4/gnu/example_build/gcc_setup.s

@@ -1,4 +1,6 @@
 
+// Some portions generated by Copilot (Opus 5).
+
     .text
     .align 4
     .syntax unified
@@ -71,6 +73,46 @@ got_setup_done:
     mov     r2, #0
     bl      crt0_memory_set
 
+    /* Apply the R_ARM_RELATIVE relocations that target the module data area.  */
+
+    ldr     r3, =__FLASH_segment_start__ // crt0_memory_copy used r3 as a scratch register
+    ldr     r0, =__reldyn_load_start__
+    sub     r0,r0,r3
+    add     r0,r0,r5
+    ldr     r1, =__reldyn_end__
+    sub     r1,r1,r3
+    add     r1,r1,r5
+
+new_reldyn_setup:
+    cmp     r0, r1              // See if there are more relocation entries
+    beq     reldyn_setup_done   // No, done with the relocations
+    ldr     r6, [r0]            // Pickup the r_offset field
+    ldr     r7, [r0, #4]        // Pickup the r_info field
+    add     r0, r0, #8          // Move to the next entry
+    uxtb    r7, r7              // The relocation type is in the low byte
+    cmp     r7, #23             // Is it R_ARM_RELATIVE?
+    bne     new_reldyn_setup    // No, only R_ARM_RELATIVE is supported
+    cmp     r6, r4              // Does it target the code or the data area?
+    blt     new_reldyn_setup    // The code area is shared and read-only, skip it
+    sub     r6, r6, r4          // Compute offset of data area
+    add     r6, r6, r9          // Build the address of the word to relocate
+    ldr     r7, [r6]            // Pickup the link time address stored there
+    cmp     r7, #0              // Is it 0?
+    beq     new_reldyn_setup    // Yes, just skip the adjustment
+    cmp     r7, r4              // Is it in the code or data area?
+    blt     reldyn_flash_area   // If less than, it is a code address
+    sub     r7, r7, r4          // Compute offset of data area
+    add     r7, r7, r9          // Build address based on the loaded data address
+    b       reldyn_built        // Finished building address
+reldyn_flash_area:
+    sub     r7, r7, r3          // Compute offset of code area
+    add     r7, r7, r5          // Build address based on the loaded code address
+reldyn_built:
+    str     r7, [r6]            // Store the relocated address back
+    b       new_reldyn_setup    // Continue at the top of the loop
+reldyn_setup_done:
+
+
 
     /* Setup heap - not recommended for Threadx but here for compatibility reasons */
 

ports_module/cortex_m4/gnu/example_build/sample_threadx_module.ld

@@ -206,5 +206,13 @@ SECTIONS
 
   __data_size__ =  __heap_end__ - __RAM_segment_start__;
 
+  /* The dynamic linking metadata is not used by the module manager.  Discarding
+     it keeps it out of the binary image produced from this ELF file.  */
+
+  /DISCARD/ :
+  {
+    *(.dynamic)
+  }
+
 }
 

ports_module/cortex_m7/gnu/example_build/build_threadx_module_sample.bat

@@ -1,5 +1,5 @@
 arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -fpie -fno-plt -mno-pic-data-is-text-relative -msingle-pic-base txm_module_preamble.s
 arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -fpie -fno-plt -mno-pic-data-is-text-relative -msingle-pic-base gcc_setup.S
 arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -fpie -fno-plt -mno-pic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc sample_threadx_module.c
-arm-none-eabi-ld -A cortex-m7 -T sample_threadx_module.ld txm_module_preamble.o gcc_setup.o sample_threadx_module.o -e _txm_module_thread_shell_entry txm.a -o sample_threadx_module.axf -M > sample_threadx_module.map 
+arm-none-eabi-ld -A cortex-m7 -T sample_threadx_module.ld -pie --no-dynamic-linker txm_module_preamble.o gcc_setup.o sample_threadx_module.o -e _txm_module_thread_shell_entry txm.a -o sample_threadx_module.axf -M > sample_threadx_module.map 
 

ports_module/cortex_m7/gnu/example_build/gcc_setup.s

@@ -1,4 +1,6 @@
 
+// Some portions generated by Copilot (Opus 5).
+
     .text
     .align 4
     .syntax unified
@@ -71,6 +73,46 @@ got_setup_done:
     mov     r2, #0
     bl      crt0_memory_set
 
+    /* Apply the R_ARM_RELATIVE relocations that target the module data area.  */
+
+    ldr     r3, =__FLASH_segment_start__ // crt0_memory_copy used r3 as a scratch register
+    ldr     r0, =__reldyn_load_start__
+    sub     r0,r0,r3
+    add     r0,r0,r5
+    ldr     r1, =__reldyn_end__
+    sub     r1,r1,r3
+    add     r1,r1,r5
+
+new_reldyn_setup:
+    cmp     r0, r1              // See if there are more relocation entries
+    beq     reldyn_setup_done   // No, done with the relocations
+    ldr     r6, [r0]            // Pickup the r_offset field
+    ldr     r7, [r0, #4]        // Pickup the r_info field
+    add     r0, r0, #8          // Move to the next entry
+    uxtb    r7, r7              // The relocation type is in the low byte
+    cmp     r7, #23             // Is it R_ARM_RELATIVE?
+    bne     new_reldyn_setup    // No, only R_ARM_RELATIVE is supported
+    cmp     r6, r4              // Does it target the code or the data area?
+    blt     new_reldyn_setup    // The code area is shared and read-only, skip it
+    sub     r6, r6, r4          // Compute offset of data area
+    add     r6, r6, r9          // Build the address of the word to relocate
+    ldr     r7, [r6]            // Pickup the link time address stored there
+    cmp     r7, #0              // Is it 0?
+    beq     new_reldyn_setup    // Yes, just skip the adjustment
+    cmp     r7, r4              // Is it in the code or data area?
+    blt     reldyn_flash_area   // If less than, it is a code address
+    sub     r7, r7, r4          // Compute offset of data area
+    add     r7, r7, r9          // Build address based on the loaded data address
+    b       reldyn_built        // Finished building address
+reldyn_flash_area:
+    sub     r7, r7, r3          // Compute offset of code area
+    add     r7, r7, r5          // Build address based on the loaded code address
+reldyn_built:
+    str     r7, [r6]            // Store the relocated address back
+    b       new_reldyn_setup    // Continue at the top of the loop
+reldyn_setup_done:
+
+
 
     /* Setup heap - not recommended for Threadx but here for compatibility reasons */
 

ports_module/cortex_m7/gnu/example_build/sample_threadx_module.ld

@@ -206,5 +206,13 @@ SECTIONS
 
   __data_size__ =  __heap_end__ - __RAM_segment_start__;
 
+  /* The dynamic linking metadata is not used by the module manager.  Discarding
+     it keeps it out of the binary image produced from this ELF file.  */
+
+  /DISCARD/ :
+  {
+    *(.dynamic)
+  }
+
 }