chipsec · chipsec-bbci · Dec 15, 2025
diff --git a/_sources/development/Developing.rst.txt b/_sources/development/Developing.rst.txt
@@ -17,7 +17,7 @@ Most modules read some platform configuration and then pass or fail based on the
 
    .. code-block:: python
 
-    ble = self.cs.control.get('BiosLockEnable')
+    ble = self.cs.control.get_list_by_name('BiosLockEnable').is_all_value(1)
 
 3. React based on the status of the control:
 

diff --git a/_sources/index.rst.txt b/_sources/index.rst.txt
@@ -1,10 +1,10 @@
-.. CHIPSEC 1.13.19 documentation file, created by
+.. CHIPSEC 2.0.0-rc5 documentation file, created by
    sphinx-quickstart on Wed Mar 25 13:24:44 2015.
    You can adapt this file completely to your liking, but it should at least
    contain the root `toctree` directive.
 
-CHIPSEC 1.13.19
-===============
+CHIPSEC 2.0.0-rc5
+=================
 
 CHIPSEC is a framework for analyzing platform level security of
 hardware, devices, system firmware, low-level protection mechanisms, and

diff --git a/_sources/modules/chipsec.cfg.8086.adl.xml.rst.txt b/_sources/modules/chipsec.cfg.8086.adl.xml.rst.txt
@@ -5,7 +5,7 @@ Path: chipsec\\cfg\\8086\\adl.xml
 
 
 CHIPSEC: Platform Security Assessment Framework
-Copyright (c) 2021-2022, Intel Corporation
+Copyright (c) 2023, Intel Corporation
 
 This program is free software; you can redistribute it and/or
 modify it under the terms of the GNU General Public License

diff --git a/_sources/modules/chipsec.cfg.8086.apl.xml.rst.txt b/_sources/modules/chipsec.cfg.8086.apl.xml.rst.txt
diff --git a/_sources/modules/chipsec.cfg.8086.avn.xml.rst.txt b/_sources/modules/chipsec.cfg.8086.avn.xml.rst.txt
diff --git a/_sources/modules/chipsec.cfg.8086.bdw.xml.rst.txt b/_sources/modules/chipsec.cfg.8086.bdw.xml.rst.txt
diff --git a/_sources/modules/chipsec.cfg.8086.bdx.xml.rst.txt b/_sources/modules/chipsec.cfg.8086.bdx.xml.rst.txt
diff --git a/_sources/modules/chipsec.cfg.8086.byt.xml.rst.txt b/_sources/modules/chipsec.cfg.8086.byt.xml.rst.txt
diff --git a/_sources/modules/chipsec.cfg.8086.cfl.xml.rst.txt b/_sources/modules/chipsec.cfg.8086.cfl.xml.rst.txt
diff --git a/_sources/modules/chipsec.cfg.8086.cht.xml.rst.txt b/_sources/modules/chipsec.cfg.8086.cht.xml.rst.txt
diff --git a/_sources/modules/chipsec.cfg.8086.cml.xml.rst.txt b/_sources/modules/chipsec.cfg.8086.cml.xml.rst.txt
diff --git a/_sources/modules/chipsec.cfg.8086.common.xml.rst.txt b/_sources/modules/chipsec.cfg.8086.common.xml.rst.txt
diff --git a/_sources/modules/chipsec.cfg.8086.dnv.xml.rst.txt b/_sources/modules/chipsec.cfg.8086.dnv.xml.rst.txt
diff --git a/_sources/modules/chipsec.cfg.8086.ehl.xml.rst.txt b/_sources/modules/chipsec.cfg.8086.ehl.xml.rst.txt
diff --git a/_sources/modules/chipsec.cfg.8086.glk.xml.rst.txt b/_sources/modules/chipsec.cfg.8086.glk.xml.rst.txt
diff --git a/_sources/modules/chipsec.cfg.8086.hsw.xml.rst.txt b/_sources/modules/chipsec.cfg.8086.hsw.xml.rst.txt
diff --git a/_sources/modules/chipsec.cfg.8086.hsx.xml.rst.txt b/_sources/modules/chipsec.cfg.8086.hsx.xml.rst.txt
diff --git a/_sources/modules/chipsec.cfg.8086.icl.xml.rst.txt b/_sources/modules/chipsec.cfg.8086.icl.xml.rst.txt
diff --git a/_sources/modules/chipsec.cfg.8086.icx.xml.rst.txt b/_sources/modules/chipsec.cfg.8086.icx.xml.rst.txt
diff --git a/_sources/modules/chipsec.cfg.8086.iommu.xml.rst.txt b/_sources/modules/chipsec.cfg.8086.iommu.xml.rst.txt
diff --git a/_sources/modules/chipsec.cfg.8086.ivb.xml.rst.txt b/_sources/modules/chipsec.cfg.8086.ivb.xml.rst.txt
diff --git a/_sources/modules/chipsec.cfg.8086.ivt.xml.rst.txt b/_sources/modules/chipsec.cfg.8086.ivt.xml.rst.txt
diff --git a/_sources/modules/chipsec.cfg.8086.jkt.xml.rst.txt b/_sources/modules/chipsec.cfg.8086.jkt.xml.rst.txt
diff --git a/_sources/modules/chipsec.cfg.8086.kbl.xml.rst.txt b/_sources/modules/chipsec.cfg.8086.kbl.xml.rst.txt
@@ -3,12 +3,4 @@ kbl
 
 Path: chipsec\\cfg\\8086\\kbl.xml
 
-
-XML configuration file for Kaby Lake based platforms
-
-http://www.intel.com/content/www/us/en/processors/core/core-technical-resources.html
-
-* 7th Generation Intel(R) Processor Families for U/Y-Platforms
-
-* 7th Generation Intel(R) Processor Families I/O for U/Y-Platforms
-
+ XML configuration file for Ice Lake 
diff --git a/_sources/modules/chipsec.cfg.8086.kbl_orig.xmls.rst.txt b/_sources/modules/chipsec.cfg.8086.kbl_orig.xmls.rst.txt
@@ -0,0 +1,14 @@
+kbl_orig.
+=============
+
+Path: chipsec\\cfg\\8086\\kbl_orig.xmls
+
+
+XML configuration file for Kaby Lake based platforms
+
+http://www.intel.com/content/www/us/en/processors/core/core-technical-resources.html
+
+* 7th Generation Intel(R) Processor Families for U/Y-Platforms
+
+* 7th Generation Intel(R) Processor Families I/O for U/Y-Platforms
+
diff --git a/_sources/modules/chipsec.cfg.8086.mtl.xml.rst.txt b/_sources/modules/chipsec.cfg.8086.mtl.xml.rst.txt
@@ -3,23 +3,4 @@ mtl
 
 Path: chipsec\\cfg\\8086\\mtl.xml
 
-
-CHIPSEC: Platform Security Assessment Framework
-Copyright (c) 2024, Intel Corporation
-
-This program is free software; you can redistribute it and/or
-modify it under the terms of the GNU General Public License
-as published by the Free Software Foundation; Version 2.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License
-along with this program; if not, write to the Free Software
-Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
-
-Contact information:
-chipsec@intel.com
-
+ XML configuration file for Ice Lake 
diff --git a/_sources/modules/chipsec.cfg.8086.pch_1xx.xml.rst.txt b/_sources/modules/chipsec.cfg.8086.pch_1xx.xml.rst.txt
diff --git a/_sources/modules/chipsec.cfg.8086.pch_2xx.xml.rst.txt b/_sources/modules/chipsec.cfg.8086.pch_2xx.xml.rst.txt
diff --git a/_sources/modules/chipsec.cfg.8086.pch_3xx.xml.rst.txt b/_sources/modules/chipsec.cfg.8086.pch_3xx.xml.rst.txt
diff --git a/...es/chipsec.cfg.8086.pch_3xxlp.xml.rst.txt → ...psec.cfg.8086.pch_3xxlp_orig.xmls.rst.txt b/...es/chipsec.cfg.8086.pch_3xxlp.xml.rst.txt → ...psec.cfg.8086.pch_3xxlp_orig.xmls.rst.txt
@@ -1,7 +1,7 @@
-pch_3xxlp
-=============
+pch_3xxlp_orig.
+===================
 
-Path: chipsec\\cfg\\8086\\pch_3xxlp.xml
+Path: chipsec\\cfg\\8086\\pch_3xxlp_orig.xmls
 
 
 XML configuration file for the 300 series LP (U/Y) PCH

diff --git a/_sources/modules/chipsec.cfg.8086.pch_3xxop.xml.rst.txt b/_sources/modules/chipsec.cfg.8086.pch_3xxop.xml.rst.txt
diff --git a/_sources/modules/chipsec.cfg.8086.pch_495.xml.rst.txt b/_sources/modules/chipsec.cfg.8086.pch_495.xml.rst.txt
diff --git a/_sources/modules/chipsec.cfg.8086.pch_4xx.xml.rst.txt b/_sources/modules/chipsec.cfg.8086.pch_4xx.xml.rst.txt
diff --git a/_sources/modules/chipsec.cfg.8086.pch_4xxh.xml.rst.txt b/_sources/modules/chipsec.cfg.8086.pch_4xxh.xml.rst.txt