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espressif-risc-v: simplify code for simpleboot. - #19985

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Laczen:espressif_riscv_startup
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espressif-risc-v: simplify code for simpleboot.#19985
Laczen wants to merge 1 commit into
apache:masterfrom
Laczen:espressif_riscv_startup

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@Laczen

@Laczen Laczen commented Aug 27, 2026

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Summary

Simpleboot on espressif changes the location of irom and drom segments in the image.

Instead of correcting in map_rom_segments a routine modify_rom_segments_lma(&app_irom_start, &app_drom_start) is introduced that corrects the load addresses before calling map_rom_segments.

Impact

None

Testing

Tested on esp32c3-devkit:usbconsole

nsh> uname -a
NuttX 12.8.0 ff7eb839de-dirty Aug 27 2026 12:15:36 risc-v esp32c3-devkit
nsh>

Simpleboot on espressif changes the location of irom and drom segments
in the image. Instead of correcting in `map_rom_segments` a routine
is introduced that corrects the load addresses before calling
`map_rom_segments`.

Signed-off-by: Laczen JMS <laczenjms@gmail.com>
@Laczen
Laczen force-pushed the espressif_riscv_startup branch from eaa55eb to 43a5ddb Compare August 27, 2026 11:21
@eren-terzioglu

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@almir-okato Could you have a look too?

@github-actions github-actions Bot added Arch: risc-v Issues related to the RISC-V (32-bit or 64-bit) architecture Size: S The size of the change in this PR is small labels Aug 27, 2026
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MemBrowse Memory Report

No memory changes detected for:

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Arch: risc-v Issues related to the RISC-V (32-bit or 64-bit) architecture Size: S The size of the change in this PR is small

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3 participants