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arch/mips: Add basic support for MIPS Creator CI20 board#19422

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arch/mips: Add basic support for MIPS Creator CI20 board#19422
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ldube:ci20

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@ldube

@ldube ldube commented Jul 13, 2026

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Summary

This commit introduces a rudimentary architecture and board port for the MIPS Creator CI20, featuring the dual core Ingenic JZ4780 SoC (MIPS32).

Included in this initial implementation:

  • Basic architectural initialization and startup code for the JZ4780 Core 0.
  • Minimal configuration required to execute from RAM.
  • Early UART/serial console support for basic debugging and NSH output.
  • Minimal board-specific configuration for the CI20 target.
  • Console output is routed via UART0 on the expansion header.

This establishes basic support for running NuttX on the MIPS CI20. Further peripherals, optimization, and extended documentation are left for future iterations or community contributions.

Build and Runtime Deployment Info:

The baseline can be configured, compiled using the MIPS MTI toolchain, and loaded via U-Boot using the following commands (replace <tftp_dir> with your local TFTP root directory).

./tools/configure.sh -l ci20/nsh
make CROSSDEV=mips-mti-elf-
mkimage -A mips -O linux -T kernel -C none -a 0x80000180 -e 0x800004ac
-n "nx" -d nuttx.bin <tftp_dir>/nuttx.umg

Note: U-Boot must be properly configured for networking (e.g., valid ipaddr, serverip, and ethaddr environment variables) to fetch the image over TFTP.

Run this from U-Boot prompt:
tftp nuttx.umg && bootm $fileaddr

Testing

The port has been verified on target hardware. The system successfully boots from RAM into the NuttShell (NSH) via the serial console, with the scheduler running normally:

NuttShell (NSH) NuttX-13.0.0
nsh> ps
TID PID PPID PRI POLICY TYPE NPX STATE EVENT SIGMASK STACK COMMAND
0 0 0 0 FIFO Kthread - Ready 0000000000000000 0002024
1 0 0 50 RR Kthread - Waiting Semaphore 0000000000000000 0001976 0x800589b8 0x80058a08
3 3 0 100 RR Task - Running 0000000000000000 0002004
nsh>

@github-actions github-actions Bot added Area: Build system Arch: mips Issues related to the MIPS architecture Size: XL The size of the change in this PR is very large. Consider breaking down the PR into smaller pieces. Board: mips labels Jul 13, 2026
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github-actions Bot commented Jul 13, 2026

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MemBrowse Memory Report

hifive1-revb

@xiaoxiang781216

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@ldube please create a new patch in this pr fix the following compiler error:

====================================================================================
Configuration/Tool: ci20/nsh,CONFIG_MIPS32_TOOLCHAIN_PINGUINOL
2026-07-13 06:56:52
------------------------------------------------------------------------------------
  Cleaning...
  Configuring...
  Disabling CONFIG_MIPS32_TOOLCHAIN_GNU_ELF
  Enabling CONFIG_MIPS32_TOOLCHAIN_PINGUINOL
  Building NuttX...
serial/uart_16550.c: In function 'u16550_sendbuf':
Error: serial/uart_16550.c:1586:3: error: 'for' loop initial declarations are only allowed in C99 or C11 mode
   for (size_t i = 0; i < size; i++)
   ^
serial/uart_16550.c:1586:3: note: use option -std=c99, -std=gnu99, -std=c11 or -std=gnu11 to compile your code
make[1]: *** [Makefile:108: uart_16550.o] Error 1
make[1]: Target 'libdrivers.a' not remade because of errors.
make: *** [tools/LibTargets.mk:107: drivers/libdrivers.a] Error 2
mm_gran/mm_grantable.c: In function 'gran_search':
Error: mm_gran/mm_grantable.c:270:3: error: 'for' loop initial declarations are only allowed in C99 or C11 mode

@acassis acassis left a comment

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@ldube nice port! It will open door to use NuttX in many Ingenic chips! Please add a Documentation page to let people know that this chip is support, inside Supported Arch -> MIPS

This commit introduces a rudimentary architecture and board port for the
MIPS Creator CI20, featuring the dual core Ingenic JZ4780 SoC (MIPS32).

Included in this initial implementation:
- Basic architectural initialization and startup code for the JZ4780 Core 0.
- Minimal configuration required to execute from RAM.
- Early UART/serial console support for basic debugging and NSH output.
- Minimal board-specific configuration for the CI20 target.
- Console output is routed via UART0 on the expansion header.

This establishes basic support for running NuttX on the MIPS CI20.
Further peripherals, optimization, and extended documentation are left for
future iterations or community contributions.

Build and Runtime Deployment Info:
----------------------------------

The baseline can be configured, compiled using the MIPS MTI toolchain,
and loaded via U-Boot using the following commands (replace
<tftp_dir> with your local TFTP root directory).

./tools/configure.sh -l ci20/nsh
  make CROSSDEV=mips-mti-elf-
  mkimage -A mips -O linux -T kernel -C none -a 0x80000180 -e 0x800004ac \
    -n "nx" -d nuttx.bin <tftp_dir>/nuttx.umg

Note: U-Boot must be properly configured for networking (e.g., valid ipaddr,
serverip, and ethaddr environment variables) to fetch the image over TFTP.

Run this from U-Boot prompt:
  tftp nuttx.umg && bootm $fileaddr

Signed-off-by: Lwazi Dube <lwazeh@gmail.com>

@acassis acassis left a comment

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@ldube I forgot to mark as Requested change. Please add basic Documentation about this new supported processor and the MIPS Creator CI20 board

@acassis acassis requested a review from linguini1 July 13, 2026 14:14
@ldube

ldube commented Jul 13, 2026

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@acassis I have my own todo list that I need to follow. Please stop blocking my submission. I need to get working on USB host support before the day is over.

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Arch: mips Issues related to the MIPS architecture Area: Build system Board: mips Size: XL The size of the change in this PR is very large. Consider breaking down the PR into smaller pieces.

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3 participants