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Do not emit an input max_transition below the library default #306

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Do not emit an input max_transition below the library default #306

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b695a2d
Do not emit an input max_transition below the library default
appleweiping Sep 3, 2026
c770dc6
Make the input max_transition floor a configurable option
appleweiping Sep 4, 2026
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8 changes: 5 additions & 3 deletions compiler/characterizer/lib.py
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Original file line number Diff line number Diff line change
Expand Up @@ -281,7 +281,7 @@ def write_defaults(self):
self.lib.write(" default_input_pin_cap : 1.0 ;\n")
self.lib.write(" default_inout_pin_cap : 1.0 ;\n")
self.lib.write(" default_output_pin_cap : 0.0 ;\n")
self.lib.write(" default_max_transition : 0.5 ;\n")
self.lib.write(" default_max_transition : {} ;\n".format(OPTS.max_transition))
self.lib.write(" default_fanout_load : 1.0 ;\n")
self.lib.write(" default_max_fanout : 4.0 ;\n")
self.lib.write(" default_connection_class : universal ;\n\n")
Expand Down Expand Up @@ -484,7 +484,8 @@ def write_addr_bus(self, port):
self.lib.write(" bus_type : addr; \n")
self.lib.write(" direction : input; \n")
self.lib.write(" capacitance : {0}; \n".format(tech.spice["dff_in_cap"]/1000))
self.lib.write(" max_transition : {0};\n".format(self.slews[-1]))
max_transition = max(OPTS.max_transition, self.slews[-1])
self.lib.write(" max_transition : {0};\n".format(max_transition))
self.lib.write(" pin(addr{0}[{1}:0])".format(port,self.sram.addr_size-1))
self.lib.write("{\n")

Expand All @@ -499,7 +500,8 @@ def write_wmask_bus(self, port):
self.lib.write(" bus_type : wmask; \n")
self.lib.write(" direction : input; \n")
self.lib.write(" capacitance : {0}; \n".format(tech.spice["dff_in_cap"] / 1000))
self.lib.write(" max_transition : {0};\n".format(self.slews[-1]))
max_transition = max(OPTS.max_transition, self.slews[-1])
self.lib.write(" max_transition : {0};\n".format(max_transition))
self.lib.write(" pin(wmask{0}[{1}:0])".format(port, self.sram.num_wmasks - 1))
self.lib.write("{\n")

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6 changes: 6 additions & 0 deletions compiler/globals.py
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Original file line number Diff line number Diff line change
Expand Up @@ -544,6 +544,12 @@ def set_default_corner():
if (OPTS.slew_scales == ""):
OPTS.slew_scales = [0.25, 1, 8]

# Lower bound for the max_transition emitted on input pins. A
# characterized slew range can be far tighter than the technology can
# actually drive, which produces a limit downstream STA rejects.
if (OPTS.max_transition == ""):
OPTS.max_transition = 0.5


def import_tech():
""" Dynamically adds the tech directory to the path and imports it. """
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1 change: 1 addition & 0 deletions compiler/options.py
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Expand Up @@ -43,6 +43,7 @@ class options(optparse.Values):
process_corners = ""
load_scales = ""
slew_scales = ""
max_transition = ""

# Size parameters must be specified by user in config file.
# num_words = 0
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2 changes: 1 addition & 1 deletion compiler/tests/golden/sram_2_16_1_freepdk45_FF_1p0V_25C_analytical.lib
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Original file line number Diff line number Diff line change
Expand Up @@ -177,7 +177,7 @@ cell (sram_2_16_1_freepdk45){
bus_type : addr;
direction : input;
capacitance : 0.00020910000000000001;
max_transition : 0.04;
max_transition : 0.5;
pin(addr0[3:0]){
timing(){
timing_type : setup_rising;
Expand Down
2 changes: 1 addition & 1 deletion compiler/tests/golden/sram_2_16_1_freepdk45_SS_1p0V_25C_analytical.lib
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Original file line number Diff line number Diff line change
Expand Up @@ -177,7 +177,7 @@ cell (sram_2_16_1_freepdk45){
bus_type : addr;
direction : input;
capacitance : 0.00020910000000000001;
max_transition : 0.04;
max_transition : 0.5;
pin(addr0[3:0]){
timing(){
timing_type : setup_rising;
Expand Down
2 changes: 1 addition & 1 deletion compiler/tests/golden/sram_2_16_1_freepdk45_TT_1p0V_25C.lib
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Original file line number Diff line number Diff line change
Expand Up @@ -177,7 +177,7 @@ cell (sram_2_16_1_freepdk45){
bus_type : addr;
direction : input;
capacitance : 0.00020910000000000001;
max_transition : 0.04;
max_transition : 0.5;
pin(addr0[3:0]){
timing(){
timing_type : setup_rising;
Expand Down
2 changes: 1 addition & 1 deletion compiler/tests/golden/sram_2_16_1_freepdk45_TT_1p0V_25C_analytical.lib
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Original file line number Diff line number Diff line change
Expand Up @@ -177,7 +177,7 @@ cell (sram_2_16_1_freepdk45){
bus_type : addr;
direction : input;
capacitance : 0.00020910000000000001;
max_transition : 0.04;
max_transition : 0.5;
pin(addr0[3:0]){
timing(){
timing_type : setup_rising;
Expand Down
2 changes: 1 addition & 1 deletion compiler/tests/golden/sram_2_16_1_freepdk45_TT_1p0V_25C_pruned.lib
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Original file line number Diff line number Diff line change
Expand Up @@ -165,7 +165,7 @@ cell (sram_2_16_1_freepdk45){
bus_type : addr;
direction : input;
capacitance : 0.2091;
max_transition : 0.04;
max_transition : 0.5;
pin(addr0[3:0]){
timing(){
timing_type : setup_rising;
Expand Down
2 changes: 1 addition & 1 deletion compiler/tests/golden/sram_2_16_1_scn4m_subm_FF_5p0V_25C_analytical.lib
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Original file line number Diff line number Diff line change
Expand Up @@ -177,7 +177,7 @@ cell (sram_2_16_1_scn4m_subm){
bus_type : addr;
direction : input;
capacitance : 0.0098242;
max_transition : 0.4;
max_transition : 0.5;
pin(addr0[3:0]){
timing(){
timing_type : setup_rising;
Expand Down
2 changes: 1 addition & 1 deletion compiler/tests/golden/sram_2_16_1_scn4m_subm_SS_5p0V_25C_analytical.lib
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Original file line number Diff line number Diff line change
Expand Up @@ -177,7 +177,7 @@ cell (sram_2_16_1_scn4m_subm){
bus_type : addr;
direction : input;
capacitance : 0.0098242;
max_transition : 0.4;
max_transition : 0.5;
pin(addr0[3:0]){
timing(){
timing_type : setup_rising;
Expand Down
2 changes: 1 addition & 1 deletion compiler/tests/golden/sram_2_16_1_scn4m_subm_TT_5p0V_25C.lib
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Original file line number Diff line number Diff line change
Expand Up @@ -177,7 +177,7 @@ cell (sram_2_16_1_scn4m_subm){
bus_type : addr;
direction : input;
capacitance : 0.0098242;
max_transition : 0.4;
max_transition : 0.5;
pin(addr0[3:0]){
timing(){
timing_type : setup_rising;
Expand Down
2 changes: 1 addition & 1 deletion compiler/tests/golden/sram_2_16_1_scn4m_subm_TT_5p0V_25C_analytical.lib
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Original file line number Diff line number Diff line change
Expand Up @@ -177,7 +177,7 @@ cell (sram_2_16_1_scn4m_subm){
bus_type : addr;
direction : input;
capacitance : 0.0098242;
max_transition : 0.4;
max_transition : 0.5;
pin(addr0[3:0]){
timing(){
timing_type : setup_rising;
Expand Down
2 changes: 1 addition & 1 deletion compiler/tests/golden/sram_2_16_1_scn4m_subm_TT_5p0V_25C_pruned.lib
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Original file line number Diff line number Diff line change
Expand Up @@ -165,7 +165,7 @@ cell (sram_2_16_1_scn4m_subm){
bus_type : addr;
direction : input;
capacitance : 9.8242;
max_transition : 0.4;
max_transition : 0.5;
pin(addr0[3:0]){
timing(){
timing_type : setup_rising;
Expand Down