vortex: bump upstream to d425a56 (v2.3+)#190
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Range 31e4765d..d425a56e (86 upstream commits, only one synthesizable RTL change after applying our srcs.bzl exclusions): - Only hw/rtl change in scope: VX_axi_adapter.sv switches both AWBURST and ARBURST from 2'b00 (FIXED) to 2'b01 (INCR). This file is in our release tree (committed for completeness) but is EXCLUDED from VORTEX_FILES — we use the inner Vortex.sv top, not the Vortex_axi.sv AXI-wrapped top. The change is committed to keep dev/gen/rtl/ ≡ rtl/ syncable. - Two new top-level subdirectories upstream (afu/, tcu/) — both explicitly excluded by srcs.bzl (alternate tops / TensorCoreUnit). Not promoted into rtl/. - Other 85 commits: software-side (simx restructuring for submodules, MPI test coverage, debug stack relocation in dtm, srai/vxspawn/assert fixes, CI toolchain pins, build version centralization). No effect on synthesizable RTL we use. Also gitignore vortex/dev/gen/ — setup.sh's rsync staging area for upstream hw/rtl/ + REPLACE overlays. Not meant to be committed. Build verification deferred to upstream cache sweep. Single-file diff in our synth tree is too narrow to flip closure state. Closes #82.
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…eam bumps; carry pending floonoc index.html badge fix - vortex on all 3 platforms (asap7 / nangate45 / sky130hd) updated to data-commit=7431d4fb (the d425a56e v2.3+ bump). QoR unchanged from the cached pre-bump run — the only synthesizable-RTL diff was a VX_axi_adapter.sv burst-type tweak that is excluded from VORTEX_FILES. PNGs + thumbs renamed accordingly. - liteeth on all 3 platforms updated to data-commit=7fe06ef2 (the 883f3a4b v2025.04 bump). QoR unchanged from the cached pre-bump run even though the CRC engine and 1000BASE-X PCS encoder were rewritten upstream — the patched-and-renamed liteeth_udp_usp_gth_sgmii top synthesizes to the same footprint. PNGs + thumbs renamed accordingly. - index.html: drop the spurious sky130hd platform badge on the FlooNoC Design Portfolio row. The sky130hd build target exists but is documented "not finishing" in designs/src/floonoc/DECISIONS.md, so the badge was claiming a platform we don't actually reach.
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Summary
designs/src/vortex/dev/repo31e4765d→d425a56e(86 upstream commits).srcs.bzlexclusions (alternate tops / FPGA AFU / TCU), only one synthesizable RTL file actually changes:libs/VX_axi_adapter.svflips bothAWBURSTandARBURSTfrom2'b00(FIXED) to2'b01(INCR). It's a release-tree file but not inVORTEX_FILES— we use the innerVortex.svtop, not the AXI-wrappedVortex_axi.sv. Committed for tree-sync, no synth impact.afu/,tcu/— TensorCoreUnit). Both explicitly excluded bysrcs.bzland not promoted intortl/.Also gitignore
**/vortex/dev/gen/— setup.sh's rsync staging area, never meant to be committed.Test plan
dev/setup.shruns clean.bazel build //designs/asap7/vortex:vortex_gallery— passes locally, 6603s.bazel build //designs/nangate45/vortex:vortex_gallery— passes locally, 4246s.bazel build //designs/sky130hd/vortex:vortex_gallery— passes locally, 6349s.Closes #82.