litepci: bump upstream to c1b2d8c0#188
Open
mguthaus wants to merge 1 commit into
Open
Conversation
Range 95f47311..c1b2d8c0 (12 commits — mostly test infrastructure and software-side improvements, one RTL change): - 00e5bcf tlp/packetizer: keep 128-bit 4DW payload in DATA — the only RTL-affecting commit. Removes the dead replay-first logic on the 3DW/4DW header inserters (gated by 1'd0 in the prior version), shrinking generated litepcie_core.v by ~140 lines. - c52a6fe: kernel DMA mmap fix (software-side) - e5f4760: liteuart RX/TX polling robustness (software-side) - 43a21eb: PCIe rescan utility (software-side) - b5c8f01: shared DMA fd support (software-side) - 9d332cd / 37c4b12 / 4653b9a / b08c6b5 / 3a13f28 / a3cae57 / c1b2d8c: test infrastructure (CI split, VCD opt-in, isolated example outputs, style alignment, 128-bit 4DW handoff regression test) Regenerated litepcie_core.v via dev/gen.sh (LiteX a25eeecd / migen 4c2ae8df pinned). PHY LEF/LIBs regenerated identically — no diff. Also gitignore dev/build_archive/ so litepci's gen.sh archive directory stops showing up in git status. Build verification deferred to the upstream cache sweep. Closes #151.
This file contains hidden or bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
Sign up for free
to join this conversation on GitHub.
Already have an account?
Sign in to comment
1 participant
Add this suggestion to a batch that can be applied as a single commit.This suggestion is invalid because no changes were made to the code.Suggestions cannot be applied while the pull request is closed.Suggestions cannot be applied while viewing a subset of changes.Only one suggestion per line can be applied in a batch.Add this suggestion to a batch that can be applied as a single commit.Applying suggestions on deleted lines is not supported.You must change the existing code in this line in order to create a valid suggestion.Outdated suggestions cannot be applied.This suggestion has been applied or marked resolved.Suggestions cannot be applied from pending reviews.Suggestions cannot be applied on multi-line comments.Suggestions cannot be applied while the pull request is queued to merge.Suggestion cannot be applied right now. Please check back later.
Summary
designs/src/litepci/dev/repo95f47311→c1b2d8c0(12 commits).00e5bcf tlp/packetizer: keep 128-bit 4DW payload in DATA— removes the dead replay-first logic on the 3DW/4DW header inserters (gated by1'd0in the prior version), shrinking generatedlitepcie_core.vby ~140 lines.litepcie_core.vviadev/gen.sh. PHY LEF/LIBs regenerated identically — no diff..gitignoreentry fordev/build_archive/so litepci's gen.sh archive directory stops showing up ingit statusafter a regen.Test plan
dev/gen.shruns clean —inline_readmemh.py+inline_fakeram.pypatched 20 memories into fakeram instances.bazel build //designs/asap7/litepci:litepci_gallery— deferred to upstream cache sweep.bazel build //designs/nangate45/litepci:litepci_gallery— deferred to upstream cache sweep (nangate45/sky130hd still in recovery perfeedback_litepci_builds_on_k8s.md).bazel build //designs/sky130hd/litepci:litepci_gallery— deferred to upstream cache sweep.Webpage refresh follows after PR merge so the new
c1b2d8c0commit SHA is reachable onmain.Closes #151.