Gfx11

ggml/src/ggml-cuda/common.cuh

@@ -1639,3 +1639,12 @@ static __inline__ void ggml_cuda_kernel_launch(Kernel kernel, const ggml_cuda_ke
     CUDA_CHECK(cudaGetLastError());
 }
 
+// Opt-in stderr logging for MMQ/MMVQ kernel dimensions (set GGML_CUDA_MM_LOG=1).
+static inline bool ggml_cuda_mm_log_enabled() {
+    static int enabled = -1;
+    if (enabled < 0) {
+        enabled = getenv("GGML_CUDA_MM_LOG") ? 1 : 0;
+    }
+    return enabled;
+}
+

ggml/src/ggml-cuda/mmq.cu

@@ -157,6 +157,15 @@ void ggml_cuda_mul_mat_q(
             ne02, ne12, s02, s12, s2,
             ne03, ne13, s03, s13, s3,
             use_stream_k, ne1};
+
+        // Log kernel dimensions for profiling analysis (GGML_CUDA_MM_LOG=1).
+        // dst[ne01, ne11] = src0[ne00, ne01] @ src1[ne10, ne11]; ne00==ne10 (K)
+        // GEMM C[M,N] = W[N,K] @ X[K,M]: M=ne11, N=ne01, K=ne00
+        if (ggml_cuda_mm_log_enabled()) {
+            fprintf(stderr, "[MUL_MAT_Q] M=%ld N=%ld K=%ld ne00=%ld ne01=%ld ne1=%ld ne11=%ld ne02=%ld ne12=%ld ne03=%ld ne13=%ld type=%d\n",
+                    ne11, ne01, ne00, ne00, ne01, ne1, ne11, ne02, ne12, ne03, ne13, src0->type);
+        }
+
         ggml_cuda_mul_mat_q_switch_type(ctx, args, stream);
         return;
     }
@@ -219,6 +228,12 @@ void ggml_cuda_mul_mat_q(
         ne03, ne13, s03, s13, s3,
         use_stream_k, ne12};
 
+    // Log kernel dimensions for profiling analysis (batched/MoE path, GGML_CUDA_MM_LOG=1).
+    if (ggml_cuda_mm_log_enabled()) {
+        fprintf(stderr, "[MUL_MAT_Q_MoE] M=%ld N=%ld K=%ld ne_get_rows=%ld ne00=%ld ne01=%ld ne02=%ld ne12=%ld type=%d\n",
+                ne11_flat, ne01, ne00, ne_get_rows, ne00, ne01, ne02, ne12, src0->type);
+    }
+
     ggml_cuda_mul_mat_q_switch_type(ctx, args, stream);
 }