Add just-in-time DEM slice stitching

[qciaran]

Summary

Adds the PECOS-native representation, extraction, assembly, and first production integrations for just-in-time detector error models:

• reusable, absolute-index-free DemSlice templates with checked temporal horizons
• deterministic physical-template caching with caller-owned cache keys
• instance-time detector placement and GF(2) routing for standard-output and tracked-Pauli columns
• structured DetectorErrorModel extraction that preserves independent sources, Y decompositions, arbitrary source-frame components, hyperedges, and correlated two-qubit sources
• ownership derived from existing DagFaultInfluenceMap locations and dem_slice_round DAG annotations
• stable detector streams derived from [x, y, round] coordinates
• bounded physical-template compilation and commit-plus-buffer stitching with checked hard/soft boundaries
• reusable Python template handles, checked coordinate placement, and per-round output-routing tables
• production bounded-cache providers for single-patch memory, repeated transversal H, and one matching-shape two-patch transversal CX
• full structured construction retained as the independent equivalence oracle and conservative fallback

This remains a draft because repeated CX and mixed-gate composition, the correct bounded mid-cycle fold-transversal SZ/SZdg circuit, broader multi-patch families, and the anti-snake logical-subgraph window decoder remain follow-ups.

Motivation and design

Windowed decoding should not regenerate and filter a global DEM for every window. Under a bounded detector-correlation horizon, constant-depth physical operation templates can be compiled once and instantiated using relative detector addresses.

Physical cache identity is separated from scheduling state. Geometry, orientation, boundary bases, noise parameters, and physical family select the cache entry; absolute rounds, patch labels, qubit offsets, coordinate placement, and logical-output routing live on instances.

Output routing is an explicit GF(2) transformation. One local column may fan out to several algorithm-wide columns, repeated destinations cancel by parity, and an empty row deliberately projects a local column away. Missing mappings remain errors. This is the algebra needed to pass cached sources through later Clifford frames.

DemSlice::from_detector_error_model requires explicit mappings for every D<n>, L<n>, and TP<n> identity. Location-selected extraction admits a physical source only when all its locations share the slice owner; partial or unattributed ownership fails loudly. Source components are checked to XOR to their complete effect.

For surface circuits, the round schedule is derived from metadata PECOS already carries. Detector streams are seeded from the earliest full syndrome round, preserving physical syndrome-bit order when initialization declares only a subset. Each physical fault location inherits its owner from its annotated DAG gate.

Production families

A three-SEC-round memory fixture supplies initialization, stationary bulk, pre-terminal, and terminal families. Requested depth is not part of the key.

Transversal-H boundaries add pre-gate bulk, pre-gate boundary, H plus first post-gate SEC, and post-gate bulk families. Repeated H composition has four possible states: physical X/Z swap parity before the selected boundary and logical H parity still to come. An optional earlier H in the bounded fixture establishes the former; an optional later H establishes the latter for backward observable propagation. Three SEC rounds isolate the selected boundary from both auxiliaries. Cache cardinality is therefore constant in algorithm length. The current surface frontend declares one final measured observable, so its checked instance routing row is identity while each family’s effective final basis carries the later-H parity.

The transversal-CX provider retains native correlated two-patch sources and translates the two canonical detector-stream partitions independently. Matching shapes in the common registered/memory/CX order are supported; mismatched shapes, shallow boundaries, and noncanonical ordering use the fallback.

The current standalone SZ/SZdg emitter is deliberately not cached. Its detector span grows with the preceding memory depth (observed spans 3, 5, and 9), violating the bounded-correlation requirement. The paper protocol instead embeds a fold-transversal S operation midway through a syndrome-extraction round; that physical S-SE circuit is a prerequisite to a sound provider.

This follows the slicing/stitching architecture in arXiv:2608.11719. The static-Tanner/prior-only optimization in arXiv:2608.25027 remains a possible fast path only when topology is actually unchanged.

Verification

• merged origin/dev at 9634becaf; the branch is currently 0 commits behind
• cargo test -p pecos-qec (816 unit tests: 810 passed, 6 expected ignored; all integration tests; 57 doc tests)
• exact byte-for-byte reconstruction of independent full DEMs for repeated measurements and surface memory
• exact memory equivalence across geometries, bases, labels, offsets, placements, depths, and noise keys
• exact H equivalence across one through six gates in local sweeps; committed two-, three-, and four-H coverage spans both orientations, both algorithm parities, and repeated family reuse
• exact algorithm-descriptor segmentation and warm-cache proof for repeated H; changing depths, labels, offsets, and placement performs no full-model compile
• exact single-CX equivalence across orientations, four boundary bases, independent placements, offsets, depths, and noise keys
• GF(2) fan-out, row parity, cross-row cancellation, projection, and invalid-routing coverage in Rust and Python
• fallback coverage for shallow boundaries, SZ/SZdg, and mismatched-shape CX
• exact minimum-buffer and source-halo correlation tests
• cargo clippy -p pecos-qec -p pecos-rslib --all-targets -- -D warnings
• cargo fmt --all -- --check
• 102 focused surface/JIT and logical-decoder Python tests after repeated-H integration
• Python lint/format checks, repository pre-commit hooks, just docs-build, and git diff --check

Follow-ups

• compose repeated CX boundaries using the checked GF(2) fan-out routing
• compose mixed H/CX schedules once their physical state-key transitions are explicit
• implement and verify the bounded mid-cycle fold-transversal S-SE circuit before caching SZ/SZdg
• add broader multi-patch and lattice-surgery template providers
• model one-round memory and shallow logical-gate boundary families explicitly
• support general detector-stream identity routing beyond coordinate placement
• enable the anti-snake logical-subgraph window decoder on structured segment models
• add a topology-stable prior-update fast path where applicable
• support local cache-weight refresh for drift/leakage estimates