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feat(qy): QY ops backend with FA and longctx MoE/RoPE kernels - #1002

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Ceng23333 wants to merge 3 commits into
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Ceng23333:feat/qy-backend
Open

Ceng23333 wants to merge 3 commits into
InfiniTensor:masterfrom
Ceng23333:feat/qy-backend

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@Ceng23333

@Ceng23333 Ceng23333 commented Oct 14, 2026 •

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Summary

  • Add QY (Denglin) native CUDA ops backend with linked FlashAttention (varlen + KV-cache) paths.
  • Add longctx MoE/RoPE QY kernels needed by MiniCPM5 FA/longctx/cudagraph stack (ITW release/2026.10.13-qy-minicpm5-16a3-fa-longctx-cudagraph).
  • Rebased onto current master; clang-format applied to touched C++ files.

Validation

  • Smoke build / pytest -m smoke (QY): not run in this environment (no QY/Denglin SDK on the PR host). Please maintainers with QY access run:
    python -m pip install .[dev] --no-build-isolation --no-deps \
      --config-settings=cmake.define.INFINI_RT_ROOT=/path/to/infini-rt-prefix \
      --config-settings=cmake.define.INFINI_OPS_SMOKE_BUILD=ON
    python -m pytest tests -m smoke -q
  • Full suite deferred pending QY platform access.
  • Integration-validated via InfiniTensorWorktree pin release/2026.10.13-qy-minicpm5-16a3-fa-longctx-cudagraph (MiniCPM5 longctx + CUDA graph capture fixes).

Related

  • Companion: InfiniRT QY device backend PR (same stack)
  • Downstream: InfiniCore submodule pin + InfiniLM MiniCPM5 FA/longctx PR onto refactor/adopt-modern-infini-stack

Made with Cursor

Stack PR index (merge order)

  1. InfiniOps: feat(qy): QY ops backend with FA and longctx MoE/RoPE kernels #1002
  2. InfiniRT: feat(qy): enable QY CUDA runtime device backend InfiniRT#49
  3. InfiniCCL: feat(qy): QY-compatible CPU device header fix InfiniCCL#77
  4. InfiniCore: chore(qy): pin InfiniRT/Ops/CCL for MiniCPM5 FA/longctx InfiniCore#1575
  5. InfiniLM: feat(qy): MiniCPM5 FA, longctx MoE/RoPE, CUDA-graph capture safety InfiniLM#597 → base refactor/adopt-modern-infini-stack

ITW pin: https://github.com/Ceng23333/InfiniTensorWorktree/tree/release/2026.10.13-qy-minicpm5-16a3-fa-longctx-cudagraph

Ceng23333 and others added 3 commits October 14, 2026 10:10
Enable Denglin/QY native and torch paths, linked flash-attn varlen/kvcache
providers via *_no_sinks, and reshape_and_cache_flash for paged caching.
Promote mul_scalar, silu_and_mul, moe_sum/align/topk_sigmoid, and rope/rope_pack kernels from the longctx adapting lane onto feat/qy-backend.
Co-authored-by: Cursor <cursoragent@cursor.com>
@Ceng23333

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QY required smoke (PR head)

  • Head SHA: ed0b40db75fc5fdb7e638401fb6bba657b372857
  • Host: Denglin QY, DENGLIN_DEVICES=3
  • Command: pytest tests/test_add.py tests/test_gemm.py --devices qy (m0 ops config build against InfiniRT PR head)
  • Result: PASS (1633 passed, 3 skipped)
  • Log: …/logs/prhead-verify/ops-pytest-add-gemm.log
1633 passed, 3 skipped in 18.51s

@Ceng23333

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QY required smoke (PR head) — detailed

  • Head SHA: ed0b40db75fc5fdb7e638401fb6bba657b372857
  • Host: Denglin QY, DENGLIN_DEVICES=3
  • Build: m0 ops config (add,gemm) vs InfiniRT PR head 95d30fe
  • Command: pytest tests/test_add.py tests/test_gemm.py --devices qy
  • Overall: PASS
  • Log: …/logs/prhead-verify/ops-pytest-add-gemm.log (+ per-file ops-pytest-per-file.log)
Suite Device Passed Skipped Failed Wall time
tests/test_add.py qy 133 3 0 1.32s
tests/test_gemm.py qy 1500 0 0 15.70s
Total (M0 bar) qy 1633 3 0 18.51s

Combined run: 1633 passed, 3 skipped in 18.51s.

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