Adding_subcircuits_ICs

library/SubcircuitLibrary/74HC165/74HC165.cir

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+.title KiCad schematic
+U1 Net-_U1-Pad1_ Net-_U1-Pad2_ d_inverter
+U4 Net-_U2-Pad15_ Net-_U3-Pad2_ d_inverter
+U8 Net-_U3-Pad3_ Net-_U8-Pad2_ Net-_U5-Pad1_ d_nand
+U5 Net-_U5-Pad1_ Net-_U5-Pad1_ Net-_U13-Pad2_ d_nand
+U9 Net-_U10-Pad2_ Net-_U8-Pad2_ d_inverter
+U3 Net-_U1-Pad2_ Net-_U3-Pad2_ Net-_U3-Pad3_ d_nand
+U10 Net-_U10-Pad1_ Net-_U10-Pad2_ d_inverter
+U2 Net-_U10-Pad1_ Net-_U1-Pad1_ Net-_U2-Pad3_ Net-_U2-Pad4_ Net-_U2-Pad5_ Net-_U2-Pad6_ Net-_U2-Pad7_ unconnected-_U2-Pad8_ Net-_U2-Pad9_ Net-_U2-Pad10_ Net-_U11-Pad1_ Net-_U17-Pad1_ Net-_U2-Pad13_ Net-_U2-Pad14_ Net-_U2-Pad15_ unconnected-_U2-Pad16_ PORT
+U16 Net-_U13-Pad5_ plot_v1
+U14 Net-_U14-Pad1_ Net-_U13-Pad4_ d_inverter
+U15 Net-_U10-Pad2_ Net-_U11-Pad3_ Net-_U14-Pad1_ d_nand
+U11 Net-_U11-Pad1_ Net-_U10-Pad2_ Net-_U11-Pad3_ d_nand
+U13 Net-_U13-Pad1_ Net-_U13-Pad2_ Net-_U12-Pad2_ Net-_U13-Pad4_ Net-_U13-Pad5_ unconnected-_U13-Pad6_ d_dff
+U12 Net-_U11-Pad3_ Net-_U12-Pad2_ d_inverter
+U22 Net-_U2-Pad13_ Net-_U10-Pad2_ Net-_U22-Pad3_ d_nand
+U17 Net-_U17-Pad1_ Net-_U10-Pad2_ Net-_U17-Pad3_ d_nand
+U24 Net-_U19-Pad5_ Net-_U13-Pad2_ Net-_U23-Pad2_ Net-_U24-Pad4_ Net-_U24-Pad5_ unconnected-_U24-Pad6_ d_dff
+U26 Net-_U10-Pad2_ Net-_U22-Pad3_ Net-_U25-Pad1_ d_nand
+U25 Net-_U25-Pad1_ Net-_U24-Pad4_ d_inverter
+U21 Net-_U10-Pad2_ Net-_U17-Pad3_ Net-_U20-Pad1_ d_nand
+U20 Net-_U20-Pad1_ Net-_U19-Pad4_ d_inverter
+U19 Net-_U13-Pad5_ Net-_U13-Pad2_ Net-_U18-Pad2_ Net-_U19-Pad4_ Net-_U19-Pad5_ unconnected-_U19-Pad6_ d_dff
+U23 Net-_U22-Pad3_ Net-_U23-Pad2_ d_inverter
+U18 Net-_U17-Pad3_ Net-_U18-Pad2_ d_inverter
+U7 Net-_U6-Pad2_ Net-_U13-Pad1_ d_inverter
+U6 Net-_U2-Pad10_ Net-_U6-Pad2_ d_inverter
+U35 Net-_U35-Pad1_ Net-_U34-Pad4_ d_inverter
+U36 Net-_U10-Pad2_ Net-_U32-Pad3_ Net-_U35-Pad1_ d_nand
+U29 Net-_U24-Pad5_ Net-_U13-Pad2_ Net-_U28-Pad2_ Net-_U29-Pad4_ Net-_U29-Pad5_ unconnected-_U29-Pad6_ d_dff
+U28 Net-_U27-Pad3_ Net-_U28-Pad2_ d_inverter
+U30 Net-_U30-Pad1_ Net-_U29-Pad4_ d_inverter
+U31 Net-_U10-Pad2_ Net-_U27-Pad3_ Net-_U30-Pad1_ d_nand
+U34 Net-_U29-Pad5_ Net-_U13-Pad2_ Net-_U33-Pad2_ Net-_U34-Pad4_ Net-_U34-Pad5_ unconnected-_U34-Pad6_ d_dff
+U33 Net-_U32-Pad3_ Net-_U33-Pad2_ d_inverter
+U37 Net-_U2-Pad4_ Net-_U10-Pad2_ Net-_U37-Pad3_ d_nand
+U27 Net-_U2-Pad14_ Net-_U10-Pad2_ Net-_U27-Pad3_ d_nand
+U32 Net-_U2-Pad3_ Net-_U10-Pad2_ Net-_U32-Pad3_ d_nand
+U47 Net-_U2-Pad6_ Net-_U10-Pad2_ Net-_U47-Pad3_ d_nand
+U42 Net-_U2-Pad5_ Net-_U10-Pad2_ Net-_U42-Pad3_ d_nand
+U50 Net-_U50-Pad1_ Net-_U49-Pad4_ d_inverter
+U51 Net-_U10-Pad2_ Net-_U47-Pad3_ Net-_U50-Pad1_ d_nand
+U48 Net-_U47-Pad3_ Net-_U48-Pad2_ d_inverter
+U49 Net-_U44-Pad5_ Net-_U13-Pad2_ Net-_U48-Pad2_ Net-_U49-Pad4_ Net-_U2-Pad9_ Net-_U2-Pad7_ d_dff
+U45 Net-_U45-Pad1_ Net-_U44-Pad4_ d_inverter
+U44 Net-_U39-Pad5_ Net-_U13-Pad2_ Net-_U43-Pad2_ Net-_U44-Pad4_ Net-_U44-Pad5_ unconnected-_U44-Pad6_ d_dff
+U43 Net-_U42-Pad3_ Net-_U43-Pad2_ d_inverter
+U46 Net-_U10-Pad2_ Net-_U42-Pad3_ Net-_U45-Pad1_ d_nand
+U41 Net-_U10-Pad2_ Net-_U37-Pad3_ Net-_U40-Pad1_ d_nand
+U40 Net-_U40-Pad1_ Net-_U39-Pad4_ d_inverter
+U39 Net-_U34-Pad5_ Net-_U13-Pad2_ Net-_U38-Pad2_ Net-_U39-Pad4_ Net-_U39-Pad5_ unconnected-_U39-Pad6_ d_dff
+U38 Net-_U37-Pad3_ Net-_U38-Pad2_ d_inverter
+.end

library/SubcircuitLibrary/74HC165/74HC165.cir.out

@@ -0,0 +1,210 @@
+.title kicad schematic
+
+* u1 net-_u1-pad1_ net-_u1-pad2_ d_inverter
+* u4 net-_u2-pad15_ net-_u3-pad2_ d_inverter
+* u8 net-_u3-pad3_ net-_u8-pad2_ net-_u5-pad1_ d_nand
+* u5 net-_u5-pad1_ net-_u5-pad1_ net-_u13-pad2_ d_nand
+* u9 net-_u10-pad2_ net-_u8-pad2_ d_inverter
+* u3 net-_u1-pad2_ net-_u3-pad2_ net-_u3-pad3_ d_nand
+* u10 net-_u10-pad1_ net-_u10-pad2_ d_inverter
+* u2 net-_u10-pad1_ net-_u1-pad1_ net-_u2-pad3_ net-_u2-pad4_ net-_u2-pad5_ net-_u2-pad6_ net-_u2-pad7_ unconnected-_u2-pad8_ net-_u2-pad9_ net-_u2-pad10_ net-_u11-pad1_ net-_u17-pad1_ net-_u2-pad13_ net-_u2-pad14_ net-_u2-pad15_ unconnected-_u2-pad16_ port
+* u16 net-_u13-pad5_ plot_v1
+* u14 net-_u14-pad1_ net-_u13-pad4_ d_inverter
+* u15 net-_u10-pad2_ net-_u11-pad3_ net-_u14-pad1_ d_nand
+* u11 net-_u11-pad1_ net-_u10-pad2_ net-_u11-pad3_ d_nand
+* u13 net-_u13-pad1_ net-_u13-pad2_ net-_u12-pad2_ net-_u13-pad4_ net-_u13-pad5_ unconnected-_u13-pad6_ d_dff
+* u12 net-_u11-pad3_ net-_u12-pad2_ d_inverter
+* u22 net-_u2-pad13_ net-_u10-pad2_ net-_u22-pad3_ d_nand
+* u17 net-_u17-pad1_ net-_u10-pad2_ net-_u17-pad3_ d_nand
+* u24 net-_u19-pad5_ net-_u13-pad2_ net-_u23-pad2_ net-_u24-pad4_ net-_u24-pad5_ unconnected-_u24-pad6_ d_dff
+* u26 net-_u10-pad2_ net-_u22-pad3_ net-_u25-pad1_ d_nand
+* u25 net-_u25-pad1_ net-_u24-pad4_ d_inverter
+* u21 net-_u10-pad2_ net-_u17-pad3_ net-_u20-pad1_ d_nand
+* u20 net-_u20-pad1_ net-_u19-pad4_ d_inverter
+* u19 net-_u13-pad5_ net-_u13-pad2_ net-_u18-pad2_ net-_u19-pad4_ net-_u19-pad5_ unconnected-_u19-pad6_ d_dff
+* u23 net-_u22-pad3_ net-_u23-pad2_ d_inverter
+* u18 net-_u17-pad3_ net-_u18-pad2_ d_inverter
+* u7 net-_u6-pad2_ net-_u13-pad1_ d_inverter
+* u6 net-_u2-pad10_ net-_u6-pad2_ d_inverter
+* u35 net-_u35-pad1_ net-_u34-pad4_ d_inverter
+* u36 net-_u10-pad2_ net-_u32-pad3_ net-_u35-pad1_ d_nand
+* u29 net-_u24-pad5_ net-_u13-pad2_ net-_u28-pad2_ net-_u29-pad4_ net-_u29-pad5_ unconnected-_u29-pad6_ d_dff
+* u28 net-_u27-pad3_ net-_u28-pad2_ d_inverter
+* u30 net-_u30-pad1_ net-_u29-pad4_ d_inverter
+* u31 net-_u10-pad2_ net-_u27-pad3_ net-_u30-pad1_ d_nand
+* u34 net-_u29-pad5_ net-_u13-pad2_ net-_u33-pad2_ net-_u34-pad4_ net-_u34-pad5_ unconnected-_u34-pad6_ d_dff
+* u33 net-_u32-pad3_ net-_u33-pad2_ d_inverter
+* u37 net-_u2-pad4_ net-_u10-pad2_ net-_u37-pad3_ d_nand
+* u27 net-_u2-pad14_ net-_u10-pad2_ net-_u27-pad3_ d_nand
+* u32 net-_u2-pad3_ net-_u10-pad2_ net-_u32-pad3_ d_nand
+* u47 net-_u2-pad6_ net-_u10-pad2_ net-_u47-pad3_ d_nand
+* u42 net-_u2-pad5_ net-_u10-pad2_ net-_u42-pad3_ d_nand
+* u50 net-_u50-pad1_ net-_u49-pad4_ d_inverter
+* u51 net-_u10-pad2_ net-_u47-pad3_ net-_u50-pad1_ d_nand
+* u48 net-_u47-pad3_ net-_u48-pad2_ d_inverter
+* u49 net-_u44-pad5_ net-_u13-pad2_ net-_u48-pad2_ net-_u49-pad4_ net-_u2-pad9_ net-_u2-pad7_ d_dff
+* u45 net-_u45-pad1_ net-_u44-pad4_ d_inverter
+* u44 net-_u39-pad5_ net-_u13-pad2_ net-_u43-pad2_ net-_u44-pad4_ net-_u44-pad5_ unconnected-_u44-pad6_ d_dff
+* u43 net-_u42-pad3_ net-_u43-pad2_ d_inverter
+* u46 net-_u10-pad2_ net-_u42-pad3_ net-_u45-pad1_ d_nand
+* u41 net-_u10-pad2_ net-_u37-pad3_ net-_u40-pad1_ d_nand
+* u40 net-_u40-pad1_ net-_u39-pad4_ d_inverter
+* u39 net-_u34-pad5_ net-_u13-pad2_ net-_u38-pad2_ net-_u39-pad4_ net-_u39-pad5_ unconnected-_u39-pad6_ d_dff
+* u38 net-_u37-pad3_ net-_u38-pad2_ d_inverter
+a1 net-_u1-pad1_ net-_u1-pad2_ u1
+a2 net-_u2-pad15_ net-_u3-pad2_ u4
+a3 [net-_u3-pad3_ net-_u8-pad2_ ] net-_u5-pad1_ u8
+a4 [net-_u5-pad1_ net-_u5-pad1_ ] net-_u13-pad2_ u5
+a5 net-_u10-pad2_ net-_u8-pad2_ u9
+a6 [net-_u1-pad2_ net-_u3-pad2_ ] net-_u3-pad3_ u3
+a7 net-_u10-pad1_ net-_u10-pad2_ u10
+a8 net-_u14-pad1_ net-_u13-pad4_ u14
+a9 [net-_u10-pad2_ net-_u11-pad3_ ] net-_u14-pad1_ u15
+a10 [net-_u11-pad1_ net-_u10-pad2_ ] net-_u11-pad3_ u11
+a11 net-_u13-pad1_ net-_u13-pad2_ net-_u12-pad2_ net-_u13-pad4_ net-_u13-pad5_ unconnected-_u13-pad6_ u13
+a12 net-_u11-pad3_ net-_u12-pad2_ u12
+a13 [net-_u2-pad13_ net-_u10-pad2_ ] net-_u22-pad3_ u22
+a14 [net-_u17-pad1_ net-_u10-pad2_ ] net-_u17-pad3_ u17
+a15 net-_u19-pad5_ net-_u13-pad2_ net-_u23-pad2_ net-_u24-pad4_ net-_u24-pad5_ unconnected-_u24-pad6_ u24
+a16 [net-_u10-pad2_ net-_u22-pad3_ ] net-_u25-pad1_ u26
+a17 net-_u25-pad1_ net-_u24-pad4_ u25
+a18 [net-_u10-pad2_ net-_u17-pad3_ ] net-_u20-pad1_ u21
+a19 net-_u20-pad1_ net-_u19-pad4_ u20
+a20 net-_u13-pad5_ net-_u13-pad2_ net-_u18-pad2_ net-_u19-pad4_ net-_u19-pad5_ unconnected-_u19-pad6_ u19
+a21 net-_u22-pad3_ net-_u23-pad2_ u23
+a22 net-_u17-pad3_ net-_u18-pad2_ u18
+a23 net-_u6-pad2_ net-_u13-pad1_ u7
+a24 net-_u2-pad10_ net-_u6-pad2_ u6
+a25 net-_u35-pad1_ net-_u34-pad4_ u35
+a26 [net-_u10-pad2_ net-_u32-pad3_ ] net-_u35-pad1_ u36
+a27 net-_u24-pad5_ net-_u13-pad2_ net-_u28-pad2_ net-_u29-pad4_ net-_u29-pad5_ unconnected-_u29-pad6_ u29
+a28 net-_u27-pad3_ net-_u28-pad2_ u28
+a29 net-_u30-pad1_ net-_u29-pad4_ u30
+a30 [net-_u10-pad2_ net-_u27-pad3_ ] net-_u30-pad1_ u31
+a31 net-_u29-pad5_ net-_u13-pad2_ net-_u33-pad2_ net-_u34-pad4_ net-_u34-pad5_ unconnected-_u34-pad6_ u34
+a32 net-_u32-pad3_ net-_u33-pad2_ u33
+a33 [net-_u2-pad4_ net-_u10-pad2_ ] net-_u37-pad3_ u37
+a34 [net-_u2-pad14_ net-_u10-pad2_ ] net-_u27-pad3_ u27
+a35 [net-_u2-pad3_ net-_u10-pad2_ ] net-_u32-pad3_ u32
+a36 [net-_u2-pad6_ net-_u10-pad2_ ] net-_u47-pad3_ u47
+a37 [net-_u2-pad5_ net-_u10-pad2_ ] net-_u42-pad3_ u42
+a38 net-_u50-pad1_ net-_u49-pad4_ u50
+a39 [net-_u10-pad2_ net-_u47-pad3_ ] net-_u50-pad1_ u51
+a40 net-_u47-pad3_ net-_u48-pad2_ u48
+a41 net-_u44-pad5_ net-_u13-pad2_ net-_u48-pad2_ net-_u49-pad4_ net-_u2-pad9_ net-_u2-pad7_ u49
+a42 net-_u45-pad1_ net-_u44-pad4_ u45
+a43 net-_u39-pad5_ net-_u13-pad2_ net-_u43-pad2_ net-_u44-pad4_ net-_u44-pad5_ unconnected-_u44-pad6_ u44
+a44 net-_u42-pad3_ net-_u43-pad2_ u43
+a45 [net-_u10-pad2_ net-_u42-pad3_ ] net-_u45-pad1_ u46
+a46 [net-_u10-pad2_ net-_u37-pad3_ ] net-_u40-pad1_ u41
+a47 net-_u40-pad1_ net-_u39-pad4_ u40
+a48 net-_u34-pad5_ net-_u13-pad2_ net-_u38-pad2_ net-_u39-pad4_ net-_u39-pad5_ unconnected-_u39-pad6_ u39
+a49 net-_u37-pad3_ net-_u38-pad2_ u38
+* Schematic Name:                             d_inverter, Ngspice Name: d_inverter
+.model u1 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) 
+* Schematic Name:                             d_inverter, Ngspice Name: d_inverter
+.model u4 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) 
+* Schematic Name:                             d_nand, Ngspice Name: d_nand
+.model u8 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) 
+* Schematic Name:                             d_nand, Ngspice Name: d_nand
+.model u5 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) 
+* Schematic Name:                             d_inverter, Ngspice Name: d_inverter
+.model u9 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) 
+* Schematic Name:                             d_nand, Ngspice Name: d_nand
+.model u3 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) 
+* Schematic Name:                             d_inverter, Ngspice Name: d_inverter
+.model u10 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) 
+* Schematic Name:                             d_inverter, Ngspice Name: d_inverter
+.model u14 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) 
+* Schematic Name:                             d_nand, Ngspice Name: d_nand
+.model u15 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) 
+* Schematic Name:                             d_nand, Ngspice Name: d_nand
+.model u11 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) 
+* Schematic Name:                             d_dff, Ngspice Name: d_dff
+.model u13 d_dff(clk_delay=1.0e-9 set_delay=1.0e-9 reset_delay=1.0 ic=0 data_load=1.0e-12 clk_load=1.0e-12 set_load=1.0e-12 reset_load=1.0e-12 rise_delay=1.0e-9 fall_delay=1.0e-9 ) 
+* Schematic Name:                             d_inverter, Ngspice Name: d_inverter
+.model u12 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) 
+* Schematic Name:                             d_nand, Ngspice Name: d_nand
+.model u22 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) 
+* Schematic Name:                             d_nand, Ngspice Name: d_nand
+.model u17 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) 
+* Schematic Name:                             d_dff, Ngspice Name: d_dff
+.model u24 d_dff(clk_delay=1.0e-9 set_delay=1.0e-9 reset_delay=1.0 ic=0 data_load=1.0e-12 clk_load=1.0e-12 set_load=1.0e-12 reset_load=1.0e-12 rise_delay=1.0e-9 fall_delay=1.0e-9 ) 
+* Schematic Name:                             d_nand, Ngspice Name: d_nand
+.model u26 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) 
+* Schematic Name:                             d_inverter, Ngspice Name: d_inverter
+.model u25 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) 
+* Schematic Name:                             d_nand, Ngspice Name: d_nand
+.model u21 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) 
+* Schematic Name:                             d_inverter, Ngspice Name: d_inverter
+.model u20 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) 
+* Schematic Name:                             d_dff, Ngspice Name: d_dff
+.model u19 d_dff(clk_delay=1.0e-9 set_delay=1.0e-9 reset_delay=1.0 ic=0 data_load=1.0e-12 clk_load=1.0e-12 set_load=1.0e-12 reset_load=1.0e-12 rise_delay=1.0e-9 fall_delay=1.0e-9 ) 
+* Schematic Name:                             d_inverter, Ngspice Name: d_inverter
+.model u23 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) 
+* Schematic Name:                             d_inverter, Ngspice Name: d_inverter
+.model u18 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) 
+* Schematic Name:                             d_inverter, Ngspice Name: d_inverter
+.model u7 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) 
+* Schematic Name:                             d_inverter, Ngspice Name: d_inverter
+.model u6 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) 
+* Schematic Name:                             d_inverter, Ngspice Name: d_inverter
+.model u35 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) 
+* Schematic Name:                             d_nand, Ngspice Name: d_nand
+.model u36 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) 
+* Schematic Name:                             d_dff, Ngspice Name: d_dff
+.model u29 d_dff(clk_delay=1.0e-9 set_delay=1.0e-9 reset_delay=1.0 ic=0 data_load=1.0e-12 clk_load=1.0e-12 set_load=1.0e-12 reset_load=1.0e-12 rise_delay=1.0e-9 fall_delay=1.0e-9 ) 
+* Schematic Name:                             d_inverter, Ngspice Name: d_inverter
+.model u28 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) 
+* Schematic Name:                             d_inverter, Ngspice Name: d_inverter
+.model u30 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) 
+* Schematic Name:                             d_nand, Ngspice Name: d_nand
+.model u31 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) 
+* Schematic Name:                             d_dff, Ngspice Name: d_dff
+.model u34 d_dff(clk_delay=1.0e-9 set_delay=1.0e-9 reset_delay=1.0 ic=0 data_load=1.0e-12 clk_load=1.0e-12 set_load=1.0e-12 reset_load=1.0e-12 rise_delay=1.0e-9 fall_delay=1.0e-9 ) 
+* Schematic Name:                             d_inverter, Ngspice Name: d_inverter
+.model u33 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) 
+* Schematic Name:                             d_nand, Ngspice Name: d_nand
+.model u37 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) 
+* Schematic Name:                             d_nand, Ngspice Name: d_nand
+.model u27 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) 
+* Schematic Name:                             d_nand, Ngspice Name: d_nand
+.model u32 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) 
+* Schematic Name:                             d_nand, Ngspice Name: d_nand
+.model u47 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) 
+* Schematic Name:                             d_nand, Ngspice Name: d_nand
+.model u42 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) 
+* Schematic Name:                             d_inverter, Ngspice Name: d_inverter
+.model u50 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) 
+* Schematic Name:                             d_nand, Ngspice Name: d_nand
+.model u51 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) 
+* Schematic Name:                             d_inverter, Ngspice Name: d_inverter
+.model u48 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) 
+* Schematic Name:                             d_dff, Ngspice Name: d_dff
+.model u49 d_dff(clk_delay=1.0e-9 set_delay=1.0e-9 reset_delay=1.0 ic=0 data_load=1.0e-12 clk_load=1.0e-12 set_load=1.0e-12 reset_load=1.0e-12 rise_delay=1.0e-9 fall_delay=1.0e-9 ) 
+* Schematic Name:                             d_inverter, Ngspice Name: d_inverter
+.model u45 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) 
+* Schematic Name:                             d_dff, Ngspice Name: d_dff
+.model u44 d_dff(clk_delay=1.0e-9 set_delay=1.0e-9 reset_delay=1.0 ic=0 data_load=1.0e-12 clk_load=1.0e-12 set_load=1.0e-12 reset_load=1.0e-12 rise_delay=1.0e-9 fall_delay=1.0e-9 ) 
+* Schematic Name:                             d_inverter, Ngspice Name: d_inverter
+.model u43 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) 
+* Schematic Name:                             d_nand, Ngspice Name: d_nand
+.model u46 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) 
+* Schematic Name:                             d_nand, Ngspice Name: d_nand
+.model u41 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) 
+* Schematic Name:                             d_inverter, Ngspice Name: d_inverter
+.model u40 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) 
+* Schematic Name:                             d_dff, Ngspice Name: d_dff
+.model u39 d_dff(clk_delay=1.0e-9 set_delay=1.0e-9 reset_delay=1.0 ic=0 data_load=1.0e-12 clk_load=1.0e-12 set_load=1.0e-12 reset_load=1.0e-12 rise_delay=1.0e-9 fall_delay=1.0e-9 ) 
+* Schematic Name:                             d_inverter, Ngspice Name: d_inverter
+.model u38 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) 
+.tran 0e-00 0e-00 0e-00
+
+* Control Statements 
+.control
+run
+print allv > plot_data_v.txt
+print alli > plot_data_i.txt
+plot v(net-_u13-pad5_)
+.endc
+.end