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TonyHan11nashif
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boards: microchip: sam: add CAN to sama7g54_ek dts and yaml file
There's a dual CAN interfce (J17) on sama7g54-ek board. pin 1~5 siginal: CAN0_H, CAN0_L, GND, CAN1_H, CAN1_L. The two CAN transceivers are controlled by PIOC15 and PIOC16 GPIOs. Add CAN to the support list. Signed-off-by: Tony Han <tony.han@microchip.com>
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boards/microchip/sam/sama7g54_ek/sama7g54_ek.dts

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@@ -29,6 +29,7 @@
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chosen {
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zephyr,sram = &ddram;
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zephyr,canbus = &mcan0;
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zephyr,console = &usart3;
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zephyr,entropy = &trng;
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zephyr,shell-uart = &usart3;
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pwms = <&pwm 3 PWM_MSEC(20) PWM_POLARITY_INVERTED>;
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};
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};
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transceiver0: can-phy0 {
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compatible = "can-transceiver-gpio";
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standby-gpios = <&pioc 15 GPIO_ACTIVE_HIGH>;
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max-bitrate = <DT_FREQ_M(8)>;
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#phy-cells = <0>;
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};
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transceiver1: can-phy1 {
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compatible = "can-transceiver-gpio";
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standby-gpios = <&pioc 16 GPIO_ACTIVE_HIGH>;
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max-bitrate = <DT_FREQ_M(8)>;
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#phy-cells = <0>;
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};
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};
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&dma0 {
@@ -195,7 +210,37 @@
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};
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};
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&mcan0 {
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status = "okay";
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pinctrl-0 = <&pinctrl_can0_default>;
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pinctrl-names = "default";
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phys = <&transceiver0>;
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};
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&mcan1 {
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status = "okay";
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pinctrl-0 = <&pinctrl_can1_default>;
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pinctrl-names = "default";
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phys = <&transceiver1>;
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};
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&pinctrl {
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pinctrl_can0_default: can0_default {
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group1 {
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pinmux = <PIN_PD12__CANTX0>,
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<PIN_PD13__CANRX0>;
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bias-disable;
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};
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};
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pinctrl_can1_default: can1_default {
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group1 {
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pinmux = <PIN_PD14__CANTX1>,
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<PIN_PD15__CANRX1>;
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bias-disable;
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};
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};
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pinctrl_flx3_default: flx3_default {
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group1 {
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pinmux = <PIN_PD16__FLEXCOM3_IO0>,

boards/microchip/sam/sama7g54_ek/sama7g54_ek.yaml

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@@ -9,6 +9,7 @@ toolchain:
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- zephyr
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ram: 128
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supported:
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- can
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- dma
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- entropy
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- pwm

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