From 151d878e5626c85c466ba188c7ab57f831982f71 Mon Sep 17 00:00:00 2001 From: Soheil Shahrouz Date: Tue, 4 Nov 2025 14:47:01 -0500 Subject: [PATCH 01/10] remove unused hash functor --- vpr/src/base/vpr_context.h | 32 +++++++++----------------------- 1 file changed, 9 insertions(+), 23 deletions(-) diff --git a/vpr/src/base/vpr_context.h b/vpr/src/base/vpr_context.h index 28f5a86989..051e109b4b 100644 --- a/vpr/src/base/vpr_context.h +++ b/vpr/src/base/vpr_context.h @@ -44,7 +44,7 @@ class SetupHoldTimingInfo; class PostClusterDelayCalculator; -#endif /* NO_SERVER */ +#endif // NO_SERVER struct t_rr_node_route_inf; @@ -143,22 +143,10 @@ struct TimingContext : public Context { t_timing_analysis_profile_info stats; - /* Represents whether or not VPR should fail if timing constraints aren't met. */ + /// Represents whether VPR should fail if timing constraints aren't met. bool terminate_if_timing_fails = false; }; -namespace std { -template<> -struct hash> { - std::size_t operator()(const std::tuple& ok) const noexcept { - std::size_t seed = std::hash{}(std::get<0>(ok)); - vtr::hash_combine(seed, std::get<1>(ok)); - vtr::hash_combine(seed, std::get<2>(ok)); - return seed; - } -}; -} // namespace std - /** * @brief State relating the device * @@ -200,11 +188,9 @@ struct DeviceContext : public Context { std::vector physical_tile_types; std::vector logical_block_types; - /* - * Keep which layer in multi-die FPGA require inter-cluster programmable routing resources [0..number_of_layers-1] - * If a layer doesn't require inter-cluster programmable routing resources, - * RRGraph generation will ignore building SBs and CBs for that specific layer. - */ + /// Keep which layer in multi-die FPGA require inter-cluster programmable routing resources [0..number_of_layers-1] + /// If a layer doesn't require inter-cluster programmable routing resources, + /// RRGraph generation will ignore building SBs and CBs for that specific layer. std::vector inter_cluster_prog_routing_resources; /** @@ -373,7 +359,7 @@ struct ClusteringContext : public Context { /** * @brief State relating to packing multithreading * - * This contain data structures to synchronize multithreading of packing iterative improvement. + * This contains data structures to synchronize multithreading of packing iterative improvement. */ struct PackingMultithreadingContext : public Context { vtr::vector clb_in_flight; @@ -770,7 +756,7 @@ struct ServerContext : public Context { */ std::shared_ptr routing_delay_calc; }; -#endif /* NO_SERVER */ +#endif // NO_SERVER /** * @brief This object encapsulates VPR's state. @@ -855,7 +841,7 @@ class VprContext : public Context { #ifndef NO_SERVER const ServerContext& server() const { return server_; } ServerContext& mutable_server() { return server_; } -#endif /* NO_SERVER */ +#endif // NO_SERVER private: DeviceContext device_; @@ -873,7 +859,7 @@ class VprContext : public Context { #ifndef NO_SERVER ServerContext server_; -#endif /* NO_SERVER */ +#endif // NO_SERVER PackingMultithreadingContext packing_multithreading_; }; From 037f1b5b553f762a3d6f37545244b47963762fca Mon Sep 17 00:00:00 2001 From: Soheil Shahrouz Date: Tue, 4 Nov 2025 14:47:40 -0500 Subject: [PATCH 02/10] make format --- libs/libarchfpga/src/arch_util.cpp | 2 +- .../rr_graph_generation/build_scatter_gathers.cpp | 8 +++++--- .../rr_graph_generation/build_scatter_gathers.h | 14 ++++++++------ vpr/src/route/rr_graph_generation/rr_graph.cpp | 2 +- .../route/rr_graph_generation/rr_node_indices.cpp | 2 +- 5 files changed, 16 insertions(+), 12 deletions(-) diff --git a/libs/libarchfpga/src/arch_util.cpp b/libs/libarchfpga/src/arch_util.cpp index 1dd153b7fd..eaf067258e 100644 --- a/libs/libarchfpga/src/arch_util.cpp +++ b/libs/libarchfpga/src/arch_util.cpp @@ -545,7 +545,7 @@ void ProcessLutClass(t_pb_type* lut_pb_type) { for (size_t i = 0; i < num_annotations; i++) { lut_pb_type->modes[0].interconnect[0].annotations[i].clock = lut_pb_type->annotations[i].clock; lut_pb_type->modes[0].interconnect[0].annotations[i].input_pins = lut_pb_type->annotations[i].input_pins; - lut_pb_type->modes[0].interconnect[0].annotations[i].output_pins =lut_pb_type->annotations[i].output_pins; + lut_pb_type->modes[0].interconnect[0].annotations[i].output_pins = lut_pb_type->annotations[i].output_pins; lut_pb_type->modes[0].interconnect[0].annotations[i].line_num = lut_pb_type->annotations[i].line_num; lut_pb_type->modes[0].interconnect[0].annotations[i].format = lut_pb_type->annotations[i].format; lut_pb_type->modes[0].interconnect[0].annotations[i].type = lut_pb_type->annotations[i].type; diff --git a/vpr/src/route/rr_graph_generation/build_scatter_gathers.cpp b/vpr/src/route/rr_graph_generation/build_scatter_gathers.cpp index 9b63e0a910..b317c9c635 100644 --- a/vpr/src/route/rr_graph_generation/build_scatter_gathers.cpp +++ b/vpr/src/route/rr_graph_generation/build_scatter_gathers.cpp @@ -399,8 +399,10 @@ void convert_interposer_cuts_to_sg_patterns(const std::vector& inte void compute_non_3d_sg_link_geometry(const t_physical_tile_loc& src_loc, const t_physical_tile_loc& dst_loc, e_rr_type& chan_type, - int& xlow, int& xhigh, - int& ylow, int& yhigh, + int& xlow, + int& xhigh, + int& ylow, + int& yhigh, Direction& direction) { VTR_ASSERT_SAFE(src_loc.layer_num == dst_loc.layer_num); @@ -431,4 +433,4 @@ void compute_non_3d_sg_link_geometry(const t_physical_tile_loc& src_loc, } else { VTR_ASSERT_MSG(false, "Source and destination locations cannot be identical"); } -} \ No newline at end of file +} diff --git a/vpr/src/route/rr_graph_generation/build_scatter_gathers.h b/vpr/src/route/rr_graph_generation/build_scatter_gathers.h index b4b087f073..4cafd53aec 100644 --- a/vpr/src/route/rr_graph_generation/build_scatter_gathers.h +++ b/vpr/src/route/rr_graph_generation/build_scatter_gathers.h @@ -78,12 +78,14 @@ void convert_interposer_cuts_to_sg_patterns(const std::vector& inte std::vector& sg_patterns); /** -* @brief Computes the channel type, direction, and coordinate span between two locations -* on the same layer. Used by SG link construction routines to determine geometry. -*/ + * @brief Computes the channel type, direction, and coordinate span between two locations + * on the same layer. Used by SG link construction routines to determine geometry. + */ void compute_non_3d_sg_link_geometry(const t_physical_tile_loc& src_loc, const t_physical_tile_loc& dst_loc, e_rr_type& chan_type, - int& xlow, int& xhigh, - int& ylow, int& yhigh, - Direction& direction); \ No newline at end of file + int& xlow, + int& xhigh, + int& ylow, + int& yhigh, + Direction& direction); diff --git a/vpr/src/route/rr_graph_generation/rr_graph.cpp b/vpr/src/route/rr_graph_generation/rr_graph.cpp index d53bff000e..05b972646e 100644 --- a/vpr/src/route/rr_graph_generation/rr_graph.cpp +++ b/vpr/src/route/rr_graph_generation/rr_graph.cpp @@ -2082,7 +2082,7 @@ static void add_and_connect_non_3d_sg_links(RRGraphBuilder& rr_graph_builder, // SG links are confined to one layer (non-3D), but can run in X or Y. VTR_ASSERT_SAFE(src_loc.layer_num == dst_loc.layer_num); const int layer = src_loc.layer_num; - compute_non_3d_sg_link_geometry(src_loc, dst_loc, chan_type, xlow, xhigh, ylow, yhigh,direction); + compute_non_3d_sg_link_geometry(src_loc, dst_loc, chan_type, xlow, xhigh, ylow, yhigh, direction); // Retrieve the node ID and track number allocated earlier const RRNodeId node_id = sg_node_indices[i].first; diff --git a/vpr/src/route/rr_graph_generation/rr_node_indices.cpp b/vpr/src/route/rr_graph_generation/rr_node_indices.cpp index 8aa8a37592..3932fefd1e 100644 --- a/vpr/src/route/rr_graph_generation/rr_node_indices.cpp +++ b/vpr/src/route/rr_graph_generation/rr_node_indices.cpp @@ -386,7 +386,7 @@ std::vector> alloc_and_load_non_3d_sg_pattern_rr_node_i // Step 1: Determine the channel type (CHANX/CHANY) and span coordinates const int layer = src_loc.layer_num; - compute_non_3d_sg_link_geometry(src_loc, dst_loc, chan_type, xlow, xhigh, ylow, yhigh,direction); + compute_non_3d_sg_link_geometry(src_loc, dst_loc, chan_type, xlow, xhigh, ylow, yhigh, direction); // Select the appropriate ptc matrix for this channel type vtr::NdMatrix& ptc_matrix = (chan_type == e_rr_type::CHANX) ? chanx_ptc : chany_ptc; From edbb9f4402d98e243d8254fa8fd8b2293854327a Mon Sep 17 00:00:00 2001 From: Soheil Shahrouz Date: Tue, 4 Nov 2025 15:05:48 -0500 Subject: [PATCH 03/10] some cleanups --- libs/libarchfpga/src/physical_types_util.cpp | 47 +++++++++---------- libs/librrgraph/src/base/rr_graph_utils.cpp | 6 +-- .../build_switchblocks.cpp | 2 +- vpr/src/util/vpr_utils.cpp | 31 ++++++------ 4 files changed, 39 insertions(+), 47 deletions(-) diff --git a/libs/libarchfpga/src/physical_types_util.cpp b/libs/libarchfpga/src/physical_types_util.cpp index 3792a8a046..39bafa5e1f 100644 --- a/libs/libarchfpga/src/physical_types_util.cpp +++ b/libs/libarchfpga/src/physical_types_util.cpp @@ -236,10 +236,9 @@ static int get_logical_block_physical_pin_num_offset(t_physical_tile_type_ptr ph const t_sub_tile* curr_sub_tile, t_logical_block_type_ptr curr_logical_block, const int curr_relative_cap) { - int offset; - offset = get_sub_tile_inst_physical_pin_num_offset(physical_tile, curr_sub_tile, curr_relative_cap); + int offset = get_sub_tile_inst_physical_pin_num_offset(physical_tile, curr_sub_tile, curr_relative_cap); - for (auto eq_site : curr_sub_tile->equivalent_sites) { + for (t_logical_block_type_ptr eq_site : curr_sub_tile->equivalent_sites) { if (eq_site == curr_logical_block) break; offset += (int)eq_site->pin_logical_num_to_pb_pin_mapping.size(); @@ -255,13 +254,11 @@ static int get_pin_logical_num_from_pin_physical_num(t_physical_tile_type_ptr ph VTR_ASSERT(sub_tile_cap != -1); auto logical_block = get_logical_block_from_pin_physical_num(physical_tile, physical_num); - int pin_logical_num; - int offset = get_logical_block_physical_pin_num_offset(physical_tile, sub_tile, logical_block, sub_tile_cap); - pin_logical_num = physical_num - offset; + int pin_logical_num = physical_num - offset; return pin_logical_num; } @@ -273,7 +270,6 @@ static std::vector get_pb_pin_src_pins(t_physical_tile_type_ptr physical_ty const t_pb_graph_pin* pin) { std::vector driving_pins; const auto& edges = pin->input_edges; - t_pb_graph_pin** connected_pins_ptr; int num_edges = pin->num_input_edges; int num_pins = 0; @@ -285,7 +281,7 @@ static std::vector get_pb_pin_src_pins(t_physical_tile_type_ptr physical_ty for (int edge_idx = 0; edge_idx < num_edges; edge_idx++) { const t_pb_graph_edge* pb_graph_edge = edges[edge_idx]; - connected_pins_ptr = pb_graph_edge->input_pins; + t_pb_graph_pin** connected_pins_ptr = pb_graph_edge->input_pins; num_pins = pb_graph_edge->num_input_pins; for (int pin_idx = 0; pin_idx < num_pins; pin_idx++) { @@ -315,7 +311,6 @@ static std::vector get_pb_pin_sink_pins(t_physical_tile_type_ptr physical_t const t_pb_graph_pin* pin) { std::vector sink_pins; const auto& edges = pin->output_edges; - t_pb_graph_pin** connected_pins_ptr; int num_edges = pin->num_output_edges; int num_pins = 0; @@ -327,7 +322,7 @@ static std::vector get_pb_pin_sink_pins(t_physical_tile_type_ptr physical_t for (int edge_idx = 0; edge_idx < num_edges; edge_idx++) { const t_pb_graph_edge* pb_graph_edge = edges[edge_idx]; - connected_pins_ptr = pb_graph_edge->output_pins; + t_pb_graph_pin** connected_pins_ptr = pb_graph_edge->output_pins; num_pins = pb_graph_edge->num_output_pins; for (int pin_idx = 0; pin_idx < num_pins; pin_idx++) { @@ -392,12 +387,12 @@ static int get_num_reachable_sinks(t_physical_tile_type_ptr physical_tile, const auto& connected_sinks = pb_pin->connected_sinks_ptc; // If ref_sink_num is not reachable by pin_physical_num return 0 - if (connected_sinks.find(ref_sink_num) == connected_sinks.end()) { + if (!connected_sinks.contains(ref_sink_num)) { return 0; } for (auto sink_num : sink_grp) { - if (connected_sinks.find(sink_num) != connected_sinks.end()) { + if (connected_sinks.contains(sink_num)) { num_reachable_sinks++; } } @@ -431,7 +426,7 @@ int get_logical_block_physical_sub_tile_index(t_physical_tile_type_ptr physical_ int sub_tile_index = ARCH_FPGA_UNDEFINED_VAL; for (const auto& sub_tile : physical_tile->sub_tiles) { auto eq_sites = sub_tile.equivalent_sites; - auto it = std::find(eq_sites.begin(), eq_sites.end(), logical_block); + auto it = std::ranges::find(eq_sites, logical_block); if (it != eq_sites.end()) { sub_tile_index = sub_tile.index; } @@ -467,7 +462,7 @@ int get_logical_block_physical_sub_tile_index(t_physical_tile_type_ptr physical_ int sub_tile_index = ARCH_FPGA_UNDEFINED_VAL; for (const auto& sub_tile : physical_tile->sub_tiles) { auto eq_sites = sub_tile.equivalent_sites; - auto it = std::find(eq_sites.begin(), eq_sites.end(), logical_block); + auto it = std::ranges::find(eq_sites, logical_block); if (it != eq_sites.end() && (sub_tile.capacity.is_in_range(sub_tile_capacity))) { sub_tile_index = sub_tile.index; @@ -497,13 +492,13 @@ t_logical_block_type_ptr pick_logical_type(t_physical_tile_type_ptr physical_til bool is_tile_compatible(t_physical_tile_type_ptr physical_tile, t_logical_block_type_ptr logical_block) { const auto& equivalent_tiles = logical_block->equivalent_tiles; - return std::find(equivalent_tiles.begin(), equivalent_tiles.end(), physical_tile) != equivalent_tiles.end(); + return std::ranges::find(equivalent_tiles, physical_tile) != equivalent_tiles.end(); } bool is_sub_tile_compatible(t_physical_tile_type_ptr physical_tile, t_logical_block_type_ptr logical_block, int sub_tile_loc) { bool capacity_compatible = false; - for (auto& sub_tile : physical_tile->sub_tiles) { - auto result = std::find(sub_tile.equivalent_sites.begin(), sub_tile.equivalent_sites.end(), logical_block); + for (const t_sub_tile& sub_tile : physical_tile->sub_tiles) { + auto result = std::ranges::find(sub_tile.equivalent_sites, logical_block); if (sub_tile.capacity.is_in_range(sub_tile_loc) && result != sub_tile.equivalent_sites.end()) { capacity_compatible = true; @@ -691,14 +686,14 @@ std::vector block_type_class_index_to_pin_names(t_physical_tile_typ return lhs.pin_physical_num < rhs.pin_physical_num; }; - //Ensure all the pins are in order - std::sort(pin_info.begin(), pin_info.end(), cmp); + // Ensure all the pins are in order + std::ranges::sort(pin_info, cmp); - //Determine ranges for each capacity instance and port pair + // Determine ranges for each capacity instance and port pair std::map, std::array> pin_ranges; for (const auto& pin_inf : pin_info) { auto key = std::make_tuple(pin_inf.sub_tile_index, pin_inf.capacity_instance, pin_inf.logical_block_index, pin_inf.pb_type_idx, pin_inf.port_index); - if (!pin_ranges.count(key)) { + if (!pin_ranges.contains(key)) { pin_ranges[key][0] = pin_inf.pin_index_in_port; pin_ranges[key][1] = pin_inf.pin_index_in_port; pin_ranges[key][2] = pin_inf.pin_physical_num; @@ -1304,7 +1299,7 @@ float get_pin_primitive_comb_delay(t_physical_tile_type_ptr physical_type, pin_physical_num); VTR_ASSERT(pb_pin->is_primitive_pin()); - auto it = std::max_element(pb_pin->pin_timing_del_max.begin(), pb_pin->pin_timing_del_max.end()); + auto it = std::ranges::max_element(pb_pin->pin_timing_del_max); if (it == pb_pin->pin_timing_del_max.end()) { return 0.; @@ -1323,9 +1318,9 @@ bool classes_in_same_block(t_physical_tile_type_ptr physical_tile, } // Two functions are considered to be in the same group if share at least two level of blocks - const int NUM_SIMILAR_PB_NODE_THRESHOLD = 2; - auto first_class_pin_list = get_pin_list_from_class_physical_num(physical_tile, first_class_ptc_num); - auto second_class_pin_list = get_pin_list_from_class_physical_num(physical_tile, second_class_ptc_num); + constexpr int NUM_SIMILAR_PB_NODE_THRESHOLD = 2; + std::vector first_class_pin_list = get_pin_list_from_class_physical_num(physical_tile, first_class_ptc_num); + std::vector second_class_pin_list = get_pin_list_from_class_physical_num(physical_tile, second_class_ptc_num); auto first_pb_graph_pin = get_pb_pin_from_pin_physical_num(physical_tile, first_class_pin_list[0]); auto second_pb_graph_pin = get_pb_pin_from_pin_physical_num(physical_tile, second_class_pin_list[0]); @@ -1340,7 +1335,7 @@ bool classes_in_same_block(t_physical_tile_type_ptr physical_tile, int num_shared_pb_graph_node = 0; curr_pb_graph_node = second_pb_graph_pin->parent_node; while (curr_pb_graph_node != nullptr) { - auto find_res = std::find(first_pb_graph_node_chain.begin(), first_pb_graph_node_chain.end(), curr_pb_graph_node); + auto find_res = std::ranges::find(first_pb_graph_node_chain, curr_pb_graph_node); if (find_res != first_pb_graph_node_chain.end()) { num_shared_pb_graph_node++; if (num_shared_pb_graph_node >= NUM_SIMILAR_PB_NODE_THRESHOLD) diff --git a/libs/librrgraph/src/base/rr_graph_utils.cpp b/libs/librrgraph/src/base/rr_graph_utils.cpp index 62358b3dba..67a7f8a759 100644 --- a/libs/librrgraph/src/base/rr_graph_utils.cpp +++ b/libs/librrgraph/src/base/rr_graph_utils.cpp @@ -180,7 +180,7 @@ void rr_set_sink_locs(const RRGraphView& rr_graph, RRGraphBuilder& rr_graph_buil // See if we have encountered this tile type/ptc combo before, and used saved offset if so vtr::Point new_loc(-1, -1); - if ((physical_type_offsets.find(tile_type) != physical_type_offsets.end()) && (physical_type_offsets[tile_type].find(node_ptc) != physical_type_offsets[tile_type].end())) { + if (physical_type_offsets.contains(tile_type) && physical_type_offsets[tile_type].contains(node_ptc)) { new_loc = tile_bb.bottom_left() + physical_type_offsets[tile_type].at(node_ptc); } else { /* We have not seen this tile type/ptc combo before */ // The IPINs of the current SINK node @@ -197,7 +197,7 @@ void rr_set_sink_locs(const RRGraphView& rr_graph, RRGraphBuilder& rr_graph_buil std::vector y_coords; // Add coordinates of each "cluster-edge" pin to vectors - for (const auto& pin : sink_ipins) { + for (const RRNodeId pin : sink_ipins) { int pin_x = rr_graph.node_xlow(pin); int pin_y = rr_graph.node_ylow(pin); @@ -212,7 +212,7 @@ void rr_set_sink_locs(const RRGraphView& rr_graph, RRGraphBuilder& rr_graph_buil (int)round(std::accumulate(y_coords.begin(), y_coords.end(), 0.f) / (double)y_coords.size())}; // Save offset for this tile/ptc combo - if (physical_type_offsets.find(tile_type) == physical_type_offsets.end()) + if (!physical_type_offsets.contains(tile_type)) physical_type_offsets[tile_type] = {}; physical_type_offsets[tile_type].insert({node_ptc, new_loc - tile_bb.bottom_left()}); diff --git a/vpr/src/route/rr_graph_generation/build_switchblocks.cpp b/vpr/src/route/rr_graph_generation/build_switchblocks.cpp index 9c0bd32c17..a968533218 100644 --- a/vpr/src/route/rr_graph_generation/build_switchblocks.cpp +++ b/vpr/src/route/rr_graph_generation/build_switchblocks.cpp @@ -390,7 +390,7 @@ static void compute_wire_connections(const t_physical_tile_loc& sb_loc, } // Check that the permutation map has an entry for this side combination - if (sb.permutation_map.count(side_conn) == 0) { + if (!sb.permutation_map.contains(side_conn)) { // The specified switchblock does not have any permutation funcs for `from_side` to `to_side` connection return; } diff --git a/vpr/src/util/vpr_utils.cpp b/vpr/src/util/vpr_utils.cpp index 22b09ec6b4..0c086e6cc3 100644 --- a/vpr/src/util/vpr_utils.cpp +++ b/vpr/src/util/vpr_utils.cpp @@ -2,6 +2,7 @@ #include #include #include +#include #include "pack_types.h" #include "vpr_types.h" @@ -415,7 +416,7 @@ int get_sub_tile_index(ClusterBlockId blk, for (const auto& sub_tile : type->sub_tiles) { if (sub_tile.capacity.is_in_range(sub_tile_coordinate)) { - auto result = std::find(sub_tile.equivalent_sites.begin(), sub_tile.equivalent_sites.end(), logical_block); + auto result = std::ranges::find(sub_tile.equivalent_sites, logical_block); if (result == sub_tile.equivalent_sites.end()) { VPR_THROW(VPR_ERROR_PLACE, "The Block Id %d has been placed in an incompatible sub tile location.\n", blk); } @@ -596,7 +597,7 @@ t_logical_block_type_ptr infer_logic_block_type(const DeviceGrid& grid) { rhs_num_instances += grid.num_instances(type, -1); return lhs_num_instances > rhs_num_instances; }; - std::stable_sort(logic_block_candidates.begin(), logic_block_candidates.end(), by_desc_grid_count); + std::ranges::stable_sort(logic_block_candidates, by_desc_grid_count); if (!logic_block_candidates.empty()) { return logic_block_candidates.front(); @@ -1061,7 +1062,7 @@ vtr::vector alloc_and_load_pin_id_to_pb_mapping() { auto& cluster_ctx = g_vpr_ctx.clustering(); vtr::vector pin_id_to_pb_mapping(cluster_ctx.clb_nlist.blocks().size()); - for (auto blk_id : cluster_ctx.clb_nlist.blocks()) { + for (ClusterBlockId blk_id : cluster_ctx.clb_nlist.blocks()) { pin_id_to_pb_mapping[blk_id] = new t_pb*[cluster_ctx.clb_nlist.block_type(blk_id)->pb_graph_head->total_pb_pins]; for (int j = 0; j < cluster_ctx.clb_nlist.block_type(blk_id)->pb_graph_head->total_pb_pins; j++) { pin_id_to_pb_mapping[blk_id][j] = nullptr; @@ -1248,7 +1249,7 @@ int num_ext_inputs_atom_block(AtomBlockId blk_id) { //Look through the output nets for any duplicates of the input nets for (auto pin_id : atom_ctx.netlist().block_output_pins(blk_id)) { auto net_id = atom_ctx.netlist().pin_net(pin_id); - if (input_nets.count(net_id)) { + if (input_nets.contains(net_id)) { --ext_inps; } } @@ -1273,10 +1274,7 @@ void free_pb(t_pb* pb, AtomPBBimap& atom_pb_bimap) { return; } - const t_pb_type* pb_type; - int i, j, mode; - - pb_type = pb->pb_graph_node->pb_type; + const t_pb_type* pb_type = pb->pb_graph_node->pb_type; if (pb->name) { free(pb->name); @@ -1284,9 +1282,9 @@ void free_pb(t_pb* pb, AtomPBBimap& atom_pb_bimap) { } if (pb_type->blif_model == nullptr) { - mode = pb->mode; - for (i = 0; i < pb_type->modes[mode].num_pb_type_children && pb->child_pbs != nullptr; i++) { - for (j = 0; j < pb_type->modes[mode].pb_type_children[i].num_pb && pb->child_pbs[i] != nullptr; j++) { + int mode = pb->mode; + for (int i = 0; i < pb_type->modes[mode].num_pb_type_children && pb->child_pbs != nullptr; i++) { + for (int j = 0; j < pb_type->modes[mode].pb_type_children[i].num_pb && pb->child_pbs[i] != nullptr; j++) { if (pb->child_pbs[i][j].name != nullptr || pb->child_pbs[i][j].child_pbs != nullptr) { free_pb(&pb->child_pbs[i][j], atom_pb_bimap); } @@ -1354,7 +1352,7 @@ std::tuple parse_direct_pin_name(std::string std::string source_string{src_string}; // replace '.' characters with space - std::replace(source_string.begin(), source_string.end(), '.', ' '); + std::ranges::replace(source_string, '.', ' '); std::istringstream source_iss(source_string); std::string pb_type_name, port_name; @@ -1374,8 +1372,7 @@ std::tuple parse_direct_pin_name(std::string std::string source_string{src_string}; // Replace '.' and '[' characters with ' ' - std::replace_if( - source_string.begin(), source_string.end(), + std::ranges::replace_if(source_string, [](char c) { return c == '.' || c == '[' || c == ':' || c == ']'; }, ' '); @@ -1479,7 +1476,7 @@ void print_switch_usage() { // Assumption: suppose for a L4 wire (bi-directional): ----+----+----+----, it can be driven from any point (0, 1, 2, 3). // physically, the switch driving from point 1 & 3 should be the same. But we will assign then different switch // index; or there is no way to differentiate them after abstracting a 2D wire into a 1D node - if (inward_switch_inf[to_node_index].count(switch_index) == 0) + if (!inward_switch_inf[to_node_index].contains(switch_index)) inward_switch_inf[to_node_index][switch_index] = 0; //VTR_ASSERT(from_node.type != OPIN); inward_switch_inf[to_node_index][switch_index]++; @@ -1487,10 +1484,10 @@ void print_switch_usage() { } for (const RRNodeId rr_id : device_ctx.rr_graph.nodes()) { - for (const auto [rr_switch_id, node_switch_fanin] : inward_switch_inf[rr_id]) { + for (const RRSwitchId rr_switch_id : inward_switch_inf[rr_id] | std::views::keys) { float Tdel = rr_graph.rr_switch_inf(rr_switch_id).Tdel; const auto [arch_switch_id, fanin] = convert_switch_index(rr_switch_id); - if (switch_fanin_count[arch_switch_id].count(fanin) == 0) { + if (!switch_fanin_count[arch_switch_id].contains(fanin)) { switch_fanin_count[arch_switch_id][fanin] = 0; } switch_fanin_count[arch_switch_id][fanin]++; From 0d4aba4e5fd8f438e640f57a59581d6161cf24da Mon Sep 17 00:00:00 2001 From: Soheil Shahrouz Date: Tue, 4 Nov 2025 15:29:46 -0500 Subject: [PATCH 04/10] add noexcept to cmp lambda --- libs/libarchfpga/src/physical_types_util.cpp | 19 ++++++++----------- 1 file changed, 8 insertions(+), 11 deletions(-) diff --git a/libs/libarchfpga/src/physical_types_util.cpp b/libs/libarchfpga/src/physical_types_util.cpp index 39bafa5e1f..b5ffe005c1 100644 --- a/libs/libarchfpga/src/physical_types_util.cpp +++ b/libs/libarchfpga/src/physical_types_util.cpp @@ -155,7 +155,7 @@ static std::tuple get_pin_index_for_inst(t_physical_til logical_block_idx = -1; pb_type_idx = 0; } else { - auto logical_block = get_logical_block_from_pin_physical_num(type, pin_physical_num); + t_logical_block_type_ptr logical_block = get_logical_block_from_pin_physical_num(type, pin_physical_num); auto pb_type = get_pb_pin_from_pin_physical_num(type, pin_physical_num)->parent_node->pb_type; VTR_ASSERT(logical_block != nullptr); logical_block_idx = logical_block->index; @@ -682,7 +682,7 @@ std::vector block_type_class_index_to_pin_names(t_physical_tile_typ pin_info.push_back(block_type_pin_index_to_pin_inst(type, pin_physical_num, is_flat)); } - auto cmp = [](const t_pin_inst_port& lhs, const t_pin_inst_port& rhs) { + auto cmp = [](const t_pin_inst_port& lhs, const t_pin_inst_port& rhs) noexcept { return lhs.pin_physical_num < rhs.pin_physical_num; }; @@ -691,7 +691,7 @@ std::vector block_type_class_index_to_pin_names(t_physical_tile_typ // Determine ranges for each capacity instance and port pair std::map, std::array> pin_ranges; - for (const auto& pin_inf : pin_info) { + for (const t_pin_inst_port& pin_inf : pin_info) { auto key = std::make_tuple(pin_inf.sub_tile_index, pin_inf.capacity_instance, pin_inf.logical_block_index, pin_inf.pb_type_idx, pin_inf.port_index); if (!pin_ranges.contains(key)) { pin_ranges[key][0] = pin_inf.pin_index_in_port; @@ -778,7 +778,7 @@ std::tuple get_sub_tile_from_class_physical_num(t_physic int num_seen_class = (is_on_tile) ? 0 : (int)physical_tile->class_inf.size(); int class_num_offset = num_seen_class; - for (auto& sub_tile : physical_tile->sub_tiles) { + for (const t_sub_tile& sub_tile : physical_tile->sub_tiles) { int sub_tile_num_class = is_on_tile ? sub_tile.class_range.total_num() : get_sub_tile_num_internal_classes(&sub_tile); num_seen_class += sub_tile_num_class; @@ -796,8 +796,8 @@ std::tuple get_sub_tile_from_class_physical_num(t_physic t_logical_block_type_ptr get_logical_block_from_class_physical_num(t_physical_tile_type_ptr physical_tile, int class_physical_num) { - auto pin_list = get_pin_list_from_class_physical_num(physical_tile, class_physical_num); - VTR_ASSERT((int)pin_list.size() != 0); + std::vector pin_list = get_pin_list_from_class_physical_num(physical_tile, class_physical_num); + VTR_ASSERT(!pin_list.empty()); return get_logical_block_from_pin_physical_num(physical_tile, pin_list[0]); } @@ -890,7 +890,7 @@ std::tuple get_sub_tile_from_pin_physical_num(t_physical int total_pin_counts = pin_on_tile ? 0 : physical_tile->num_pins; int pin_offset = total_pin_counts; - for (auto& sub_tile : physical_tile->sub_tiles) { + for (const t_sub_tile& sub_tile : physical_tile->sub_tiles) { int sub_tile_num_pins = pin_on_tile ? sub_tile.num_phy_pins : sub_tile.total_num_internal_pins(); total_pin_counts += sub_tile_num_pins; @@ -1264,9 +1264,7 @@ bool intra_tile_nodes_connected(t_physical_tile_type_ptr physical_type, } else { const t_pb_graph_pin* from_pb_graph_pin = get_pb_pin_from_pin_physical_num(physical_type, pin_physical_num); - auto res = from_pb_graph_pin->connected_sinks_ptc.find(sink_physical_num); - - if (res == from_pb_graph_pin->connected_sinks_ptc.end()) { + if (!from_pb_graph_pin->connected_sinks_ptc.contains(sink_physical_num)) { return false; } else { return true; @@ -1300,7 +1298,6 @@ float get_pin_primitive_comb_delay(t_physical_tile_type_ptr physical_type, VTR_ASSERT(pb_pin->is_primitive_pin()); auto it = std::ranges::max_element(pb_pin->pin_timing_del_max); - if (it == pb_pin->pin_timing_del_max.end()) { return 0.; } else { From d63860fddb6767ea93d968a70479f65eeb1f3194 Mon Sep 17 00:00:00 2001 From: Soheil Shahrouz Date: Wed, 5 Nov 2025 16:15:34 -0500 Subject: [PATCH 05/10] apply PR comments --- libs/libarchfpga/src/physical_types_util.cpp | 8 +++----- vpr/src/route/route_budgets.cpp | 18 ++++++------------ vpr/src/route/route_budgets.h | 2 +- vpr/src/route/route_utils.cpp | 14 +++++++------- vpr/src/route/route_utils.h | 2 +- vpr/src/util/vpr_utils.cpp | 2 +- 6 files changed, 19 insertions(+), 27 deletions(-) diff --git a/libs/libarchfpga/src/physical_types_util.cpp b/libs/libarchfpga/src/physical_types_util.cpp index b5ffe005c1..ac5f9f2eec 100644 --- a/libs/libarchfpga/src/physical_types_util.cpp +++ b/libs/libarchfpga/src/physical_types_util.cpp @@ -682,12 +682,10 @@ std::vector block_type_class_index_to_pin_names(t_physical_tile_typ pin_info.push_back(block_type_pin_index_to_pin_inst(type, pin_physical_num, is_flat)); } - auto cmp = [](const t_pin_inst_port& lhs, const t_pin_inst_port& rhs) noexcept { - return lhs.pin_physical_num < rhs.pin_physical_num; - }; - // Ensure all the pins are in order - std::ranges::sort(pin_info, cmp); + std::ranges::sort(pin_info, [](const t_pin_inst_port& lhs, const t_pin_inst_port& rhs) noexcept { + return lhs.pin_physical_num < rhs.pin_physical_num; + }); // Determine ranges for each capacity instance and port pair std::map, std::array> pin_ranges; diff --git a/vpr/src/route/route_budgets.cpp b/vpr/src/route/route_budgets.cpp index a223c5629c..fa530aa846 100644 --- a/vpr/src/route/route_budgets.cpp +++ b/vpr/src/route/route_budgets.cpp @@ -165,9 +165,6 @@ void route_budgets::allocate_slack_using_weights(NetPinsMatrix& net_delay std::shared_ptr timing_info_min = nullptr; std::shared_ptr original_timing_info = nullptr; - unsigned iteration; - float max_budget_change; - /*Preprocessing algorithm in order to consider short paths when setting initial maximum budgets. * Not necessary unless budgets are really hard to meet*/ // process_negative_slack_using_minimax(); @@ -175,8 +172,8 @@ void route_budgets::allocate_slack_using_weights(NetPinsMatrix& net_delay process_negative_slack_using_minimax(net_delay, netlist_pin_lookup); } - iteration = 0; - max_budget_change = 900e-12; + unsigned iteration = 0; + float max_budget_change = 900e-12; // Cutoff threshold so slack allocator can detect if budgets aren't changing, and stop loop early // An experimentally derived constant that allows for a balance between budget calculation time, and quality @@ -249,13 +246,11 @@ void route_budgets::process_negative_slack_using_minimax(NetPinsMatrix& n * This ensures that the short path slacks are also taken into account for the maximum budgets. * Ensures that maximum budgets will always be above minimum budgets. * Can be unnecessary for not so strict budgets*/ - unsigned iteration; - float max_budget_change; std::shared_ptr timing_info = nullptr; std::shared_ptr original_timing_info = nullptr; - iteration = 0; - max_budget_change = 900e-12; + unsigned iteration = 0; + float max_budget_change = 900e-12; float second_max_budget_change = 900e-12; original_timing_info = perform_sta(net_delay); @@ -576,10 +571,9 @@ void route_budgets::allocate_slack_using_delays_and_criticalities(NetPinsMatrix< * the maximum delay budget = delay through this connection / pin criticality. * The minimum delay budget is set to 0 to promote finding the fastest path*/ - float pin_criticality; for (auto net_id : net_list_.nets()) { for (auto pin_id : net_list_.net_sinks(net_id)) { - pin_criticality = calculate_clb_net_pin_criticality(*timing_info, netlist_pin_lookup, pin_id, is_flat_); + float pin_criticality = calculate_clb_net_pin_criticality(*timing_info, netlist_pin_lookup, pin_id, is_flat_); /* Pin criticality is between 0 and 1. * Shift it downwards by 1 - max_criticality (max_criticality is 0.99 by default, @@ -894,7 +888,7 @@ void route_budgets::print_route_budget(std::string filename, NetPinsMatrix& temp_budgets) { +void route_budgets::print_temporary_budgets_to_file(NetPinsMatrix& temp_budgets) const { /*Used for debugging. Print one specific budget to an external file called * temporary_budgets.txt. This can be used to see how the budgets change between * each minimax PERT iteration*/ diff --git a/vpr/src/route/route_budgets.h b/vpr/src/route/route_budgets.h index c119ca8216..3e10476193 100644 --- a/vpr/src/route/route_budgets.h +++ b/vpr/src/route/route_budgets.h @@ -112,7 +112,7 @@ class route_budgets { tatum::EdgeId get_edge_from_nets(ParentNetId net_id, int ipin); /*debugging tools*/ - void print_temporary_budgets_to_file(NetPinsMatrix& temp_budgets); + void print_temporary_budgets_to_file(NetPinsMatrix& temp_budgets) const; /*Budget variables*/ NetPinsMatrix delay_min_budget; //[0..num_nets][0..clb_net[inet].pins] diff --git a/vpr/src/route/route_utils.cpp b/vpr/src/route/route_utils.cpp index 89a5117a9d..a9255b08f3 100644 --- a/vpr/src/route/route_utils.cpp +++ b/vpr/src/route/route_utils.cpp @@ -457,7 +457,7 @@ vtr::vector>> set_net continue; } else { // get the ptc_number of the sinks in the group - std::for_each(sink_grp.begin(), sink_grp.end(), [&rr_graph](int& sink_rr_num) { + std::ranges::for_each(sink_grp, [&rr_graph](int& sink_rr_num) { sink_rr_num = rr_graph.node_ptc_num(RRNodeId(sink_rr_num)); }); @@ -494,7 +494,7 @@ vtr::vector>> set_net void try_graph(int width_fac, const t_router_opts& router_opts, t_det_routing_arch& det_routing_arch, - std::vector& segment_inf, + const std::vector& segment_inf, t_chan_width_dist chan_width_dist, const std::vector& directs, bool is_flat) { @@ -680,12 +680,12 @@ void update_router_info_and_check_bp(bp_router_type type, int net_id) { // Between net id iters, check only net id and expression breakpoints get_bp_state_globals()->get_glob_breakpoint_state()->route_net_id = net_id; t_draw_state* draw_state = get_draw_state_vars(); - for (size_t i = 0; i < draw_state->list_of_breakpoints.size(); i++) { - if (draw_state->list_of_breakpoints[i].type == BT_ROUTE_NET_ID && draw_state->list_of_breakpoints[i].active) { - hit_bp = check_for_route_net_id_iter_breakpoints(draw_state->list_of_breakpoints[i].bt_route_net_id); + for (const Breakpoint& breakpoint : draw_state->list_of_breakpoints) { + if (breakpoint.type == BT_ROUTE_NET_ID && breakpoint.active) { + hit_bp = check_for_route_net_id_iter_breakpoints(breakpoint.bt_route_net_id); break; - } else if (draw_state->list_of_breakpoints[i].type == BT_EXPRESSION && draw_state->list_of_breakpoints[i].active) { - hit_bp = check_for_expression_breakpoints(draw_state->list_of_breakpoints[i].bt_expression, false); + } else if (breakpoint.type == BT_EXPRESSION && breakpoint.active) { + hit_bp = check_for_expression_breakpoints(breakpoint.bt_expression, false); break; } } diff --git a/vpr/src/route/route_utils.h b/vpr/src/route/route_utils.h index 6aa2e2d6c7..92ac0b39fa 100644 --- a/vpr/src/route/route_utils.h +++ b/vpr/src/route/route_utils.h @@ -150,7 +150,7 @@ vtr::vector>> set_net void try_graph(int width_fac, const t_router_opts& router_opts, t_det_routing_arch& det_routing_arch, - std::vector& segment_inf, + const std::vector& segment_inf, t_chan_width_dist chan_width_dist, const std::vector& directs, bool is_flat); diff --git a/vpr/src/util/vpr_utils.cpp b/vpr/src/util/vpr_utils.cpp index 0c086e6cc3..77e94fd265 100644 --- a/vpr/src/util/vpr_utils.cpp +++ b/vpr/src/util/vpr_utils.cpp @@ -1373,7 +1373,7 @@ std::tuple parse_direct_pin_name(std::string // Replace '.' and '[' characters with ' ' std::ranges::replace_if(source_string, - [](char c) { return c == '.' || c == '[' || c == ':' || c == ']'; }, + [](char c) noexcept { return c == '.' || c == '[' || c == ':' || c == ']'; }, ' '); std::istringstream source_iss(source_string); From 244e3b9bba73ff71d33a33b055ca783093b1ab3c Mon Sep 17 00:00:00 2001 From: Soheil Shahrouz Date: Wed, 5 Nov 2025 17:03:56 -0500 Subject: [PATCH 06/10] std::ranges + declaratio and assignment, const ref --- vpr/src/place/annealer.cpp | 6 +-- vpr/src/place/compressed_grid.cpp | 15 ++++--- vpr/src/place/compressed_grid.h | 10 ++--- .../compute_delta_delays_utils.cpp | 18 ++++----- .../delay_model/override_delay_model.cpp | 5 +-- vpr/src/place/move_transactions.cpp | 2 +- vpr/src/place/move_transactions.h | 2 +- vpr/src/place/move_utils.cpp | 15 +++---- vpr/src/place/net_cost_handler.cpp | 2 +- vpr/src/place/net_cost_handler.h | 2 +- vpr/src/place/place_macro.cpp | 6 +-- vpr/src/place/place_macro.h | 2 +- vpr/src/place/place_util.cpp | 2 +- vpr/src/place/place_util.h | 2 +- vpr/src/place/timing/PlacerCriticalities.cpp | 2 +- vpr/src/place/timing/place_timing_update.cpp | 8 ++-- vpr/src/route/channel_stats.cpp | 2 +- vpr/src/route/check_route.cpp | 12 +++--- vpr/src/route/route_common.cpp | 39 +++++++++---------- vpr/src/route/route_export.h | 2 +- vpr/src/route/route_net.cpp | 7 +--- vpr/src/route/route_path_manager.cpp | 2 +- vpr/src/route/route_tree.cpp | 11 +++--- vpr/src/route/route_utils.cpp | 2 +- vpr/src/route/route_utils.h | 2 +- vpr/src/route/routing_predictor.cpp | 12 +++--- vpr/src/route/spatial_route_tree_lookup.cpp | 4 +- 27 files changed, 90 insertions(+), 104 deletions(-) diff --git a/vpr/src/place/annealer.cpp b/vpr/src/place/annealer.cpp index 46e7f062bf..d7397f68b9 100644 --- a/vpr/src/place/annealer.cpp +++ b/vpr/src/place/annealer.cpp @@ -76,9 +76,9 @@ static float analyze_setup_slack_cost(const PlacerSetupSlacks* setup_slacks, proposed_setup_slacks.push_back(setup_slacks->setup_slack(net_id, ipin)); } - //Sort in ascending order, from the worse slack value to the best - std::stable_sort(original_setup_slacks.begin(), original_setup_slacks.end()); - std::stable_sort(proposed_setup_slacks.begin(), proposed_setup_slacks.end()); + // Sort in ascending order, from the worse slack value to the best + std::ranges::stable_sort(original_setup_slacks); + std::ranges::stable_sort(proposed_setup_slacks); //Check the first pair of slack values that are different //If found, return their difference diff --git a/vpr/src/place/compressed_grid.cpp b/vpr/src/place/compressed_grid.cpp index ce081acb16..3ea88e060d 100644 --- a/vpr/src/place/compressed_grid.cpp +++ b/vpr/src/place/compressed_grid.cpp @@ -111,11 +111,11 @@ static t_compressed_block_grid create_compressed_block_grid(const std::vector= 0 && cx < (int)layer_compressed_x_locs.size()); @@ -173,8 +173,7 @@ static t_compressed_block_grid create_compressed_block_grid(const std::vector& comp_grids) { - FILE* fp; - fp = vtr::fopen(filename, "w"); + FILE* fp = vtr::fopen(filename, "w"); auto& device_ctx = g_vpr_ctx.device(); int num_layers = device_ctx.grid.get_num_layers(); diff --git a/vpr/src/place/compressed_grid.h b/vpr/src/place/compressed_grid.h index 459349fe0c..b511b1aad5 100644 --- a/vpr/src/place/compressed_grid.h +++ b/vpr/src/place/compressed_grid.h @@ -45,11 +45,11 @@ struct t_compressed_block_grid { int cy = UNDEFINED; int layer_num = grid_loc.layer_num; - auto itr_x = std::lower_bound(compressed_to_grid_x[layer_num].begin(), compressed_to_grid_x[layer_num].end(), grid_loc.x); + auto itr_x = std::ranges::lower_bound(compressed_to_grid_x[layer_num], grid_loc.x); VTR_ASSERT(*itr_x == grid_loc.x); cx = std::distance(compressed_to_grid_x[layer_num].begin(), itr_x); - auto itr_y = std::lower_bound(compressed_to_grid_y[layer_num].begin(), compressed_to_grid_y[layer_num].end(), grid_loc.y); + auto itr_y = std::ranges::lower_bound(compressed_to_grid_y[layer_num], grid_loc.y); VTR_ASSERT(*itr_y == grid_loc.y); cy = std::distance(compressed_to_grid_y[layer_num].begin(), itr_y); @@ -69,7 +69,7 @@ struct t_compressed_block_grid { inline t_physical_tile_loc grid_loc_to_compressed_loc_approx_round_up(t_physical_tile_loc grid_loc) const { auto find_compressed_index = [](const std::vector& compressed, int value) -> int { // Get the first element that is not less than the value - auto itr = std::lower_bound(compressed.begin(), compressed.end(), value); + auto itr = std::ranges::lower_bound(compressed, value); if (itr == compressed.end()) { // If all the compressed locations are less than the grid location, return the last compressed location return compressed.size() - 1; @@ -99,7 +99,7 @@ struct t_compressed_block_grid { inline t_physical_tile_loc grid_loc_to_compressed_loc_approx_round_down(t_physical_tile_loc grid_loc) const { auto find_compressed_index = [](const std::vector& compressed, int value) -> int { // Get the first element that is strictly bigger than the value - auto itr = std::upper_bound(compressed.begin(), compressed.end(), value); + auto itr = std::ranges::upper_bound(compressed, value); if (itr == compressed.begin()) { // If all the compressed locations are bigger than the grid location, return the first compressed location return 0; @@ -135,7 +135,7 @@ struct t_compressed_block_grid { } // Find the first element not less than loc - auto itr = std::lower_bound(compressed_grid_dim.begin(), compressed_grid_dim.end(), loc); + auto itr = std::ranges::lower_bound(compressed_grid_dim, loc); if (itr == compressed_grid_dim.begin()) { // If all the compressed locations are bigger that or equal to loc, return the first compressed location diff --git a/vpr/src/place/delay_model/compute_delta_delays_utils.cpp b/vpr/src/place/delay_model/compute_delta_delays_utils.cpp index dd5aec4fa3..ccce362070 100644 --- a/vpr/src/place/delay_model/compute_delta_delays_utils.cpp +++ b/vpr/src/place/delay_model/compute_delta_delays_utils.cpp @@ -215,7 +215,7 @@ static vtr::NdMatrix compute_delta_delays(RouterDelayProfiler& route_p if (type != device_ctx.EMPTY_PHYSICAL_TILE_TYPE) { // check if the tile type is among the allowed types - if (!allowed_types.empty() && allowed_types.find(type->name) == allowed_types.end()) { + if (!allowed_types.empty() && !allowed_types.contains(type->name)) { continue; } src_type = type; @@ -250,7 +250,7 @@ static vtr::NdMatrix compute_delta_delays(RouterDelayProfiler& route_p if (type != device_ctx.EMPTY_PHYSICAL_TILE_TYPE) { // check if the tile type is among the allowed types - if (!allowed_types.empty() && allowed_types.find(type->name) == allowed_types.end()) { + if (!allowed_types.empty() && !allowed_types.contains(type->name)) { continue; } src_type = type; @@ -441,7 +441,7 @@ static void generic_compute_matrix_iterative_astar(RouterDelayProfiler& route_pr bool src_or_target_empty = (src_type == device_ctx.EMPTY_PHYSICAL_TILE_TYPE || sink_type == device_ctx.EMPTY_PHYSICAL_TILE_TYPE); - bool is_allowed_type = allowed_types.empty() || allowed_types.find(src_type->name) != allowed_types.end(); + bool is_allowed_type = allowed_types.empty() || allowed_types.contains(src_type->name); if (src_or_target_empty || !is_allowed_type) { if (matrix[delta_x][delta_y].empty()) { @@ -503,7 +503,7 @@ static void generic_compute_matrix_dijkstra_expansion(RouterDelayProfiler& /*rou const auto& device_ctx = g_vpr_ctx.device(); t_physical_tile_type_ptr src_type = device_ctx.grid.get_physical_type({source_x, source_y, from_layer_num}); - bool is_allowed_type = allowed_types.empty() || allowed_types.find(src_type->name) != allowed_types.end(); + bool is_allowed_type = allowed_types.empty() || allowed_types.contains(src_type->name); if (src_type == device_ctx.EMPTY_PHYSICAL_TILE_TYPE || !is_allowed_type) { for (int sink_x = start_x; sink_x <= end_x; sink_x++) { for (int sink_y = start_y; sink_y <= end_y; sink_y++) { @@ -703,13 +703,13 @@ static float delay_reduce(std::vector& delays, e_reducer reducer) { float delay; if (reducer == e_reducer::MIN) { - auto itr = std::min_element(delays.begin(), delays.end()); + auto itr = std::ranges::min_element(delays); delay = *itr; } else if (reducer == e_reducer::MAX) { - auto itr = std::max_element(delays.begin(), delays.end()); + auto itr = std::ranges::max_element(delays); delay = *itr; } else if (reducer == e_reducer::MEDIAN) { - std::sort(delays.begin(), delays.end()); + std::ranges::sort(delays); delay = vtr::median_presorted(delays.begin(), delays.end()); } else if (reducer == e_reducer::ARITHMEAN) { delay = vtr::arithmean(delays.begin(), delays.end()); @@ -945,7 +945,7 @@ std::vector get_best_classes(enum e_pin_type pintype, t_physical_tile_type_ int pin = type->class_inf[i].pinlist[ipin]; //If the pin isn't ignored, and has a non-zero Fc to some general //routing the class is suitable for delay profiling - if (!type->is_ignored_pin[pin] && non_zero_fc_pins.count(pin)) { + if (!type->is_ignored_pin[pin] && non_zero_fc_pins.contains(pin)) { any_pins_connect_to_general_routing = true; break; } @@ -964,7 +964,7 @@ std::vector get_best_classes(enum e_pin_type pintype, t_physical_tile_type_ return type->class_inf[lhs].num_pins > type->class_inf[rhs].num_pins; }; - std::stable_sort(best_classes.begin(), best_classes.end(), cmp_class); + std::ranges::stable_sort(best_classes, cmp_class); return best_classes; } diff --git a/vpr/src/place/delay_model/override_delay_model.cpp b/vpr/src/place/delay_model/override_delay_model.cpp index f4e8bec796..e5876d5eb6 100644 --- a/vpr/src/place/delay_model/override_delay_model.cpp +++ b/vpr/src/place/delay_model/override_delay_model.cpp @@ -75,9 +75,8 @@ void OverrideDelayModel::compute_override_delay_model_(RouterDelayProfiler& rout int to_pin_class = to_type->find_pin_class(to_port.port_name(), to_port.port_low_index() + iconn, e_pin_type::RECEIVER); VTR_ASSERT(to_pin_class != UNDEFINED); - bool found_sample_points; RRNodeId src_rr, sink_rr; - found_sample_points = find_direct_connect_sample_locations(direct, from_type, from_pin, from_pin_class, to_type, to_pin, to_pin_class, src_rr, sink_rr); + bool found_sample_points = find_direct_connect_sample_locations(direct, from_type, from_pin, from_pin_class, to_type, to_pin, to_pin_class, src_rr, sink_rr); if (!found_sample_points) { ++missing_instances; @@ -86,7 +85,7 @@ void OverrideDelayModel::compute_override_delay_model_(RouterDelayProfiler& rout //If some of the source/sink ports are logically equivalent we may have already //sampled the associated source/sink pair and don't need to do so again - if (sampled_rr_pairs.count({src_rr, sink_rr})) continue; + if (sampled_rr_pairs.contains({src_rr, sink_rr})) continue; float direct_connect_delay = std::numeric_limits::quiet_NaN(); bool found_routing_path = route_profiler.calculate_delay(src_rr, sink_rr, router_opts2, &direct_connect_delay); diff --git a/vpr/src/place/move_transactions.cpp b/vpr/src/place/move_transactions.cpp index b64117848c..d095420796 100644 --- a/vpr/src/place/move_transactions.cpp +++ b/vpr/src/place/move_transactions.cpp @@ -46,7 +46,7 @@ e_block_move_result t_pl_blocks_to_be_moved::record_block_move(ClusterBlockId bl } //Examines the currently proposed move and determine any empty locations -std::set t_pl_blocks_to_be_moved::determine_locations_emptied_by_move() { +std::set t_pl_blocks_to_be_moved::determine_locations_emptied_by_move() const { std::set moved_from_set; std::set moved_to_set; diff --git a/vpr/src/place/move_transactions.h b/vpr/src/place/move_transactions.h index 831461a9c5..3742d8da36 100644 --- a/vpr/src/place/move_transactions.h +++ b/vpr/src/place/move_transactions.h @@ -83,7 +83,7 @@ struct t_pl_blocks_to_be_moved { t_pl_loc to, const BlkLocRegistry& blk_loc_registry); - std::set determine_locations_emptied_by_move(); + std::set determine_locations_emptied_by_move() const; std::vector moved_blocks; std::unordered_set moved_from; diff --git a/vpr/src/place/move_utils.cpp b/vpr/src/place/move_utils.cpp index bfc26b9bb7..ac665e8ef8 100644 --- a/vpr/src/place/move_utils.cpp +++ b/vpr/src/place/move_utils.cpp @@ -26,7 +26,6 @@ static bool f_placer_breakpoint_reached = false; * @param to_layer_num The layer that the block is moving to * @param is_range_fixed Whether the search range is fixed (e.g., in case of placement constraints) * @param search_range The search range to adjust - * */ static void adjust_search_range(t_logical_block_type_ptr block_type, const int compressed_column_num, @@ -405,7 +404,7 @@ e_block_move_result identify_macro_self_swap_affected_macros(std::vector& m int imacro_to = place_macros.get_imacro_from_iblk(blk_to); if (imacro_to != -1) { - auto itr = std::find(macros.begin(), macros.end(), imacro_to); + auto itr = std::ranges::find(macros, imacro_to); if (itr == macros.end()) { macros.push_back(imacro_to); outcome = identify_macro_self_swap_affected_macros(macros, imacro_to, swap_offset, blk_loc_registry, place_macros, move_abortion_logger); @@ -432,7 +431,7 @@ e_block_move_result record_macro_self_swaps(t_pl_blocks_to_be_moved& blocks_affe } //Remove any duplicate macros - affected_macros.resize(std::distance(affected_macros.begin(), std::unique(affected_macros.begin(), affected_macros.end()))); + affected_macros.resize(std::distance(affected_macros.begin(), std::ranges::unique(affected_macros).begin())); std::vector displaced_blocks; @@ -448,14 +447,14 @@ e_block_move_result record_macro_self_swaps(t_pl_blocks_to_be_moved& blocks_affe auto is_non_macro_block = [&](ClusterBlockId blk) { int imacro_blk = place_macros.get_imacro_from_iblk(blk); - if (std::find(affected_macros.begin(), affected_macros.end(), imacro_blk) != affected_macros.end()) { + if (std::ranges::find(affected_macros, imacro_blk) != affected_macros.end()) { return false; } return true; }; std::vector non_macro_displaced_blocks; - std::copy_if(displaced_blocks.begin(), displaced_blocks.end(), std::back_inserter(non_macro_displaced_blocks), is_non_macro_block); + std::ranges::copy_if(displaced_blocks, std::back_inserter(non_macro_displaced_blocks), is_non_macro_block); //Based on the currently queued block moves, find the empty 'holes' left behind auto empty_locs = blocks_affected.determine_locations_emptied_by_move(); @@ -863,7 +862,6 @@ bool find_to_loc_centroid(t_logical_block_type_ptr blk_type, } //Determine the valid compressed grid location ranges - int delta_cx; t_bb search_range; // If we are early in the anneal and the range limit still big enough --> search around the center location that the move proposed @@ -878,7 +876,7 @@ bool find_to_loc_centroid(t_logical_block_type_ptr blk_type, compressed_loc_on_layer, std::min(range_limiters.original_rlim, range_limiters.dm_rlim)); } - delta_cx = search_range.xmax - search_range.xmin; + int delta_cx = search_range.xmax - search_range.xmin; bool block_constrained = is_cluster_constrained(b_from); @@ -1141,7 +1139,6 @@ t_bb get_compressed_grid_bounded_search_range(const t_compressed_block_grid& com const t_physical_tile_loc& from_compressed_loc, const t_physical_tile_loc& target_compressed_loc, float rlim) { - t_bb search_range; int min_cx, max_cx, min_cy, max_cy; @@ -1174,7 +1171,7 @@ t_bb get_compressed_grid_bounded_search_range(const t_compressed_block_grid& com max_cy = std::min(compressed_block_grid.get_num_rows(layer_num) - 1, cy_from + rlim_y_max_range); } - search_range = t_bb(min_cx, max_cx, min_cy, max_cy, layer_num, layer_num); + t_bb search_range = t_bb(min_cx, max_cx, min_cy, max_cy, layer_num, layer_num); return search_range; } diff --git a/vpr/src/place/net_cost_handler.cpp b/vpr/src/place/net_cost_handler.cpp index 9bcdde45e0..012e4a8e28 100644 --- a/vpr/src/place/net_cost_handler.cpp +++ b/vpr/src/place/net_cost_handler.cpp @@ -228,7 +228,7 @@ void NetCostHandler::alloc_and_load_for_fast_vertical_cost_update_() { }); } -std::pair NetCostHandler::comp_bb_cost(e_cost_methods method) { +std::pair NetCostHandler::comp_bb_cost(e_cost_methods method) const { return comp_bb_cost_functor_(method); } diff --git a/vpr/src/place/net_cost_handler.h b/vpr/src/place/net_cost_handler.h index b36fe9fc6e..f71509713f 100644 --- a/vpr/src/place/net_cost_handler.h +++ b/vpr/src/place/net_cost_handler.h @@ -68,7 +68,7 @@ class NetCostHandler { * * @note The returned estimated wirelength is valid only when method == CHECK */ - std::pair comp_bb_cost(e_cost_methods method); + std::pair comp_bb_cost(e_cost_methods method) const; /** * @brief Find all the nets and pins affected by this swap and update costs. diff --git a/vpr/src/place/place_macro.cpp b/vpr/src/place/place_macro.cpp index 31d98597ed..2a555c2fd8 100644 --- a/vpr/src/place/place_macro.cpp +++ b/vpr/src/place/place_macro.cpp @@ -351,10 +351,10 @@ static bool try_combine_macros(std::vector>& pl_macr // Step 1) find the staring point of the matching auto new_macro_it = new_macro_blocks.begin(); - auto old_macro_it = std::find(old_macro_blocks.begin(), old_macro_blocks.end(), *new_macro_it); + auto old_macro_it = std::ranges::find(old_macro_blocks, *new_macro_it); if (old_macro_it == old_macro_blocks.end()) { old_macro_it = old_macro_blocks.begin(); - new_macro_it = std::find(new_macro_blocks.begin(), new_macro_blocks.end(), *old_macro_it); + new_macro_it = std::ranges::find(new_macro_blocks, *old_macro_it); // if matching is from the middle of the two macros, then combining macros is not possible if (new_macro_it == new_macro_blocks.end()) { return false; @@ -596,7 +596,7 @@ void PlaceMacros::alloc_and_load_imacro_from_iblk_(const std::vector void PlaceMacros::write_place_macros_(std::string filename, const std::vector& macros, const std::vector& physical_tile_types, - const ClusteredNetlist& clb_nlist) { + const ClusteredNetlist& clb_nlist) const { FILE* f = vtr::fopen(filename.c_str(), "w"); fprintf(f, "#Identified Placement macros\n"); diff --git a/vpr/src/place/place_macro.h b/vpr/src/place/place_macro.h index 79a0f9f260..e7baec573e 100644 --- a/vpr/src/place/place_macro.h +++ b/vpr/src/place/place_macro.h @@ -237,7 +237,7 @@ class PlaceMacros { void write_place_macros_(std::string filename, const std::vector& macros, const std::vector& physical_tile_types, - const ClusteredNetlist& clb_nlist); + const ClusteredNetlist& clb_nlist) const; bool net_is_driven_by_direct_(ClusterNetId clb_net, const ClusteredNetlist& clb_nlist); diff --git a/vpr/src/place/place_util.cpp b/vpr/src/place/place_util.cpp index 6e72ff86ff..e09ea27d99 100644 --- a/vpr/src/place/place_util.cpp +++ b/vpr/src/place/place_util.cpp @@ -25,7 +25,7 @@ void t_placer_costs::update_norm_factors() { } } -double t_placer_costs::get_total_cost(const t_placer_opts& placer_opts, const t_noc_opts& noc_opts) { +double t_placer_costs::get_total_cost(const t_placer_opts& placer_opts, const t_noc_opts& noc_opts) const { double total_cost = 0.0; if (placer_opts.place_algorithm == e_place_algorithm::BOUNDING_BOX_PLACE) { diff --git a/vpr/src/place/place_util.h b/vpr/src/place/place_util.h index f9925cbcc7..834225b344 100644 --- a/vpr/src/place/place_util.h +++ b/vpr/src/place/place_util.h @@ -121,7 +121,7 @@ class t_placer_costs { * @param noc_opts Determines if placement includes the NoC * @return double The computed total cost of the current placement */ - double get_total_cost(const t_placer_opts& placer_opts, const t_noc_opts& noc_opts); + double get_total_cost(const t_placer_opts& placer_opts, const t_noc_opts& noc_opts) const; /** * @brief Accumulates NoC cost difference terms diff --git a/vpr/src/place/timing/PlacerCriticalities.cpp b/vpr/src/place/timing/PlacerCriticalities.cpp index 4cbf1ec66e..5841770e7a 100644 --- a/vpr/src/place/timing/PlacerCriticalities.cpp +++ b/vpr/src/place/timing/PlacerCriticalities.cpp @@ -52,7 +52,7 @@ void PlacerCriticalities::update_criticalities(const PlaceCritParams& crit_param if (new_crit > crit_params.crit_limit && timing_place_crit_[clb_net][pin_index_in_net] < crit_params.crit_limit) { highly_crit_pins.emplace_back(clb_net, pin_index_in_net); } else if (new_crit < crit_params.crit_limit && timing_place_crit_[clb_net][pin_index_in_net] > crit_params.crit_limit) { - highly_crit_pins.erase(std::remove(highly_crit_pins.begin(), highly_crit_pins.end(), std::make_pair(clb_net, pin_index_in_net)), + highly_crit_pins.erase(std::ranges::remove(highly_crit_pins, std::make_pair(clb_net, pin_index_in_net)).begin(), highly_crit_pins.end()); } } else { diff --git a/vpr/src/place/timing/place_timing_update.cpp b/vpr/src/place/timing/place_timing_update.cpp index e038af0086..9be5072d69 100644 --- a/vpr/src/place/timing/place_timing_update.cpp +++ b/vpr/src/place/timing/place_timing_update.cpp @@ -15,12 +15,12 @@ /* Routines local to place_timing_update.cpp */ static double comp_td_connection_cost(const PlaceDelayModel* delay_model, const PlacerCriticalities& place_crit, - PlacerState& placer_state, + const PlacerState& placer_state, ClusterNetId net, int ipin); static double sum_td_net_cost(ClusterNetId net, - PlacerState& placer_state); + const PlacerState& placer_state); static double sum_td_costs(const PlacerState& placer_state); @@ -353,7 +353,7 @@ void comp_td_costs(const PlaceDelayModel* delay_model, */ static double comp_td_connection_cost(const PlaceDelayModel* delay_model, const PlacerCriticalities& place_crit, - PlacerState& placer_state, + const PlacerState& placer_state, ClusterNetId net, int ipin) { const auto& p_timing_ctx = placer_state.timing(); @@ -377,7 +377,7 @@ static double comp_td_connection_cost(const PlaceDelayModel* delay_model, ///@brief Returns the timing cost of the specified 'net' based on the values in connection_timing_cost. static double sum_td_net_cost(ClusterNetId net, - PlacerState& placer_state) { + const PlacerState& placer_state) { const auto& cluster_ctx = g_vpr_ctx.clustering(); auto& p_timing_ctx = placer_state.timing(); auto& connection_timing_cost = p_timing_ctx.connection_timing_cost; diff --git a/vpr/src/route/channel_stats.cpp b/vpr/src/route/channel_stats.cpp index e0f1483d45..777252af96 100644 --- a/vpr/src/route/channel_stats.cpp +++ b/vpr/src/route/channel_stats.cpp @@ -56,7 +56,7 @@ void print_channel_stats(bool is_flat) { } //Makes more sense from high to low, so reverse - std::reverse(histogram.begin(), histogram.end()); + std::ranges::reverse(histogram); VTR_LOG("\n"); VTR_LOG("Routing channel utilization histogram:\n"); diff --git a/vpr/src/route/check_route.cpp b/vpr/src/route/check_route.cpp index 2c6613d1a9..abf6aff613 100644 --- a/vpr/src/route/check_route.cpp +++ b/vpr/src/route/check_route.cpp @@ -251,8 +251,7 @@ static void check_source(const Netlist<>& net_list, /* First node_block for net is the source */ ParentBlockId blk_id = net_list.net_driver_block(net_id); - t_block_loc blk_loc; - blk_loc = get_block_loc(blk_id, is_flat); + t_block_loc blk_loc = get_block_loc(blk_id, is_flat); if (blk_loc.loc.x != i || blk_loc.loc.y != j) { VPR_FATAL_ERROR(VPR_ERROR_ROUTE, "in check_source: net SOURCE is in wrong location (%d,%d).\n", i, j); @@ -531,7 +530,6 @@ static void check_locally_used_clb_opins(const t_clb_opins_used& clb_opins_used_ bool is_flat) { /* Checks that enough OPINs on CLBs have been set aside (used up) to make a * * legal routing if subblocks connect to OPINs directly. */ - e_rr_type rr_type; auto& cluster_ctx = g_vpr_ctx.clustering(); auto& device_ctx = g_vpr_ctx.device(); @@ -550,7 +548,7 @@ static void check_locally_used_clb_opins(const t_clb_opins_used& clb_opins_used_ /* Now check that node is an OPIN of the right type. */ - rr_type = rr_graph.node_type(RRNodeId(inode)); + e_rr_type rr_type = rr_graph.node_type(RRNodeId(inode)); if (rr_type != e_rr_type::OPIN) { VPR_FATAL_ERROR(VPR_ERROR_ROUTE, "in check_locally_used_opins: block #%lu (%s)\n" @@ -741,15 +739,15 @@ static bool check_non_configurable_edges(const Netlist<>& net_list, //It is OK if there is an unused reverse/forward edge provided the //forward/reverse edge is used. std::vector dedupped_difference; - std::copy_if(difference.begin(), difference.end(), + std::ranges::copy_if(difference, std::back_inserter(dedupped_difference), [&](t_node_edge forward_edge) { - VTR_ASSERT_MSG(!routing_edges.count(forward_edge), "Difference should not contain used routing edges"); + VTR_ASSERT_MSG(!routing_edges.contains(forward_edge), "Difference should not contain used routing edges"); t_node_edge reverse_edge = {forward_edge.to_node, forward_edge.from_node}; //Check whether the reverse edge was used - if (rr_edges.count(reverse_edge) && routing_edges.count(reverse_edge)) { + if (rr_edges.contains(reverse_edge) && routing_edges.contains(reverse_edge)) { //The reverse edge exists in the set of rr_edges, and was used //by the routing. // diff --git a/vpr/src/route/route_common.cpp b/vpr/src/route/route_common.cpp index a12cd5e218..0cfd3c5021 100644 --- a/vpr/src/route/route_common.cpp +++ b/vpr/src/route/route_common.cpp @@ -12,6 +12,8 @@ #include "vpr_utils.h" #include "route_utilization.h" +#include + #if defined(VPR_USE_TBB) #include #include @@ -106,7 +108,7 @@ void save_routing(vtr::vector>& best_routi /* Empties route_ctx.route_trees and copies over best_routing onto it. * Also restores the locally used opin data. */ -void restore_routing(vtr::vector>& best_routing, +void restore_routing(const vtr::vector>& best_routing, t_clb_opins_used& clb_opins_used_locally, const t_clb_opins_used& saved_clb_opins_used_locally) { auto& route_ctx = g_vpr_ctx.mutable_routing(); @@ -281,7 +283,7 @@ void init_route_structs(const Netlist<>& net_list, // Allocate and clear a new route_trees route_ctx.route_trees.resize(net_list.nets().size()); - std::fill(route_ctx.route_trees.begin(), route_ctx.route_trees.end(), vtr::nullopt); + std::ranges::fill(route_ctx.route_trees, vtr::nullopt); //Various look-ups route_ctx.net_rr_terminals = load_net_rr_terminals(device_ctx.rr_graph, @@ -412,7 +414,7 @@ static t_clb_opins_used alloc_and_load_clb_opins_used_locally() { void free_route_structs() { auto& route_ctx = g_vpr_ctx.mutable_routing(); - if (route_ctx.route_bb.size() != 0) { + if (!route_ctx.route_bb.empty()) { route_ctx.route_bb.clear(); route_ctx.route_bb.shrink_to_fit(); } @@ -430,8 +432,8 @@ void alloc_and_load_rr_node_route_structs(const t_router_opts& router_opts) { reset_rr_node_route_structs(router_opts); - for (auto i : device_ctx.rr_node_to_non_config_node_set) { - route_ctx.non_configurable_bitset.set(i.first, true); + for (const RRNodeId node_id : device_ctx.rr_node_to_non_config_node_set | std::views::keys) { + route_ctx.non_configurable_bitset.set(node_id, true); } } @@ -518,8 +520,7 @@ static vtr::vector> load_net_rr_terminals(con for (auto pin_id : net_list.net_pins(net_id)) { auto block_id = net_list.pin_block(pin_id); - t_block_loc blk_loc; - blk_loc = get_block_loc(block_id, is_flat); + t_block_loc blk_loc = get_block_loc(block_id, is_flat); int iclass = get_block_pin_class_num(block_id, pin_id, is_flat); RRNodeId inode; if (pin_count == 0) { /* First pin is driver */ @@ -640,8 +641,7 @@ static vtr::vector> load_rr_clb_sources(con rr_blk_source[blk_id].resize(num_tile_class); for (int iclass = 0; iclass < num_tile_class; iclass++) { if (iclass >= class_range.low && iclass <= class_range.high) { - t_block_loc blk_loc; - blk_loc = get_block_loc(blk_id, is_flat); + t_block_loc blk_loc = get_block_loc(blk_id, is_flat); auto class_type = get_class_type_from_class_physical_num(type, iclass); if (class_type == e_pin_type::DRIVER) { rr_type = e_rr_type::SOURCE; @@ -677,10 +677,10 @@ static vtr::vector load_is_clock_net(const Netlist<>& net_ std::size_t net_id_num = std::size_t(net_id); if (is_flat) { AtomNetId atom_net_id = AtomNetId(net_id_num); - is_clock_net[net_id] = clock_nets.find(atom_net_id) != clock_nets.end(); + is_clock_net[net_id] = clock_nets.contains(atom_net_id); } else { ClusterNetId cluster_net_id = ClusterNetId(net_id_num); - is_clock_net[net_id] = clock_nets.find(atom_ctx.lookup().atom_net(cluster_net_id)) != clock_nets.end(); + is_clock_net[net_id] = clock_nets.contains(atom_ctx.lookup().atom_net(cluster_net_id)); } } @@ -846,9 +846,8 @@ void add_to_mod_list(RRNodeId inode, std::vector& modified_rr_node_inf // this would equate to duplicating a BLE into an already in-use BLE instance, which is clearly incorrect). void reserve_locally_used_opins(HeapInterface* heap, float pres_fac, float acc_fac, bool rip_up_local_opins, bool is_flat) { VTR_ASSERT(is_flat == false); - int num_local_opin, iconn, num_edges; + int num_local_opin; int iclass, ipin; - float cost; HeapNode heap_head_node; t_physical_tile_type_ptr type; @@ -899,14 +898,14 @@ void reserve_locally_used_opins(HeapInterface* heap, float pres_fac, float acc_f //the reserved OPINs to move out of the way of congestion, by preferring //to reserve OPINs with lower congestion costs). RRNodeId from_node = route_ctx.rr_blk_source[(const ParentBlockId&)blk_id][iclass]; - num_edges = rr_graph.num_edges(RRNodeId(from_node)); - for (iconn = 0; iconn < num_edges; iconn++) { + int num_edges = rr_graph.num_edges(RRNodeId(from_node)); + for (int iconn = 0; iconn < num_edges; iconn++) { RRNodeId to_node = rr_graph.edge_sink_node(RRNodeId(from_node), iconn); VTR_ASSERT(rr_graph.node_type(RRNodeId(to_node)) == e_rr_type::OPIN); //Add the OPIN to the heap according to it's congestion cost - cost = get_rr_cong_cost(to_node, pres_fac); + float cost = get_rr_cong_cost(to_node, pres_fac); if (cost < route_ctx.rr_node_route_inf[to_node].path_cost) { heap->add_to_heap({cost, to_node}); } @@ -968,9 +967,8 @@ void print_invalid_routing_info(const Netlist<>& net_list, bool is_flat) { } for (const RRNodeId inode : device_ctx.rr_graph.nodes()) { - int node_x, node_y; - node_x = rr_graph.node_xlow(inode); - node_y = rr_graph.node_ylow(inode); + int node_x = rr_graph.node_xlow(inode); + int node_y = rr_graph.node_ylow(inode); int occ = route_ctx.rr_node_route_inf[inode].occ(); int cap = rr_graph.node_capacity(inode); @@ -982,9 +980,8 @@ void print_invalid_routing_info(const Netlist<>& net_list, bool is_flat) { auto net_id = itr->second; VTR_LOG(" Used by net %s (%zu)\n", net_list.net_name(net_id).c_str(), size_t(net_id)); for (auto pin : net_list.net_pins(net_id)) { - t_block_loc blk_loc; auto blk = net_list.pin_block(pin); - blk_loc = get_block_loc(blk, is_flat); + t_block_loc blk_loc = get_block_loc(blk, is_flat); if (blk_loc.loc.x == node_x && blk_loc.loc.y == node_y) { VTR_LOG(" Is in the same cluster: %s \n", describe_rr_node(rr_graph, device_ctx.grid, device_ctx.rr_indexed_data, itr->first, is_flat) diff --git a/vpr/src/route/route_export.h b/vpr/src/route/route_export.h index b9c6a28620..1c19d9bcaf 100644 --- a/vpr/src/route/route_export.h +++ b/vpr/src/route/route_export.h @@ -21,7 +21,7 @@ void save_routing(vtr::vector>& best_routi const t_clb_opins_used& clb_opins_used_locally, t_clb_opins_used& saved_clb_opins_used_locally); -void restore_routing(vtr::vector>& best_routing, +void restore_routing(const vtr::vector>& best_routing, t_clb_opins_used& clb_opins_used_locally, const t_clb_opins_used& saved_clb_opins_used_locally); diff --git a/vpr/src/route/route_net.cpp b/vpr/src/route/route_net.cpp index e756ee9320..51d07d6d7f 100644 --- a/vpr/src/route/route_net.cpp +++ b/vpr/src/route/route_net.cpp @@ -98,13 +98,10 @@ void setup_net(int itry, void update_rr_base_costs(int fanout) { auto& device_ctx = g_vpr_ctx.mutable_device(); - float factor; - size_t index; - /* Other reasonable values for factor include fanout and 1 */ - factor = sqrt(fanout); + float factor = sqrt(fanout); - for (index = CHANX_COST_INDEX_START; index < device_ctx.rr_indexed_data.size(); index++) { + for (size_t index = CHANX_COST_INDEX_START; index < device_ctx.rr_indexed_data.size(); index++) { if (device_ctx.rr_indexed_data[RRIndexedDataId(index)].T_quadratic > 0.) { /* pass transistor */ device_ctx.rr_indexed_data[RRIndexedDataId(index)].base_cost = device_ctx.rr_indexed_data[RRIndexedDataId(index)].saved_base_cost * factor; } else { diff --git a/vpr/src/route/route_path_manager.cpp b/vpr/src/route/route_path_manager.cpp index 3e920a592a..f9df7b4703 100644 --- a/vpr/src/route/route_path_manager.cpp +++ b/vpr/src/route/route_path_manager.cpp @@ -108,7 +108,7 @@ void PathManager::empty_heap() { freed_nodes_.resize(alloc_list_.size()); // Copy alloc_list_ into the freed nodes list - std::copy(alloc_list_.begin(), alloc_list_.end(), freed_nodes_.begin()); + std::ranges::copy(alloc_list_, freed_nodes_.begin()); } void PathManager::update_route_tree_set(t_heap_path* cheapest_path_struct) { diff --git a/vpr/src/route/route_tree.cpp b/vpr/src/route/route_tree.cpp index e78f9febb3..50171535c5 100644 --- a/vpr/src/route/route_tree.cpp +++ b/vpr/src/route/route_tree.cpp @@ -330,19 +330,18 @@ void RouteTree::load_route_tree_Tdel(RouteTreeNode& from_node, float Tarrival) { const auto& rr_graph = device_ctx.rr_graph; RRNodeId inode = from_node.inode; - float Tdel, Tchild; /* Assuming the downstream connections are, on average, connected halfway * along a wire segment's length. See discussion in net_delay.cpp if you want * to change this. */ - Tdel = Tarrival + 0.5 * from_node.C_downstream * rr_graph.node_R(inode); + float Tdel = Tarrival + 0.5 * from_node.C_downstream * rr_graph.node_R(inode); from_node.Tdel = Tdel; /* Now expand the children of this node to load their Tdel values */ for (RouteTreeNode& child : from_node._child_nodes()) { RRSwitchId iswitch = child.parent_switch; - Tchild = Tdel + rr_graph.rr_switch_inf(iswitch).R * child.C_downstream; + float Tchild = Tdel + rr_graph.rr_switch_inf(iswitch).R * child.C_downstream; Tchild += rr_graph.rr_switch_inf(iswitch).Tdel; /* Intrinsic switch delay. */ load_route_tree_Tdel(child, Tchild); } @@ -541,7 +540,7 @@ RouteTree::add_subtree_from_heap(RTExploredNode* hptr, int target_net_pin_index, /* build a path, looking up rr nodes and switches from rr_node_route_inf */ new_branch_inodes.push_back(sink_inode); - while (!_rr_node_to_rt_node.count(new_inode)) { + while (!_rr_node_to_rt_node.contains(new_inode)) { new_branch_inodes.push_back(new_inode); new_branch_iswitches.push_back(new_iswitch); edge = route_ctx.rr_node_route_inf[new_inode].prev_edge; @@ -605,7 +604,7 @@ void RouteTree::add_non_configurable_nodes(RouteTreeNode* rt_node, bool is_flat) { RRNodeId rr_node = rt_node->inode; - if (visited.count(rr_node) && reached_by_non_configurable_edge) + if (visited.contains(rr_node) && reached_by_non_configurable_edge) return; visited.insert(rr_node); @@ -618,7 +617,7 @@ void RouteTree::add_non_configurable_nodes(RouteTreeNode* rt_node, VTR_ASSERT(!rr_graph.edge_is_configurable(rr_node, iedge)); RRNodeId to_rr_node = rr_graph.edge_sink_node(rr_node, iedge); - if (_rr_node_to_rt_node.count(to_rr_node)) // TODO: not 100% sure about this + if (_rr_node_to_rt_node.contains(to_rr_node)) // TODO: not 100% sure about this continue; RRSwitchId edge_switch(rr_graph.edge_switch(rr_node, iedge)); diff --git a/vpr/src/route/route_utils.cpp b/vpr/src/route/route_utils.cpp index a9255b08f3..1d5118a39f 100644 --- a/vpr/src/route/route_utils.cpp +++ b/vpr/src/route/route_utils.cpp @@ -495,7 +495,7 @@ void try_graph(int width_fac, const t_router_opts& router_opts, t_det_routing_arch& det_routing_arch, const std::vector& segment_inf, - t_chan_width_dist chan_width_dist, + const t_chan_width_dist& chan_width_dist, const std::vector& directs, bool is_flat) { auto& device_ctx = g_vpr_ctx.mutable_device(); diff --git a/vpr/src/route/route_utils.h b/vpr/src/route/route_utils.h index 92ac0b39fa..cc26d30004 100644 --- a/vpr/src/route/route_utils.h +++ b/vpr/src/route/route_utils.h @@ -151,7 +151,7 @@ void try_graph(int width_fac, const t_router_opts& router_opts, t_det_routing_arch& det_routing_arch, const std::vector& segment_inf, - t_chan_width_dist chan_width_dist, + const t_chan_width_dist& chan_width_dist, const std::vector& directs, bool is_flat); diff --git a/vpr/src/route/routing_predictor.cpp b/vpr/src/route/routing_predictor.cpp index 4b8e156d52..48d0b3f3dd 100644 --- a/vpr/src/route/routing_predictor.cpp +++ b/vpr/src/route/routing_predictor.cpp @@ -20,7 +20,7 @@ class LinearModel { return (y_value - y_intercept_) / slope_; } - float get_slope() { + float get_slope() const { return slope_; } @@ -37,12 +37,12 @@ class LinearModel { template float variance(std::vector values, float avg); -float covariance(std::vector x_values, std::vector y_values, float x_avg, float y_avg); +float covariance(const std::vector& x_values, const std::vector& y_values, float x_avg, float y_avg); LinearModel simple_linear_regression(std::vector x_values, std::vector y_values); -LinearModel fit_model(std::vector iterations, std::vector overuse, float history_factor); +LinearModel fit_model(const std::vector& iterations, const std::vector& overuse, float history_factor); template -float variance(std::vector values, float avg) { +float variance(const std::vector& values, float avg) { float var = 0; for (float val : values) { var += (val - avg) * (val - avg); @@ -51,7 +51,7 @@ float variance(std::vector values, float avg) { return var; } -float covariance(std::vector x_values, std::vector y_values, float x_avg, float y_avg) { +float covariance(const std::vector& x_values, const std::vector& y_values, float x_avg, float y_avg) { VTR_ASSERT(x_values.size() == y_values.size()); float cov = 0; @@ -80,7 +80,7 @@ LinearModel simple_linear_regression(std::vector x_values, std::vector iterations, std::vector overuse, float history_factor) { +LinearModel fit_model(const std::vector& iterations, const std::vector& overuse, float history_factor) { //For pathfinder-based routing overuse tends to follow a negative-exponential: // // ^ diff --git a/vpr/src/route/spatial_route_tree_lookup.cpp b/vpr/src/route/spatial_route_tree_lookup.cpp index ddbb066a18..fe5633867a 100644 --- a/vpr/src/route/spatial_route_tree_lookup.cpp +++ b/vpr/src/route/spatial_route_tree_lookup.cpp @@ -93,14 +93,14 @@ bool validate_route_tree_spatial_lookup(const RouteTreeNode& rt_node, const Spat bool valid = true; auto& low_bin_rt_nodes = spatial_lookup[bin_xlow][bin_ylow]; - if (std::find(low_bin_rt_nodes.begin(), low_bin_rt_nodes.end(), rt_node) == low_bin_rt_nodes.end()) { + if (std::ranges::find(low_bin_rt_nodes, rt_node) == low_bin_rt_nodes.end()) { valid = false; VPR_FATAL_ERROR(VPR_ERROR_ROUTE, "Failed to find route tree node %d at (low coord %d,%d) in spatial lookup [bin %d,%d]", rt_node.inode, rr_graph.node_xlow(rr_node), rr_graph.node_ylow(rr_node), bin_xlow, bin_ylow); } auto& high_bin_rt_nodes = spatial_lookup[bin_xhigh][bin_yhigh]; - if (std::find(high_bin_rt_nodes.begin(), high_bin_rt_nodes.end(), rt_node) == high_bin_rt_nodes.end()) { + if (std::ranges::find(high_bin_rt_nodes, rt_node) == high_bin_rt_nodes.end()) { valid = false; VPR_FATAL_ERROR(VPR_ERROR_ROUTE, "Failed to find route tree node %d at (high coord %d,%d) in spatial lookup [bin %d,%d]", rt_node.inode, rr_graph.node_xhigh(rr_node), rr_graph.node_yhigh(rr_node), bin_xhigh, bin_yhigh); From 2bc34555e81b924149c8f9b7ec85b60008f6ec8c Mon Sep 17 00:00:00 2001 From: Soheil Shahrouz Date: Wed, 5 Nov 2025 17:18:13 -0500 Subject: [PATCH 07/10] make cmp_class no_except --- vpr/src/place/delay_model/compute_delta_delays_utils.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/vpr/src/place/delay_model/compute_delta_delays_utils.cpp b/vpr/src/place/delay_model/compute_delta_delays_utils.cpp index ccce362070..609a6049fb 100644 --- a/vpr/src/place/delay_model/compute_delta_delays_utils.cpp +++ b/vpr/src/place/delay_model/compute_delta_delays_utils.cpp @@ -960,7 +960,7 @@ std::vector get_best_classes(enum e_pin_type pintype, t_physical_tile_type_ } // Sort classes so the largest pin class is first - auto cmp_class = [&](int lhs, int rhs) { + auto cmp_class = [&](int lhs, int rhs) noexcept { return type->class_inf[lhs].num_pins > type->class_inf[rhs].num_pins; }; From 772c2aa2bd6f87caabd4d291122213808deca801 Mon Sep 17 00:00:00 2001 From: Soheil Shahrouz Date: Wed, 5 Nov 2025 17:27:32 -0500 Subject: [PATCH 08/10] make vtr_strong operators noexcept --- libs/libvtrutil/src/vtr_strong_id.h | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/libs/libvtrutil/src/vtr_strong_id.h b/libs/libvtrutil/src/vtr_strong_id.h index 48970bfaa1..f869716473 100644 --- a/libs/libvtrutil/src/vtr_strong_id.h +++ b/libs/libvtrutil/src/vtr_strong_id.h @@ -160,10 +160,10 @@ class StrongId; * friend them */ template -constexpr bool operator==(const StrongId& lhs, const StrongId& rhs); +constexpr bool operator==(const StrongId& lhs, const StrongId& rhs) noexcept; template -constexpr bool operator!=(const StrongId& lhs, const StrongId& rhs); +constexpr bool operator!=(const StrongId& lhs, const StrongId& rhs) noexcept; template constexpr bool operator<(const StrongId& lhs, const StrongId& rhs) noexcept; @@ -228,13 +228,13 @@ class StrongId { ///@brief == operator template -constexpr bool operator==(const StrongId& lhs, const StrongId& rhs) { +constexpr bool operator==(const StrongId& lhs, const StrongId& rhs) noexcept { return lhs.id_ == rhs.id_; } ///@brief != operator template -constexpr bool operator!=(const StrongId& lhs, const StrongId& rhs) { +constexpr bool operator!=(const StrongId& lhs, const StrongId& rhs) noexcept { return !(lhs == rhs); } From 1f08ac479bef2dddb2116808c4cde81b83b5547b Mon Sep 17 00:00:00 2001 From: Soheil Shahrouz Date: Wed, 5 Nov 2025 17:45:46 -0500 Subject: [PATCH 09/10] make RouteTreeNode operators noexcept --- vpr/src/route/route_tree.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/vpr/src/route/route_tree.h b/vpr/src/route/route_tree.h index 3570702211..acaf66bd87 100644 --- a/vpr/src/route/route_tree.h +++ b/vpr/src/route/route_tree.h @@ -272,10 +272,10 @@ class RouteTreeNode { constexpr bool is_leaf(void) const { return _is_leaf; } /** Equality operator. For now, just compare the addresses */ - friend bool operator==(const RouteTreeNode& lhs, const RouteTreeNode& rhs) { + friend bool operator==(const RouteTreeNode& lhs, const RouteTreeNode& rhs) noexcept { return &lhs == &rhs; } - friend bool operator!=(const RouteTreeNode& lhs, const RouteTreeNode& rhs) { + friend bool operator!=(const RouteTreeNode& lhs, const RouteTreeNode& rhs) noexcept { return !(lhs == rhs); } From 7efa84148de646e1d4fdb9355d887f9ffe54dfc7 Mon Sep 17 00:00:00 2001 From: Soheil Shahrouz Date: Wed, 5 Nov 2025 18:31:05 -0500 Subject: [PATCH 10/10] Fix StrongId operator noexcept mismatch causing private member access errors --- libs/libvtrutil/src/vtr_strong_id.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/libs/libvtrutil/src/vtr_strong_id.h b/libs/libvtrutil/src/vtr_strong_id.h index f869716473..909a1b08d6 100644 --- a/libs/libvtrutil/src/vtr_strong_id.h +++ b/libs/libvtrutil/src/vtr_strong_id.h @@ -211,9 +211,9 @@ class StrongId { * Note that since these are templated functions we provide an empty set of template parameters * after the function name (i.e. <>) */ - friend constexpr bool operator== <>(const StrongId& lhs, const StrongId& rhs); + friend constexpr bool operator== <>(const StrongId& lhs, const StrongId& rhs) noexcept; ///@brief != operator - friend constexpr bool operator!= <>(const StrongId& lhs, const StrongId& rhs); + friend constexpr bool operator!= <>(const StrongId& lhs, const StrongId& rhs) noexcept; ///@brief < operator friend constexpr bool operator< <>(const StrongId& lhs, const StrongId& rhs) noexcept;