From e486b14dee4a2ae212dc856386d739552bcd9743 Mon Sep 17 00:00:00 2001 From: AlexandreSinger Date: Sat, 12 Oct 2024 10:30:27 -0400 Subject: [PATCH] [CI] Fix Golden Results Golden results are incorrect for the strong tests after recent merge conflicts. --- .../config/golden_results.txt | 14 +++++----- .../config/golden_results.txt | 26 +++++++++---------- .../strong_power/config/golden_results.txt | 6 ++--- .../config/golden_results.txt | 26 +++++++++---------- 4 files changed, 36 insertions(+), 36 deletions(-) diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_routing_constraints/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_routing_constraints/config/golden_results.txt index d3982a6196f..6942d680eeb 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_routing_constraints/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_routing_constraints/config/golden_results.txt @@ -1,7 +1,7 @@ -arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time num_global_nets num_routed_nets -timing/k6_frac_N10_frac_chain_mem32K_htree0_40nm.xml verilog/multiclock_output_and_latch.v common_--target_utilization_0.01_--two_stage_clock_routing_-read_vpr_constraints_tasks/regression_tests/vtr_reg_strong/strong_routing_constraints/multi_clock_routing_constraints.xml_--clock_modeling_dedicated_network 4.80 vpr 62.41 MiB -1 -1 0.15 16964 1 0.23 -1 -1 31908 -1 -1 2 6 0 0 success v8.0.0-10229-g9de163162 release VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-197-generic x86_64 2024-06-03T20:58:32 betzgrp-wintermute.eecg.utoronto.ca /home/talaeikh/vtr-verilog-to-routing/vtr_flow/tasks/regression_tests 63912 6 1 16 17 2 10 9 17 17 289 -1 auto 23.9 MiB 0.02 67 27 9 18 0 62.4 MiB 0.00 0.00 1.66771 -4.34981 -1.66771 0.805 0.93 6.292e-05 5.3006e-05 0.00038211 0.000333692 20 141 4 1.34605e+07 107788 411619. 1424.29 0.56 0.00244758 0.00222679 24098 82050 -1 132 2 10 10 10345 2735 2.73969 0.805 -5.54288 -2.73969 -0.842296 -0.421627 535376. 1852.51 0.16 0.28 0.12 -1 -1 0.16 0.00169603 0.00160376 1 9 -timing/k6_frac_N10_frac_chain_mem32K_htree0_40nm.xml verilog/and_latch.v common_--target_utilization_0.01_--two_stage_clock_routing_-read_vpr_constraints_tasks/regression_tests/vtr_reg_strong/strong_routing_constraints/multi_clock_routing_constraints.xml_--clock_modeling_dedicated_network 3.27 vpr 62.22 MiB -1 -1 0.17 16808 1 0.23 -1 -1 29760 -1 -1 1 3 0 0 success v8.0.0-10229-g9de163162 release VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-197-generic x86_64 2024-06-03T20:58:32 betzgrp-wintermute.eecg.utoronto.ca /home/talaeikh/vtr-verilog-to-routing/vtr_flow/tasks/regression_tests 63712 3 1 5 6 1 4 5 13 13 169 -1 auto 23.5 MiB 0.01 26 12 4 8 0 62.2 MiB 0.00 0.00 0.684768 -1.31529 -0.684768 0.684768 0.50 2.4726e-05 1.8709e-05 0.000144623 0.000117099 20 52 1 6.63067e+06 53894 227243. 1344.63 0.31 0.0012983 0.00120858 13251 44387 -1 54 1 4 4 4093 1283 1.57879 1.57879 -1.64658 -1.57879 -0.385237 -0.385237 294987. 1745.49 0.08 0.16 0.07 -1 -1 0.08 0.00115216 0.00111231 0 4 -timing/k6_frac_N10_frac_chain_mem32K_htree0_routedCLK_40nm.xml verilog/multiclock_output_and_latch.v common_--target_utilization_0.01_--two_stage_clock_routing_-read_vpr_constraints_tasks/regression_tests/vtr_reg_strong/strong_routing_constraints/multi_clock_routing_constraints.xml_--clock_modeling_dedicated_network 4.85 vpr 62.34 MiB -1 -1 0.17 17132 1 0.23 -1 -1 32004 -1 -1 2 6 0 0 success v8.0.0-10229-g9de163162 release VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-197-generic x86_64 2024-06-03T20:58:32 betzgrp-wintermute.eecg.utoronto.ca /home/talaeikh/vtr-verilog-to-routing/vtr_flow/tasks/regression_tests 63832 6 1 16 17 2 10 9 17 17 289 -1 auto 23.8 MiB 0.02 86 27 10 16 1 62.3 MiB 0.00 0.00 1.73508 -4.45965 -1.73508 0.805 0.94 6.3063e-05 5.3154e-05 0.000382365 0.000334342 20 156 3 1.34605e+07 107788 424167. 1467.71 0.57 0.00232866 0.0021239 24098 84646 -1 143 1 9 9 10051 2608 2.60696 0.805 -5.45498 -2.60696 -0.46436 -0.232734 547923. 1895.93 0.16 0.29 0.12 -1 -1 0.16 0.00170576 0.00163038 1 9 -timing/k6_frac_N10_frac_chain_mem32K_htree0_routedCLK_40nm.xml verilog/and_latch.v common_--target_utilization_0.01_--two_stage_clock_routing_-read_vpr_constraints_tasks/regression_tests/vtr_reg_strong/strong_routing_constraints/multi_clock_routing_constraints.xml_--clock_modeling_dedicated_network 3.23 vpr 62.38 MiB -1 -1 0.17 17164 1 0.23 -1 -1 29612 -1 -1 1 3 0 0 success v8.0.0-10229-g9de163162 release VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-197-generic x86_64 2024-06-03T20:58:32 betzgrp-wintermute.eecg.utoronto.ca /home/talaeikh/vtr-verilog-to-routing/vtr_flow/tasks/regression_tests 63872 3 1 5 6 1 4 5 13 13 169 -1 auto 23.9 MiB 0.01 26 12 4 8 0 62.4 MiB 0.00 0.00 0.698051 -1.3327 -0.698051 0.698051 0.51 2.4972e-05 1.869e-05 0.000139687 0.000111725 20 52 1 6.63067e+06 53894 235789. 1395.20 0.32 0.00137232 0.0012738 13251 46155 -1 54 1 4 4 4037 1263 1.58964 1.58964 -1.65632 -1.58964 -0.386343 -0.386343 303533. 1796.05 0.08 0.12 0.04 -1 -1 0.08 0.00117266 0.00113601 0 4 -timing/k6_frac_N10_frac_chain_mem32K_htree0short_40nm.xml verilog/multiclock_output_and_latch.v common_--target_utilization_0.01_--two_stage_clock_routing_-read_vpr_constraints_tasks/regression_tests/vtr_reg_strong/strong_routing_constraints/multi_clock_routing_constraints.xml_--clock_modeling_dedicated_network 4.90 vpr 62.34 MiB -1 -1 0.16 17264 1 0.23 -1 -1 31964 -1 -1 2 6 0 0 success v8.0.0-10229-g9de163162 release VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-197-generic x86_64 2024-06-03T20:58:32 betzgrp-wintermute.eecg.utoronto.ca /home/talaeikh/vtr-verilog-to-routing/vtr_flow/tasks/regression_tests 63832 6 1 16 17 2 10 9 17 17 289 -1 auto 23.8 MiB 0.02 67 27 9 18 0 62.3 MiB 0.01 0.00 1.66771 -4.34981 -1.66771 0.805 0.97 6.398e-05 5.3905e-05 0.000660909 0.000612393 20 619 3 1.34605e+07 107788 408865. 1414.76 0.59 0.00267306 0.00246585 24098 82150 -1 610 2 10 10 12597 4156 3.681 0.805 -7.42729 -3.681 -2.7249 -1.36293 532630. 1843.01 0.16 0.29 0.12 -1 -1 0.16 0.00169111 0.00160117 1 9 -timing/k6_frac_N10_frac_chain_mem32K_htree0short_40nm.xml verilog/and_latch.v common_--target_utilization_0.01_--two_stage_clock_routing_-read_vpr_constraints_tasks/regression_tests/vtr_reg_strong/strong_routing_constraints/multi_clock_routing_constraints.xml_--clock_modeling_dedicated_network 3.27 vpr 62.18 MiB -1 -1 0.16 16892 1 0.23 -1 -1 29700 -1 -1 1 3 0 0 success v8.0.0-10229-g9de163162 release VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-197-generic x86_64 2024-06-03T20:58:32 betzgrp-wintermute.eecg.utoronto.ca /home/talaeikh/vtr-verilog-to-routing/vtr_flow/tasks/regression_tests 63672 3 1 5 6 1 4 5 13 13 169 -1 auto 23.6 MiB 0.01 26 12 4 8 0 62.2 MiB 0.00 0.00 0.684768 -1.31529 -0.684768 0.684768 0.50 2.4929e-05 1.8673e-05 0.000144104 0.000115519 20 183 1 6.63067e+06 53894 225153. 1332.26 0.31 0.00152207 0.00139859 13251 44463 -1 185 1 4 4 1139 237 2.19802 2.19802 -2.19802 -2.19802 -1.00447 -1.00447 292904. 1733.16 0.08 0.15 0.07 -1 -1 0.08 0.00115607 0.00111789 0 4 +arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time num_global_nets num_routed_nets +timing/k6_frac_N10_frac_chain_mem32K_htree0_40nm.xml verilog/multiclock_output_and_latch.v common_--target_utilization_0.01_--two_stage_clock_routing_-read_vpr_constraints_tasks/regression_tests/vtr_reg_strong/strong_routing_constraints/multi_clock_routing_constraints.xml_--clock_modeling_dedicated_network 3.21 vpr 62.14 MiB -1 -1 0.15 16500 1 0.05 -1 -1 32040 -1 -1 2 6 0 0 success v8.0.0-11548-gf337eb353 release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-10-12T10:12:21 betzgrp-wintermute.eecg.utoronto.ca /home/singera8/vtr-verilog-to-routing/vtr_flow/tasks 63632 6 1 16 17 2 10 9 17 17 289 -1 auto 23.6 MiB 0.02 82 27 5 22 0 62.1 MiB 0.00 0.00 1.83313 -4.52227 -1.83313 0.805 0.63 4.5928e-05 3.9482e-05 0.000306382 0.000268718 -1 -1 -1 -1 20 145 2 1.34605e+07 107788 411619. 1424.29 0.44 0.00206436 0.00190427 24098 82050 -1 147 4 15 15 35806 12084 2.78102 0.805 -5.85443 -2.78102 -0.654148 -0.329288 535376. 1852.51 0.14 0.23 0.08 -1 -1 0.14 0.001773 0.00165079 1 9 +timing/k6_frac_N10_frac_chain_mem32K_htree0_40nm.xml verilog/and_latch.v common_--target_utilization_0.01_--two_stage_clock_routing_-read_vpr_constraints_tasks/regression_tests/vtr_reg_strong/strong_routing_constraints/multi_clock_routing_constraints.xml_--clock_modeling_dedicated_network 1.97 vpr 61.79 MiB -1 -1 0.13 16288 1 0.02 -1 -1 29984 -1 -1 1 3 0 0 success v8.0.0-11548-gf337eb353 release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-10-12T10:12:21 betzgrp-wintermute.eecg.utoronto.ca /home/singera8/vtr-verilog-to-routing/vtr_flow/tasks 63268 3 1 5 6 1 4 5 13 13 169 -1 auto 23.2 MiB 0.01 38 12 1 11 0 61.8 MiB 0.00 0.00 1.01347 -1.57988 -1.01347 1.01347 0.32 2.0625e-05 1.4202e-05 0.000120894 9.6334e-05 -1 -1 -1 -1 20 59 2 6.63067e+06 53894 227243. 1344.63 0.25 0.00144866 0.00135193 13251 44387 -1 61 1 4 4 4268 1433 1.65474 1.65474 -1.68612 -1.65474 -0.226831 -0.226831 294987. 1745.49 0.07 0.12 0.04 -1 -1 0.07 0.00122606 0.00118524 0 4 +timing/k6_frac_N10_frac_chain_mem32K_htree0_routedCLK_40nm.xml verilog/multiclock_output_and_latch.v common_--target_utilization_0.01_--two_stage_clock_routing_-read_vpr_constraints_tasks/regression_tests/vtr_reg_strong/strong_routing_constraints/multi_clock_routing_constraints.xml_--clock_modeling_dedicated_network 3.18 vpr 62.38 MiB -1 -1 0.16 16412 1 0.05 -1 -1 32020 -1 -1 2 6 0 0 success v8.0.0-11548-gf337eb353 release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-10-12T10:12:21 betzgrp-wintermute.eecg.utoronto.ca /home/singera8/vtr-verilog-to-routing/vtr_flow/tasks 63876 6 1 16 17 2 10 9 17 17 289 -1 auto 23.8 MiB 0.02 82 27 5 22 0 62.4 MiB 0.00 0.00 1.83475 -4.52496 -1.83475 0.805 0.62 4.5751e-05 3.913e-05 0.000305815 0.00026722 -1 -1 -1 -1 20 145 1 1.34605e+07 107788 424167. 1467.71 0.45 0.00198627 0.00183447 24098 84646 -1 135 1 9 9 13287 4443 2.34012 0.805 -4.96572 -2.34012 -0.653042 -0.329288 547923. 1895.93 0.13 0.22 0.07 -1 -1 0.13 0.00144006 0.00137507 1 9 +timing/k6_frac_N10_frac_chain_mem32K_htree0_routedCLK_40nm.xml verilog/and_latch.v common_--target_utilization_0.01_--two_stage_clock_routing_-read_vpr_constraints_tasks/regression_tests/vtr_reg_strong/strong_routing_constraints/multi_clock_routing_constraints.xml_--clock_modeling_dedicated_network 1.97 vpr 61.91 MiB -1 -1 0.15 16456 1 0.02 -1 -1 29860 -1 -1 1 3 0 0 success v8.0.0-11548-gf337eb353 release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-10-12T10:12:21 betzgrp-wintermute.eecg.utoronto.ca /home/singera8/vtr-verilog-to-routing/vtr_flow/tasks 63400 3 1 5 6 1 4 5 13 13 169 -1 auto 23.2 MiB 0.01 38 12 1 11 0 61.9 MiB 0.00 0.00 1.01347 -1.57988 -1.01347 1.01347 0.33 2.0238e-05 1.4745e-05 0.000129581 0.000104722 -1 -1 -1 -1 20 64 2 6.63067e+06 53894 235789. 1395.20 0.25 0.00142631 0.0013266 13251 46155 -1 65 1 4 4 4385 1450 1.86348 1.86348 -1.89487 -1.86348 -0.226831 -0.226831 303533. 1796.05 0.07 0.13 0.04 -1 -1 0.07 0.0011908 0.00115451 0 4 +timing/k6_frac_N10_frac_chain_mem32K_htree0short_40nm.xml verilog/multiclock_output_and_latch.v common_--target_utilization_0.01_--two_stage_clock_routing_-read_vpr_constraints_tasks/regression_tests/vtr_reg_strong/strong_routing_constraints/multi_clock_routing_constraints.xml_--clock_modeling_dedicated_network 3.19 vpr 62.24 MiB -1 -1 0.15 16528 1 0.05 -1 -1 32172 -1 -1 2 6 0 0 success v8.0.0-11548-gf337eb353 release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-10-12T10:12:21 betzgrp-wintermute.eecg.utoronto.ca /home/singera8/vtr-verilog-to-routing/vtr_flow/tasks 63736 6 1 16 17 2 10 9 17 17 289 -1 auto 23.6 MiB 0.02 82 27 5 22 0 62.2 MiB 0.00 0.00 1.83313 -4.52227 -1.83313 0.805 0.61 4.6371e-05 3.9834e-05 0.000306462 0.000268405 -1 -1 -1 -1 20 623 2 1.34605e+07 107788 408865. 1414.76 0.44 0.00202292 0.00185851 24098 82150 -1 625 4 15 15 40897 15620 3.72331 0.805 -7.73802 -3.72331 -2.53872 -1.27157 532630. 1843.01 0.14 0.24 0.08 -1 -1 0.14 0.00176742 0.00164337 1 9 +timing/k6_frac_N10_frac_chain_mem32K_htree0short_40nm.xml verilog/and_latch.v common_--target_utilization_0.01_--two_stage_clock_routing_-read_vpr_constraints_tasks/regression_tests/vtr_reg_strong/strong_routing_constraints/multi_clock_routing_constraints.xml_--clock_modeling_dedicated_network 1.92 vpr 62.05 MiB -1 -1 0.15 16428 1 0.02 -1 -1 29824 -1 -1 1 3 0 0 success v8.0.0-11548-gf337eb353 release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-10-12T10:12:21 betzgrp-wintermute.eecg.utoronto.ca /home/singera8/vtr-verilog-to-routing/vtr_flow/tasks 63536 3 1 5 6 1 4 5 13 13 169 -1 auto 23.5 MiB 0.01 38 12 1 11 0 62.0 MiB 0.00 0.00 1.01347 -1.57988 -1.01347 1.01347 0.32 3.6518e-05 3.0924e-05 0.000166856 0.000130421 -1 -1 -1 -1 20 190 2 6.63067e+06 53894 225153. 1332.26 0.24 0.00163269 0.00149103 13251 44463 -1 192 1 4 4 1305 345 2.27397 2.27397 -2.27397 -2.27397 -0.846062 -0.846062 292904. 1733.16 0.07 0.12 0.04 -1 -1 0.07 0.00124345 0.00120483 0 4 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_target_pin_util/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_target_pin_util/config/golden_results.txt index 011e36d36da..0dd1983f59b 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_target_pin_util/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_target_pin_util/config/golden_results.txt @@ -1,14 +1,14 @@ arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time -EArch.xml styr.blif common_--target_ext_pin_util_1 1.30 vpr 65.50 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 11 10 0 0 success v8.0.0-11523-gedbe7007c Release IPO VTR_ASSERT_LEVEL=3 GNU 9.4.0 on Linux-5.4.0-190-generic x86_64 2024-10-08T10:08:31 qlsof04.quicklogic.om /home/smahmoudi/Desktop/vtr-verilog-to-routing/vtr_flow/tasks 67068 10 10 168 178 1 73 31 6 6 36 clb auto 27.0 MiB 0.17 388 415 68 333 14 65.5 MiB 0.01 0.00 2.34639 -27.0642 -2.34639 2.34639 0.04 0.000225087 0.000176407 0.00581097 0.00526537 -1 -1 -1 -1 28 870 46 646728 592834 52494.1 1458.17 0.48 0.105553 0.086932 2620 9165 -1 794 21 529 1674 71157 25809 2.9427 2.9427 -35.4244 -2.9427 0 0 62803.0 1744.53 0.01 0.04 0.01 -1 -1 0.01 0.0203706 0.0183426 -EArch.xml styr.blif common_--target_ext_pin_util_0.7 1.25 vpr 64.70 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 11 10 0 0 success v8.0.0-11523-gedbe7007c Release IPO VTR_ASSERT_LEVEL=3 GNU 9.4.0 on Linux-5.4.0-190-generic x86_64 2024-10-08T10:08:31 qlsof04.quicklogic.om /home/smahmoudi/Desktop/vtr-verilog-to-routing/vtr_flow/tasks 66248 10 10 168 178 1 73 31 6 6 36 clb auto 26.2 MiB 0.16 388 415 68 333 14 64.7 MiB 0.01 0.00 2.34639 -27.0642 -2.34639 2.34639 0.04 0.000215899 0.000168935 0.00555376 0.00502916 -1 -1 -1 -1 28 870 46 646728 592834 52494.1 1458.17 0.46 0.101588 0.0839776 2620 9165 -1 794 21 529 1674 71157 25809 2.9427 2.9427 -35.4244 -2.9427 0 0 62803.0 1744.53 0.01 0.04 0.01 -1 -1 0.01 0.0201651 0.0182355 -EArch.xml styr.blif common_--target_ext_pin_util_0.1,0.5 5.39 vpr 64.91 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 91 10 0 0 success v8.0.0-11523-gedbe7007c Release IPO VTR_ASSERT_LEVEL=3 GNU 9.4.0 on Linux-5.4.0-190-generic x86_64 2024-10-08T10:08:31 qlsof04.quicklogic.om /home/smahmoudi/Desktop/vtr-verilog-to-routing/vtr_flow/tasks 66464 10 10 168 178 1 162 111 14 14 196 clb auto 26.1 MiB 0.96 1407 6229 851 5099 279 64.9 MiB 0.05 0.00 3.06354 -37.0676 -3.06354 3.06354 0.55 0.000207567 0.000159582 0.00759191 0.0062615 -1 -1 -1 -1 38 2720 16 9.20055e+06 4.90435e+06 507946. 2591.56 2.09 0.0781361 0.0643865 20344 105085 -1 2520 14 492 2053 126048 26624 3.22324 3.22324 -40.1119 -3.22324 0 0 641979. 3275.40 0.34 0.11 0.10 -1 -1 0.34 0.0371696 0.0336557 -EArch.xml styr.blif common_--target_ext_pin_util_0.5,0.3 1.46 vpr 65.38 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 13 10 0 0 success v8.0.0-11523-gedbe7007c Release IPO VTR_ASSERT_LEVEL=3 GNU 9.4.0 on Linux-5.4.0-190-generic x86_64 2024-10-08T10:08:31 qlsof04.quicklogic.om /home/smahmoudi/Desktop/vtr-verilog-to-routing/vtr_flow/tasks 66952 10 10 168 178 1 75 33 7 7 49 clb auto 26.8 MiB 0.24 405 605 87 497 21 65.4 MiB 0.02 0.00 2.42913 -27.828 -2.42913 2.42913 0.08 0.000235818 0.000181893 0.00687746 0.00613776 -1 -1 -1 -1 26 1080 28 1.07788e+06 700622 75813.7 1547.22 0.43 0.0769284 0.0644202 3816 13734 -1 900 15 408 1287 59294 19424 2.94711 2.94711 -34.0547 -2.94711 0 0 91376.6 1864.83 0.02 0.03 0.01 -1 -1 0.02 0.0181106 0.0167312 -EArch.xml styr.blif common_--target_ext_pin_util_0.0 4.09 vpr 65.24 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 104 10 0 0 success v8.0.0-11523-gedbe7007c Release IPO VTR_ASSERT_LEVEL=3 GNU 9.4.0 on Linux-5.4.0-190-generic x86_64 2024-10-08T10:08:31 qlsof04.quicklogic.om /home/smahmoudi/Desktop/vtr-verilog-to-routing/vtr_flow/tasks 66808 10 10 168 178 1 163 124 14 14 196 clb auto 26.6 MiB 1.13 1464 6613 1027 5361 225 65.2 MiB 0.06 0.00 3.08045 -38.2145 -3.08045 3.08045 0.55 0.000218604 0.000160933 0.00789405 0.00660298 -1 -1 -1 -1 26 2975 12 9.20055e+06 5.60498e+06 387483. 1976.95 0.64 0.0416216 0.0350451 18784 74779 -1 2745 11 534 2254 137713 28805 3.67689 3.67689 -44.1872 -3.67689 0 0 467681. 2386.13 0.34 0.11 0.07 -1 -1 0.34 0.03386 0.031026 -EArch.xml styr.blif common_--target_ext_pin_util_clb_0.7 1.40 vpr 65.50 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 11 10 0 0 success v8.0.0-11523-gedbe7007c Release IPO VTR_ASSERT_LEVEL=3 GNU 9.4.0 on Linux-5.4.0-190-generic x86_64 2024-10-08T10:08:31 qlsof04.quicklogic.om /home/smahmoudi/Desktop/vtr-verilog-to-routing/vtr_flow/tasks 67068 10 10 168 178 1 73 31 6 6 36 clb auto 27.0 MiB 0.18 388 415 68 333 14 65.5 MiB 0.01 0.00 2.34639 -27.0642 -2.34639 2.34639 0.05 0.000226864 0.000178664 0.00612068 0.00555865 -1 -1 -1 -1 28 870 46 646728 592834 52494.1 1458.17 0.48 0.105425 0.086828 2620 9165 -1 794 21 529 1674 71157 25809 2.9427 2.9427 -35.4244 -2.9427 0 0 62803.0 1744.53 0.01 0.04 0.01 -1 -1 0.01 0.0220482 0.0200055 -EArch.xml styr.blif common_--target_ext_pin_util_clb_0.7_0.8 1.35 vpr 65.67 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 11 10 0 0 success v8.0.0-11523-gedbe7007c Release IPO VTR_ASSERT_LEVEL=3 GNU 9.4.0 on Linux-5.4.0-190-generic x86_64 2024-10-08T10:08:31 qlsof04.quicklogic.om /home/smahmoudi/Desktop/vtr-verilog-to-routing/vtr_flow/tasks 67244 10 10 168 178 1 73 31 6 6 36 clb auto 27.2 MiB 0.19 388 415 68 333 14 65.7 MiB 0.02 0.00 2.34639 -27.0642 -2.34639 2.34639 0.04 0.000232035 0.000178681 0.00717422 0.00657704 -1 -1 -1 -1 28 870 46 646728 592834 52494.1 1458.17 0.46 0.102895 0.0850096 2620 9165 -1 794 21 529 1674 71157 25809 2.9427 2.9427 -35.4244 -2.9427 0 0 62803.0 1744.53 0.01 0.04 0.01 -1 -1 0.01 0.0209893 0.0189911 -EArch.xml styr.blif common_--target_ext_pin_util_clb_0.1_0.8 5.30 vpr 65.94 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 91 10 0 0 success v8.0.0-11523-gedbe7007c Release IPO VTR_ASSERT_LEVEL=3 GNU 9.4.0 on Linux-5.4.0-190-generic x86_64 2024-10-08T10:08:31 qlsof04.quicklogic.om /home/smahmoudi/Desktop/vtr-verilog-to-routing/vtr_flow/tasks 67524 10 10 168 178 1 162 111 14 14 196 clb auto 27.1 MiB 1.18 1407 6229 851 5099 279 65.9 MiB 0.05 0.00 3.06354 -37.0676 -3.06354 3.06354 0.54 0.000206054 0.000158071 0.00760654 0.0062782 -1 -1 -1 -1 38 2720 16 9.20055e+06 4.90435e+06 507946. 2591.56 2.07 0.0782197 0.0643062 20344 105085 -1 2520 14 492 2053 126048 26624 3.22324 3.22324 -40.1119 -3.22324 0 0 641979. 3275.40 0.22 0.04 0.10 -1 -1 0.22 0.0145158 0.0132094 -EArch.xml styr.blif common_--target_ext_pin_util_io_0.1,0.1_clb_0.7_0.8,1.0 1.34 vpr 64.58 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 11 10 0 0 success v8.0.0-11523-gedbe7007c Release IPO VTR_ASSERT_LEVEL=3 GNU 9.4.0 on Linux-5.4.0-190-generic x86_64 2024-10-08T10:08:31 qlsof04.quicklogic.om /home/smahmoudi/Desktop/vtr-verilog-to-routing/vtr_flow/tasks 66132 10 10 168 178 1 73 31 6 6 36 clb auto 26.0 MiB 0.22 388 415 68 333 14 64.6 MiB 0.02 0.00 2.34639 -27.0642 -2.34639 2.34639 0.04 0.000233094 0.000180538 0.00701095 0.00640295 -1 -1 -1 -1 28 870 46 646728 592834 52494.1 1458.17 0.46 0.103589 0.0857509 2620 9165 -1 794 21 529 1674 71157 25809 2.9427 2.9427 -35.4244 -2.9427 0 0 62803.0 1744.53 0.01 0.04 0.01 -1 -1 0.01 0.0198344 0.0179932 -EArch.xml styr.blif common_--target_ext_pin_util_-0.1 0.13 vpr 26.42 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 exited with return code 1 v8.0.0-11523-gedbe7007c Release IPO VTR_ASSERT_LEVEL=3 GNU 9.4.0 on Linux-5.4.0-190-generic x86_64 2024-10-08T10:08:31 qlsof04.quicklogic.om /home/smahmoudi/Desktop/vtr-verilog-to-routing/vtr_flow/tasks 27056 10 10 168 178 1 -1 -1 -1 -1 -1 -1 -1 24.8 MiB 0.00 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -EArch.xml styr.blif common_--target_ext_pin_util_1.1 0.13 vpr 26.36 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 exited with return code 1 v8.0.0-11523-gedbe7007c Release IPO VTR_ASSERT_LEVEL=3 GNU 9.4.0 on Linux-5.4.0-190-generic x86_64 2024-10-08T10:08:31 qlsof04.quicklogic.om /home/smahmoudi/Desktop/vtr-verilog-to-routing/vtr_flow/tasks 26988 10 10 168 178 1 -1 -1 -1 -1 -1 -1 -1 24.7 MiB 0.00 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -EArch.xml styr.blif common_--target_ext_pin_util_io_0.1,0.1_clb_0.7_0.8,1.0_1.0 0.19 vpr 27.19 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 exited with return code 1 v8.0.0-11523-gedbe7007c Release IPO VTR_ASSERT_LEVEL=3 GNU 9.4.0 on Linux-5.4.0-190-generic x86_64 2024-10-08T10:08:31 qlsof04.quicklogic.om /home/smahmoudi/Desktop/vtr-verilog-to-routing/vtr_flow/tasks 27840 10 10 168 178 1 -1 -1 -1 -1 -1 -1 -1 25.8 MiB 0.00 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -EArch.xml styr.blif common_--target_ext_pin_util_io_0.1,0.1_clb_0.7_0.8,1.0_clb_1.0 0.16 vpr 27.18 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 exited with return code 1 v8.0.0-11523-gedbe7007c Release IPO VTR_ASSERT_LEVEL=3 GNU 9.4.0 on Linux-5.4.0-190-generic x86_64 2024-10-08T10:08:31 qlsof04.quicklogic.om /home/smahmoudi/Desktop/vtr-verilog-to-routing/vtr_flow/tasks 27836 10 10 168 178 1 -1 -1 -1 -1 -1 -1 -1 25.7 MiB 0.00 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 +EArch.xml styr.blif common_--target_ext_pin_util_1 1.22 vpr 64.26 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 11 10 0 0 success v8.0.0-11548-gf337eb353 release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-10-12T10:12:21 betzgrp-wintermute.eecg.utoronto.ca /home/singera8/vtr-verilog-to-routing/vtr_flow/tasks 65800 10 10 168 178 1 73 31 6 6 36 clb auto 25.7 MiB 0.14 407 463 89 357 17 64.3 MiB 0.02 0.00 2.36035 -27.3667 -2.36035 2.36035 0.04 0.000635562 0.000587698 0.00980998 0.00922481 -1 -1 -1 -1 32 838 28 646728 592834 58122.9 1614.52 0.42 0.143103 0.121539 2724 10283 -1 702 19 470 1535 59936 21931 2.39503 2.39503 -32.2138 -2.39503 0 0 70489.2 1958.03 0.01 0.05 0.01 -1 -1 0.01 0.0295304 0.0261483 +EArch.xml styr.blif common_--target_ext_pin_util_0.7 1.36 vpr 64.14 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 11 10 0 0 success v8.0.0-11548-gf337eb353 release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-10-12T10:12:21 betzgrp-wintermute.eecg.utoronto.ca /home/singera8/vtr-verilog-to-routing/vtr_flow/tasks 65684 10 10 168 178 1 73 31 6 6 36 clb auto 25.5 MiB 0.12 407 463 89 357 17 64.1 MiB 0.02 0.00 2.36035 -27.3667 -2.36035 2.36035 0.04 0.000630926 0.000582868 0.00981682 0.00922691 -1 -1 -1 -1 32 838 28 646728 592834 58122.9 1614.52 0.53 0.199297 0.168347 2724 10283 -1 702 19 470 1535 59936 21931 2.39503 2.39503 -32.2138 -2.39503 0 0 70489.2 1958.03 0.01 0.05 0.01 -1 -1 0.01 0.0297651 0.0264108 +EArch.xml styr.blif common_--target_ext_pin_util_0.1,0.5 3.77 vpr 64.62 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 91 10 0 0 success v8.0.0-11548-gf337eb353 release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-10-12T10:12:21 betzgrp-wintermute.eecg.utoronto.ca /home/singera8/vtr-verilog-to-routing/vtr_flow/tasks 66168 10 10 168 178 1 162 111 14 14 196 clb auto 25.8 MiB 0.83 1425 5963 761 4903 299 64.6 MiB 0.05 0.00 3.12847 -37.0503 -3.12847 3.12847 0.41 0.000628333 0.000580338 0.0171828 0.0159216 -1 -1 -1 -1 20 2956 16 9.20055e+06 4.90435e+06 295730. 1508.82 1.29 0.0929065 0.0799229 18004 60473 -1 2785 13 638 2511 146344 31166 3.597 3.597 -45.2096 -3.597 0 0 387483. 1976.95 0.09 0.06 0.06 -1 -1 0.09 0.0204062 0.0180589 +EArch.xml styr.blif common_--target_ext_pin_util_0.5,0.3 1.26 vpr 64.21 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 13 10 0 0 success v8.0.0-11548-gf337eb353 release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-10-12T10:12:21 betzgrp-wintermute.eecg.utoronto.ca /home/singera8/vtr-verilog-to-routing/vtr_flow/tasks 65752 10 10 168 178 1 75 33 7 7 49 clb auto 25.7 MiB 0.17 406 657 105 529 23 64.2 MiB 0.02 0.00 2.37613 -26.9385 -2.37613 2.37613 0.06 0.000635754 0.000588385 0.0117044 0.0109781 -1 -1 -1 -1 26 1250 31 1.07788e+06 700622 75813.7 1547.22 0.30 0.101986 0.0876865 3816 13734 -1 911 16 447 1582 77100 25463 2.91114 2.91114 -35.9881 -2.91114 0 0 91376.6 1864.83 0.02 0.05 0.01 -1 -1 0.02 0.0271559 0.0242615 +EArch.xml styr.blif common_--target_ext_pin_util_0.0 3.71 vpr 64.85 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 104 10 0 0 success v8.0.0-11548-gf337eb353 release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-10-12T10:12:21 betzgrp-wintermute.eecg.utoronto.ca /home/singera8/vtr-verilog-to-routing/vtr_flow/tasks 66408 10 10 168 178 1 163 124 14 14 196 clb auto 26.0 MiB 0.97 1418 6922 992 5687 243 64.9 MiB 0.05 0.00 3.05445 -36.9858 -3.05445 3.05445 0.42 0.000635632 0.000586828 0.0170342 0.0157603 -1 -1 -1 -1 24 2880 12 9.20055e+06 5.60498e+06 355930. 1815.97 1.01 0.0998456 0.0858149 18592 71249 -1 2826 12 527 2385 139582 29980 3.66329 3.66329 -43.9798 -3.66329 0 0 449262. 2292.15 0.11 0.05 0.07 -1 -1 0.11 0.0202055 0.0179411 +EArch.xml styr.blif common_--target_ext_pin_util_clb_0.7 1.33 vpr 64.17 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 11 10 0 0 success v8.0.0-11548-gf337eb353 release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-10-12T10:12:21 betzgrp-wintermute.eecg.utoronto.ca /home/singera8/vtr-verilog-to-routing/vtr_flow/tasks 65708 10 10 168 178 1 73 31 6 6 36 clb auto 25.6 MiB 0.14 407 463 89 357 17 64.2 MiB 0.02 0.00 2.36035 -27.3667 -2.36035 2.36035 0.04 0.000637222 0.000589815 0.00986031 0.00927104 -1 -1 -1 -1 32 838 28 646728 592834 58122.9 1614.52 0.54 0.202892 0.171821 2724 10283 -1 702 19 470 1535 59936 21931 2.39503 2.39503 -32.2138 -2.39503 0 0 70489.2 1958.03 0.01 0.03 0.01 -1 -1 0.01 0.0188685 0.0172348 +EArch.xml styr.blif common_--target_ext_pin_util_clb_0.7_0.8 1.41 vpr 64.06 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 11 10 0 0 success v8.0.0-11548-gf337eb353 release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-10-12T10:12:21 betzgrp-wintermute.eecg.utoronto.ca /home/singera8/vtr-verilog-to-routing/vtr_flow/tasks 65600 10 10 168 178 1 73 31 6 6 36 clb auto 25.5 MiB 0.16 407 463 89 357 17 64.1 MiB 0.02 0.00 2.36035 -27.3667 -2.36035 2.36035 0.04 0.000644635 0.000597098 0.0102053 0.0096131 -1 -1 -1 -1 32 838 28 646728 592834 58122.9 1614.52 0.53 0.20199 0.170925 2724 10283 -1 702 19 470 1535 59936 21931 2.39503 2.39503 -32.2138 -2.39503 0 0 70489.2 1958.03 0.01 0.05 0.01 -1 -1 0.01 0.0296093 0.026251 +EArch.xml styr.blif common_--target_ext_pin_util_clb_0.1_0.8 3.94 vpr 64.81 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 91 10 0 0 success v8.0.0-11548-gf337eb353 release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-10-12T10:12:21 betzgrp-wintermute.eecg.utoronto.ca /home/singera8/vtr-verilog-to-routing/vtr_flow/tasks 66364 10 10 168 178 1 162 111 14 14 196 clb auto 26.0 MiB 0.88 1425 5963 761 4903 299 64.8 MiB 0.05 0.00 3.12847 -37.0503 -3.12847 3.12847 0.42 0.00065084 0.000601408 0.0175552 0.0162626 -1 -1 -1 -1 20 2956 16 9.20055e+06 4.90435e+06 295730. 1508.82 1.31 0.0953188 0.0822017 18004 60473 -1 2785 13 638 2511 146344 31166 3.597 3.597 -45.2096 -3.597 0 0 387483. 1976.95 0.10 0.06 0.06 -1 -1 0.10 0.0213208 0.0188927 +EArch.xml styr.blif common_--target_ext_pin_util_io_0.1,0.1_clb_0.7_0.8,1.0 1.36 vpr 63.78 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 11 10 0 0 success v8.0.0-11548-gf337eb353 release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-10-12T10:12:21 betzgrp-wintermute.eecg.utoronto.ca /home/singera8/vtr-verilog-to-routing/vtr_flow/tasks 65308 10 10 168 178 1 73 31 6 6 36 clb auto 25.2 MiB 0.13 407 463 89 357 17 63.8 MiB 0.02 0.00 2.36035 -27.3667 -2.36035 2.36035 0.04 0.000634693 0.000587229 0.00982727 0.00924077 -1 -1 -1 -1 32 838 28 646728 592834 58122.9 1614.52 0.53 0.200884 0.169805 2724 10283 -1 702 19 470 1535 59936 21931 2.39503 2.39503 -32.2138 -2.39503 0 0 70489.2 1958.03 0.01 0.05 0.01 -1 -1 0.01 0.0297589 0.0264115 +EArch.xml styr.blif common_--target_ext_pin_util_-0.1 0.17 vpr 25.53 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 exited with return code 1 v8.0.0-11548-gf337eb353 release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-10-12T10:12:21 betzgrp-wintermute.eecg.utoronto.ca /home/singera8/vtr-verilog-to-routing/vtr_flow/tasks 26140 10 10 168 178 1 -1 -1 -1 -1 -1 -1 -1 23.4 MiB 0.00 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 +EArch.xml styr.blif common_--target_ext_pin_util_1.1 0.17 vpr 25.86 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 exited with return code 1 v8.0.0-11548-gf337eb353 release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-10-12T10:12:21 betzgrp-wintermute.eecg.utoronto.ca /home/singera8/vtr-verilog-to-routing/vtr_flow/tasks 26476 10 10 168 178 1 -1 -1 -1 -1 -1 -1 -1 24.0 MiB 0.00 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 +EArch.xml styr.blif common_--target_ext_pin_util_io_0.1,0.1_clb_0.7_0.8,1.0_1.0 0.16 vpr 26.09 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 exited with return code 1 v8.0.0-11548-gf337eb353 release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-10-12T10:12:21 betzgrp-wintermute.eecg.utoronto.ca /home/singera8/vtr-verilog-to-routing/vtr_flow/tasks 26712 10 10 168 178 1 -1 -1 -1 -1 -1 -1 -1 24.0 MiB 0.00 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 +EArch.xml styr.blif common_--target_ext_pin_util_io_0.1,0.1_clb_0.7_0.8,1.0_clb_1.0 0.15 vpr 25.78 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 exited with return code 1 v8.0.0-11548-gf337eb353 release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-10-12T10:12:21 betzgrp-wintermute.eecg.utoronto.ca /home/singera8/vtr-verilog-to-routing/vtr_flow/tasks 26400 10 10 168 178 1 -1 -1 -1 -1 -1 -1 -1 24.3 MiB 0.00 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_power/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_power/config/golden_results.txt index 754f7bd66a7..97d4936b71c 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_power/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_power/config/golden_results.txt @@ -1,3 +1,3 @@ - arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time total_power routing_power_perc clock_power_perc tile_power_perc - k6_frac_N10_mem32K_40nm.xml ch_intrinsics.v common 3.50 vpr 68.70 MiB 0.02 9472 -1 -1 3 0.19 -1 -1 41960 -1 -1 65 99 1 0 success e1c7cb1 Release IPO VTR_ASSERT_LEVEL=3 GNU 11.4.0 on Linux-6.8.0-1014-azure x86_64 2024-09-24T03:47:29 fv-az775-518 /home/runner/work/vtr-verilog-to-routing/vtr-verilog-to-routing 70352 99 130 363 493 1 251 295 12 12 144 clb auto 29.6 MiB 0.06 898 69946 27423 33815 8708 68.7 MiB 0.13 0.00 2.13689 -217.073 -2.13689 2.13689 0.25 0.000441485 0.000392594 0.0339038 0.0310413 36 2034 32 5.66058e+06 4.05111e+06 305235. 2119.69 1.78 0.210292 0.192855 12238 58442 -1 1635 12 651 842 57285 18015 2.34804 2.34804 -239.539 -2.34804 0 0 378970. 2631.74 0.10 0.03 0.04 -1 -1 0.10 0.016856 0.0159728 0.009514 0.2103 0.06439 0.7253 - k6_frac_N10_mem32K_40nm.xml diffeq1.v common 9.47 vpr 71.95 MiB 0.02 9472 -1 -1 15 0.26 -1 -1 41080 -1 -1 36 162 0 5 success e1c7cb1 Release IPO VTR_ASSERT_LEVEL=3 GNU 11.4.0 on Linux-6.8.0-1014-azure x86_64 2024-09-24T03:47:29 fv-az775-518 /home/runner/work/vtr-verilog-to-routing/vtr-verilog-to-routing 73680 162 96 999 932 1 690 299 16 16 256 mult_36 auto 32.8 MiB 0.23 5760 83216 27007 49519 6690 72.0 MiB 0.41 0.01 21.4984 -1890.69 -21.4984 21.4984 0.50 0.00137404 0.00127093 0.126092 0.1166 50 12109 34 1.21132e+07 3.92018e+06 780512. 3048.87 5.57 0.718313 0.665768 25484 153448 -1 9957 18 3267 6461 977570 257843 22.4842 22.4842 -2053.42 -22.4842 0 0 1.00276e+06 3917.05 0.27 0.19 0.09 -1 -1 0.27 0.0733674 0.0696001 0.007924 0.3531 0.0162 0.6307 +arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time total_power routing_power_perc clock_power_perc tile_power_perc +k6_frac_N10_mem32K_40nm.xml ch_intrinsics.v common 4.58 vpr 64.71 MiB 0.07 9300 -1 -1 3 0.26 -1 -1 34484 -1 52824 65 99 1 0 success v8.0.0-11548-gf337eb353-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-10-12T10:23:35 betzgrp-wintermute.eecg.utoronto.ca /home/singera8/vtr-verilog-to-routing/vtr_flow/tasks 66264 99 130 363 493 1 251 295 12 12 144 clb auto 25.4 MiB 0.11 909 69946 28257 33534 8155 64.7 MiB 0.25 0.00 2.12504 -215.887 -2.12504 2.12504 0.26 0.00128833 0.00122051 0.0963439 0.0912538 -1 -1 -1 -1 46 1697 19 5.66058e+06 4.05111e+06 378970. 2631.74 1.64 0.526586 0.482138 13238 73581 -1 1542 10 552 711 43732 13783 2.26353 2.26353 -226.249 -2.26353 0 0 486261. 3376.82 0.09 0.05 0.07 -1 -1 0.09 0.0314505 0.0291634 0.009964 0.2127 0.07165 0.7157 +k6_frac_N10_mem32K_40nm.xml diffeq1.v common 11.98 vpr 68.15 MiB 0.06 9324 -1 -1 15 0.35 -1 -1 34500 -1 54668 36 162 0 5 success v8.0.0-11548-gf337eb353-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-10-12T10:23:35 betzgrp-wintermute.eecg.utoronto.ca /home/singera8/vtr-verilog-to-routing/vtr_flow/tasks 69788 162 96 999 932 1 690 299 16 16 256 mult_36 auto 28.8 MiB 0.34 5749 83216 24669 51521 7026 68.2 MiB 0.64 0.01 21.0703 -1905.66 -21.0703 21.0703 0.51 0.00347553 0.00328327 0.306112 0.288446 -1 -1 -1 -1 46 12588 23 1.21132e+07 3.92018e+06 727248. 2840.81 6.10 1.15443 1.06726 24972 144857 -1 10123 18 3121 6008 939171 237744 22.8099 22.8099 -2079.35 -22.8099 0 0 934704. 3651.19 0.20 0.32 0.12 -1 -1 0.20 0.142001 0.132207 0.007787 0.3477 0.01624 0.6361 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_target_pin_util/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_target_pin_util/config/golden_results.txt index bda64892ecd..7a574b24ac2 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_target_pin_util/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_target_pin_util/config/golden_results.txt @@ -1,14 +1,14 @@ arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time -EArch.xml styr.blif common_--target_ext_pin_util_1 1.62 vpr 65.41 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 11 10 0 0 success v8.0.0-11523-gedbe7007c-dirty release IPO VTR_ASSERT_LEVEL=3 GNU 9.4.0 on Linux-5.4.0-190-generic x86_64 2024-10-08T10:24:38 qlsof04.quicklogic.om /home/smahmoudi/Desktop/vtr-verilog-to-routing/vtr_flow/tasks 66984 10 10 168 178 1 73 31 6 6 36 clb auto 26.8 MiB 0.35 388 415 68 333 14 65.4 MiB 0.01 0.00 2.34639 -27.0642 -2.34639 2.34639 0.05 0.000228673 0.000175923 0.00609493 0.00550053 -1 -1 -1 -1 28 870 46 646728 592834 52494.1 1458.17 0.49 0.108262 0.089482 2620 9165 -1 794 21 529 1674 71157 25809 2.9427 2.9427 -35.4244 -2.9427 0 0 62803.0 1744.53 0.01 0.04 0.01 -1 -1 0.01 0.0200748 0.0181887 -EArch.xml styr.blif common_--target_ext_pin_util_0.7 1.39 vpr 65.48 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 11 10 0 0 success v8.0.0-11523-gedbe7007c-dirty release IPO VTR_ASSERT_LEVEL=3 GNU 9.4.0 on Linux-5.4.0-190-generic x86_64 2024-10-08T10:24:38 qlsof04.quicklogic.om /home/smahmoudi/Desktop/vtr-verilog-to-routing/vtr_flow/tasks 67056 10 10 168 178 1 73 31 6 6 36 clb auto 27.0 MiB 0.28 388 415 68 333 14 65.5 MiB 0.01 0.00 2.34639 -27.0642 -2.34639 2.34639 0.04 0.000224577 0.000176202 0.00581101 0.0052752 -1 -1 -1 -1 28 870 46 646728 592834 52494.1 1458.17 0.48 0.106317 0.0876844 2620 9165 -1 794 21 529 1674 71157 25809 2.9427 2.9427 -35.4244 -2.9427 0 0 62803.0 1744.53 0.01 0.04 0.01 -1 -1 0.01 0.0196554 0.0178211 -EArch.xml styr.blif common_--target_ext_pin_util_0.1,0.5 5.29 vpr 65.93 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 91 10 0 0 success v8.0.0-11523-gedbe7007c-dirty release IPO VTR_ASSERT_LEVEL=3 GNU 9.4.0 on Linux-5.4.0-190-generic x86_64 2024-10-08T10:24:38 qlsof04.quicklogic.om /home/smahmoudi/Desktop/vtr-verilog-to-routing/vtr_flow/tasks 67512 10 10 168 178 1 162 111 14 14 196 clb auto 27.1 MiB 1.12 1407 6229 851 5099 279 65.9 MiB 0.06 0.00 3.06354 -37.0676 -3.06354 3.06354 0.55 0.000206438 0.000158678 0.00832218 0.00697942 -1 -1 -1 -1 38 2720 16 9.20055e+06 4.90435e+06 507946. 2591.56 2.08 0.078178 0.0644045 20344 105085 -1 2520 14 492 2053 126048 26624 3.22324 3.22324 -40.1119 -3.22324 0 0 641979. 3275.40 0.22 0.04 0.10 -1 -1 0.22 0.0140996 0.0127547 -EArch.xml styr.blif common_--target_ext_pin_util_0.5,0.3 1.74 vpr 65.60 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 13 10 0 0 success v8.0.0-11523-gedbe7007c-dirty release IPO VTR_ASSERT_LEVEL=3 GNU 9.4.0 on Linux-5.4.0-190-generic x86_64 2024-10-08T10:24:38 qlsof04.quicklogic.om /home/smahmoudi/Desktop/vtr-verilog-to-routing/vtr_flow/tasks 67172 10 10 168 178 1 75 33 7 7 49 clb auto 27.0 MiB 0.32 405 605 87 497 21 65.6 MiB 0.02 0.00 2.42913 -27.828 -2.42913 2.42913 0.09 0.00023428 0.000175158 0.0068992 0.00608985 -1 -1 -1 -1 26 1080 28 1.07788e+06 700622 75813.7 1547.22 0.46 0.0801437 0.0669814 3816 13734 -1 900 15 408 1287 59294 19424 2.94711 2.94711 -34.0547 -2.94711 0 0 91376.6 1864.83 0.02 0.03 0.01 -1 -1 0.02 0.017335 0.0159558 -EArch.xml styr.blif common_--target_ext_pin_util_0.0 4.05 vpr 65.35 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 104 10 0 0 success v8.0.0-11523-gedbe7007c-dirty release IPO VTR_ASSERT_LEVEL=3 GNU 9.4.0 on Linux-5.4.0-190-generic x86_64 2024-10-08T10:24:38 qlsof04.quicklogic.om /home/smahmoudi/Desktop/vtr-verilog-to-routing/vtr_flow/tasks 66916 10 10 168 178 1 163 124 14 14 196 clb auto 26.6 MiB 1.36 1464 6613 1027 5361 225 65.3 MiB 0.05 0.00 3.08045 -38.2145 -3.08045 3.08045 0.55 0.000217749 0.00016109 0.00708892 0.00582014 -1 -1 -1 -1 26 2975 12 9.20055e+06 5.60498e+06 387483. 1976.95 0.64 0.0408862 0.0344641 18784 74779 -1 2745 11 534 2254 137713 28805 3.67689 3.67689 -44.1872 -3.67689 0 0 467681. 2386.13 0.20 0.05 0.07 -1 -1 0.20 0.0155963 0.0142797 -EArch.xml styr.blif common_--target_ext_pin_util_clb_0.7 1.41 vpr 64.50 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 11 10 0 0 success v8.0.0-11523-gedbe7007c-dirty release IPO VTR_ASSERT_LEVEL=3 GNU 9.4.0 on Linux-5.4.0-190-generic x86_64 2024-10-08T10:24:38 qlsof04.quicklogic.om /home/smahmoudi/Desktop/vtr-verilog-to-routing/vtr_flow/tasks 66052 10 10 168 178 1 73 31 6 6 36 clb auto 25.9 MiB 0.18 388 415 68 333 14 64.5 MiB 0.02 0.00 2.34639 -27.0642 -2.34639 2.34639 0.04 0.000210211 0.000161049 0.0063202 0.00576416 -1 -1 -1 -1 28 870 46 646728 592834 52494.1 1458.17 0.47 0.103592 0.0853019 2620 9165 -1 794 21 529 1674 71157 25809 2.9427 2.9427 -35.4244 -2.9427 0 0 62803.0 1744.53 0.01 0.04 0.01 -1 -1 0.01 0.0200264 0.0181579 -EArch.xml styr.blif common_--target_ext_pin_util_clb_0.7_0.8 1.41 vpr 64.42 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 11 10 0 0 success v8.0.0-11523-gedbe7007c-dirty release IPO VTR_ASSERT_LEVEL=3 GNU 9.4.0 on Linux-5.4.0-190-generic x86_64 2024-10-08T10:24:38 qlsof04.quicklogic.om /home/smahmoudi/Desktop/vtr-verilog-to-routing/vtr_flow/tasks 65968 10 10 168 178 1 73 31 6 6 36 clb auto 25.8 MiB 0.18 388 415 68 333 14 64.4 MiB 0.02 0.00 2.34639 -27.0642 -2.34639 2.34639 0.04 0.000209163 0.000161192 0.00604823 0.00550465 -1 -1 -1 -1 28 870 46 646728 592834 52494.1 1458.17 0.47 0.104754 0.0867438 2620 9165 -1 794 21 529 1674 71157 25809 2.9427 2.9427 -35.4244 -2.9427 0 0 62803.0 1744.53 0.01 0.04 0.01 -1 -1 0.01 0.0212786 0.0192532 -EArch.xml styr.blif common_--target_ext_pin_util_clb_0.1_0.8 5.90 vpr 64.73 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 91 10 0 0 success v8.0.0-11523-gedbe7007c-dirty release IPO VTR_ASSERT_LEVEL=3 GNU 9.4.0 on Linux-5.4.0-190-generic x86_64 2024-10-08T10:24:38 qlsof04.quicklogic.om /home/smahmoudi/Desktop/vtr-verilog-to-routing/vtr_flow/tasks 66284 10 10 168 178 1 162 111 14 14 196 clb auto 26.1 MiB 1.34 1407 6229 851 5099 279 64.7 MiB 0.05 0.00 3.06354 -37.0676 -3.06354 3.06354 0.56 0.000206455 0.000158588 0.00775526 0.00639698 -1 -1 -1 -1 38 2720 16 9.20055e+06 4.90435e+06 507946. 2591.56 2.42 0.088006 0.0725574 20344 105085 -1 2520 14 492 2053 126048 26624 3.22324 3.22324 -40.1119 -3.22324 0 0 641979. 3275.40 0.22 0.04 0.10 -1 -1 0.22 0.0139184 0.0126334 -EArch.xml styr.blif common_--target_ext_pin_util_io_0.1,0.1_clb_0.7_0.8,1.0 1.43 vpr 64.41 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 11 10 0 0 success v8.0.0-11523-gedbe7007c-dirty release IPO VTR_ASSERT_LEVEL=3 GNU 9.4.0 on Linux-5.4.0-190-generic x86_64 2024-10-08T10:24:38 qlsof04.quicklogic.om /home/smahmoudi/Desktop/vtr-verilog-to-routing/vtr_flow/tasks 65956 10 10 168 178 1 73 31 6 6 36 clb auto 25.8 MiB 0.19 388 415 68 333 14 64.4 MiB 0.02 0.00 2.34639 -27.0642 -2.34639 2.34639 0.04 0.00023244 0.000183947 0.00669939 0.0061333 -1 -1 -1 -1 28 870 46 646728 592834 52494.1 1458.17 0.48 0.107288 0.088712 2620 9165 -1 794 21 529 1674 71157 25809 2.9427 2.9427 -35.4244 -2.9427 0 0 62803.0 1744.53 0.01 0.04 0.01 -1 -1 0.01 0.0207669 0.0188606 -EArch.xml styr.blif common_--target_ext_pin_util_-0.1 0.11 vpr 26.45 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 exited with return code 1 v8.0.0-11523-gedbe7007c-dirty release IPO VTR_ASSERT_LEVEL=3 GNU 9.4.0 on Linux-5.4.0-190-generic x86_64 2024-10-08T10:24:38 qlsof04.quicklogic.om /home/smahmoudi/Desktop/vtr-verilog-to-routing/vtr_flow/tasks 27084 10 10 168 178 1 -1 -1 -1 -1 -1 -1 -1 24.8 MiB 0.00 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -EArch.xml styr.blif common_--target_ext_pin_util_1.1 0.12 vpr 25.69 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 exited with return code 1 v8.0.0-11523-gedbe7007c-dirty release IPO VTR_ASSERT_LEVEL=3 GNU 9.4.0 on Linux-5.4.0-190-generic x86_64 2024-10-08T10:24:38 qlsof04.quicklogic.om /home/smahmoudi/Desktop/vtr-verilog-to-routing/vtr_flow/tasks 26308 10 10 168 178 1 -1 -1 -1 -1 -1 -1 -1 24.2 MiB 0.00 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -EArch.xml styr.blif common_--target_ext_pin_util_io_0.1,0.1_clb_0.7_0.8,1.0_1.0 0.12 vpr 26.38 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 exited with return code 1 v8.0.0-11523-gedbe7007c-dirty release IPO VTR_ASSERT_LEVEL=3 GNU 9.4.0 on Linux-5.4.0-190-generic x86_64 2024-10-08T10:24:38 qlsof04.quicklogic.om /home/smahmoudi/Desktop/vtr-verilog-to-routing/vtr_flow/tasks 27008 10 10 168 178 1 -1 -1 -1 -1 -1 -1 -1 24.9 MiB 0.00 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -EArch.xml styr.blif common_--target_ext_pin_util_io_0.1,0.1_clb_0.7_0.8,1.0_clb_1.0 0.12 vpr 25.84 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 exited with return code 1 v8.0.0-11523-gedbe7007c-dirty release IPO VTR_ASSERT_LEVEL=3 GNU 9.4.0 on Linux-5.4.0-190-generic x86_64 2024-10-08T10:24:38 qlsof04.quicklogic.om /home/smahmoudi/Desktop/vtr-verilog-to-routing/vtr_flow/tasks 26460 10 10 168 178 1 -1 -1 -1 -1 -1 -1 -1 24.4 MiB 0.00 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 +EArch.xml styr.blif common_--target_ext_pin_util_1 1.35 vpr 63.50 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 11 10 0 0 success v8.0.0-11548-gf337eb353-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-10-12T10:23:35 betzgrp-wintermute.eecg.utoronto.ca /home/singera8/vtr-verilog-to-routing/vtr_flow/tasks 65020 10 10 168 178 1 73 31 6 6 36 clb auto 24.8 MiB 0.14 407 463 89 357 17 63.5 MiB 0.02 0.00 2.36035 -27.3667 -2.36035 2.36035 0.04 0.000639236 0.000591353 0.00984498 0.00926038 -1 -1 -1 -1 32 838 28 646728 592834 58122.9 1614.52 0.53 0.203286 0.17206 2724 10283 -1 702 19 470 1535 59936 21931 2.39503 2.39503 -32.2138 -2.39503 0 0 70489.2 1958.03 0.01 0.05 0.01 -1 -1 0.01 0.0294657 0.0261082 +EArch.xml styr.blif common_--target_ext_pin_util_0.7 1.36 vpr 63.36 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 11 10 0 0 success v8.0.0-11548-gf337eb353-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-10-12T10:23:35 betzgrp-wintermute.eecg.utoronto.ca /home/singera8/vtr-verilog-to-routing/vtr_flow/tasks 64884 10 10 168 178 1 73 31 6 6 36 clb auto 24.6 MiB 0.14 407 463 89 357 17 63.4 MiB 0.02 0.00 2.36035 -27.3667 -2.36035 2.36035 0.04 0.000639716 0.000592026 0.0099357 0.0093488 -1 -1 -1 -1 32 838 28 646728 592834 58122.9 1614.52 0.53 0.201688 0.170527 2724 10283 -1 702 19 470 1535 59936 21931 2.39503 2.39503 -32.2138 -2.39503 0 0 70489.2 1958.03 0.01 0.05 0.01 -1 -1 0.01 0.0298547 0.02646 +EArch.xml styr.blif common_--target_ext_pin_util_0.1,0.5 3.94 vpr 64.05 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 91 10 0 0 success v8.0.0-11548-gf337eb353-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-10-12T10:23:35 betzgrp-wintermute.eecg.utoronto.ca /home/singera8/vtr-verilog-to-routing/vtr_flow/tasks 65592 10 10 168 178 1 162 111 14 14 196 clb auto 24.9 MiB 0.89 1425 5963 761 4903 299 64.1 MiB 0.05 0.00 3.12847 -37.0503 -3.12847 3.12847 0.42 0.000636581 0.000587323 0.0172709 0.0159953 -1 -1 -1 -1 20 2956 16 9.20055e+06 4.90435e+06 295730. 1508.82 1.35 0.0957477 0.0825025 18004 60473 -1 2785 13 638 2511 146344 31166 3.597 3.597 -45.2096 -3.597 0 0 387483. 1976.95 0.10 0.06 0.06 -1 -1 0.10 0.0212067 0.0187473 +EArch.xml styr.blif common_--target_ext_pin_util_0.5,0.3 1.23 vpr 63.33 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 13 10 0 0 success v8.0.0-11548-gf337eb353-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-10-12T10:23:35 betzgrp-wintermute.eecg.utoronto.ca /home/singera8/vtr-verilog-to-routing/vtr_flow/tasks 64852 10 10 168 178 1 75 33 7 7 49 clb auto 24.6 MiB 0.17 406 657 105 529 23 63.3 MiB 0.02 0.00 2.37613 -26.9385 -2.37613 2.37613 0.06 0.00063646 0.000588776 0.0117407 0.0110135 -1 -1 -1 -1 26 1250 31 1.07788e+06 700622 75813.7 1547.22 0.31 0.101863 0.0875653 3816 13734 -1 911 16 447 1582 77100 25463 2.91114 2.91114 -35.9881 -2.91114 0 0 91376.6 1864.83 0.02 0.05 0.01 -1 -1 0.02 0.0271153 0.0242202 +EArch.xml styr.blif common_--target_ext_pin_util_0.0 3.63 vpr 64.01 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 104 10 0 0 success v8.0.0-11548-gf337eb353-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-10-12T10:23:35 betzgrp-wintermute.eecg.utoronto.ca /home/singera8/vtr-verilog-to-routing/vtr_flow/tasks 65544 10 10 168 178 1 163 124 14 14 196 clb auto 25.2 MiB 0.96 1418 6922 992 5687 243 64.0 MiB 0.05 0.00 3.05445 -36.9858 -3.05445 3.05445 0.41 0.000641634 0.000592847 0.017123 0.0158404 -1 -1 -1 -1 24 2880 12 9.20055e+06 5.60498e+06 355930. 1815.97 1.01 0.0995734 0.0854586 18592 71249 -1 2826 12 527 2385 139582 29980 3.66329 3.66329 -43.9798 -3.66329 0 0 449262. 2292.15 0.11 0.05 0.07 -1 -1 0.11 0.020324 0.0180622 +EArch.xml styr.blif common_--target_ext_pin_util_clb_0.7 1.38 vpr 63.12 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 11 10 0 0 success v8.0.0-11548-gf337eb353-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-10-12T10:23:35 betzgrp-wintermute.eecg.utoronto.ca /home/singera8/vtr-verilog-to-routing/vtr_flow/tasks 64640 10 10 168 178 1 73 31 6 6 36 clb auto 24.5 MiB 0.14 407 463 89 357 17 63.1 MiB 0.02 0.00 2.36035 -27.3667 -2.36035 2.36035 0.04 0.000633422 0.000585646 0.0098961 0.00929741 -1 -1 -1 -1 32 838 28 646728 592834 58122.9 1614.52 0.53 0.202108 0.171036 2724 10283 -1 702 19 470 1535 59936 21931 2.39503 2.39503 -32.2138 -2.39503 0 0 70489.2 1958.03 0.01 0.05 0.01 -1 -1 0.01 0.0303475 0.0269842 +EArch.xml styr.blif common_--target_ext_pin_util_clb_0.7_0.8 1.35 vpr 63.32 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 11 10 0 0 success v8.0.0-11548-gf337eb353-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-10-12T10:23:35 betzgrp-wintermute.eecg.utoronto.ca /home/singera8/vtr-verilog-to-routing/vtr_flow/tasks 64836 10 10 168 178 1 73 31 6 6 36 clb auto 24.7 MiB 0.14 407 463 89 357 17 63.3 MiB 0.02 0.00 2.36035 -27.3667 -2.36035 2.36035 0.04 0.000638094 0.000590083 0.00989619 0.00930981 -1 -1 -1 -1 32 838 28 646728 592834 58122.9 1614.52 0.53 0.200907 0.169845 2724 10283 -1 702 19 470 1535 59936 21931 2.39503 2.39503 -32.2138 -2.39503 0 0 70489.2 1958.03 0.01 0.05 0.01 -1 -1 0.01 0.0298866 0.0264679 +EArch.xml styr.blif common_--target_ext_pin_util_clb_0.1_0.8 3.84 vpr 63.84 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 91 10 0 0 success v8.0.0-11548-gf337eb353-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-10-12T10:23:35 betzgrp-wintermute.eecg.utoronto.ca /home/singera8/vtr-verilog-to-routing/vtr_flow/tasks 65376 10 10 168 178 1 162 111 14 14 196 clb auto 24.8 MiB 0.87 1425 5963 761 4903 299 63.8 MiB 0.05 0.00 3.12847 -37.0503 -3.12847 3.12847 0.41 0.000641613 0.000592378 0.0171905 0.0159105 -1 -1 -1 -1 20 2956 16 9.20055e+06 4.90435e+06 295730. 1508.82 1.29 0.0945882 0.0814975 18004 60473 -1 2785 13 638 2511 146344 31166 3.597 3.597 -45.2096 -3.597 0 0 387483. 1976.95 0.09 0.06 0.06 -1 -1 0.09 0.0210426 0.0186659 +EArch.xml styr.blif common_--target_ext_pin_util_io_0.1,0.1_clb_0.7_0.8,1.0 1.34 vpr 63.39 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 11 10 0 0 success v8.0.0-11548-gf337eb353-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-10-12T10:23:35 betzgrp-wintermute.eecg.utoronto.ca /home/singera8/vtr-verilog-to-routing/vtr_flow/tasks 64912 10 10 168 178 1 73 31 6 6 36 clb auto 24.7 MiB 0.14 407 463 89 357 17 63.4 MiB 0.02 0.00 2.36035 -27.3667 -2.36035 2.36035 0.04 0.000641471 0.000587156 0.009815 0.00922212 -1 -1 -1 -1 32 838 28 646728 592834 58122.9 1614.52 0.53 0.200614 0.16952 2724 10283 -1 702 19 470 1535 59936 21931 2.39503 2.39503 -32.2138 -2.39503 0 0 70489.2 1958.03 0.01 0.05 0.01 -1 -1 0.01 0.0302449 0.0267933 +EArch.xml styr.blif common_--target_ext_pin_util_-0.1 0.12 vpr 24.80 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 exited with return code 1 v8.0.0-11548-gf337eb353-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-10-12T10:23:35 betzgrp-wintermute.eecg.utoronto.ca /home/singera8/vtr-verilog-to-routing/vtr_flow/tasks 25396 10 10 168 178 1 -1 -1 -1 -1 -1 -1 -1 22.7 MiB 0.00 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 +EArch.xml styr.blif common_--target_ext_pin_util_1.1 0.14 vpr 24.97 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 exited with return code 1 v8.0.0-11548-gf337eb353-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-10-12T10:23:35 betzgrp-wintermute.eecg.utoronto.ca /home/singera8/vtr-verilog-to-routing/vtr_flow/tasks 25568 10 10 168 178 1 -1 -1 -1 -1 -1 -1 -1 22.9 MiB 0.00 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 +EArch.xml styr.blif common_--target_ext_pin_util_io_0.1,0.1_clb_0.7_0.8,1.0_1.0 0.12 vpr 24.66 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 exited with return code 1 v8.0.0-11548-gf337eb353-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-10-12T10:23:35 betzgrp-wintermute.eecg.utoronto.ca /home/singera8/vtr-verilog-to-routing/vtr_flow/tasks 25252 10 10 168 178 1 -1 -1 -1 -1 -1 -1 -1 23.0 MiB 0.00 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 +EArch.xml styr.blif common_--target_ext_pin_util_io_0.1,0.1_clb_0.7_0.8,1.0_clb_1.0 0.12 vpr 24.93 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 exited with return code 1 v8.0.0-11548-gf337eb353-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-10-12T10:23:35 betzgrp-wintermute.eecg.utoronto.ca /home/singera8/vtr-verilog-to-routing/vtr_flow/tasks 25532 10 10 168 178 1 -1 -1 -1 -1 -1 -1 -1 22.6 MiB 0.00 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1