Merge branch 'floorplanning_legend' of https://github.com/verilog-to-routing/vtr-verilog-to-routing into floorplanning_legend

Author: jmah76

doc/src/api/vprinternals/draw_files.rst

@@ -26,6 +26,12 @@ draw_debug.h/cpp
    :project: vpr
    :sections: detaileddescription
 
+draw_floorplanning.h/cpp
+--------------
+.. doxygenfile:: draw_floorplanning.h
+   :project: vpr
+   :sections: detaileddescription
+
 draw_global.h/cpp
 --------------
 .. doxygenfile:: draw_global.h
@@ -120,4 +126,4 @@ ui_setup.h/cpp
 --------------
 .. doxygenfile:: ui_setup.h
    :project: vpr
-   :sections: detaileddescription
+   :sections: detaileddescription

doc/src/arch/reference.rst

@@ -2301,7 +2301,7 @@ The full format is documented below.
     Defined under the ``<switchfuncs>`` XML node, one or more ``<func...>`` entries is used to specify permutation functions that connect different sides of a switch block.
 
 
-.. arch:tag:: <wireconn num_conns="expr" from_type="string, string, string, ..." to_type="string, string, string, ..." from_switchpoint="int, int, int, ..." to_switchpoint="int, int, int, ..." from_order="{fixed | shuffled}" to_order="{fixed | shuffled}"/>
+.. arch:tag:: <wireconn num_conns="expr" from_type="string, string, string, ..." to_type="string, string, string, ..." from_switchpoint="int, int, int, ..." to_switchpoint="int, int, int, ..." from_order="{fixed | shuffled}" to_order="{fixed | shuffled}" switch_override="string"/>
 
     :req_param num_conns:
         Specifies how many connections should be created between the from_type/from_switchpoint set and the to_type/to_switchpoint set.
@@ -2401,6 +2401,14 @@ The full format is documented below.
 
         .. note:: See ``from_switchpoint_order`` for value descritpions.
 
+    :opt_param switch_override:
+
+        Specifies the name of a switch to be used to override the wire_switch of the segments in the ``to`` set. 
+        Can be used to create switch patterns where different switches are used for different types of connections. 
+        By using a zero-delay and zero-resistance switch one can also create T and L shaped wire segments.
+        
+        **Default:** If no override is specified, the usual wire_switch that drives the ``to`` wire will be used. 
+
     .. arch:tag:: <from type="string" switchpoint="int, int, int, ..."/>
 
         :req_param type:

doc/src/vpr/command_line_usage.rst

@@ -665,15 +665,26 @@ If any of init_t, exit_t or alpha_t is specified, the user schedule, with a fixe
     **Default:** ``on`` if timing-driven placement is specified, ``off`` otherwise.
 
 .. option:: --inner_num <float>
+    
+    The number of moves attempted at each temperature in placement can be calculated from inner_num scaled with circuit size or device-circuit size as specified in ``place_effort_scaling``. 
 
-    The number of moves attempted at each temperature is inner_num *  num_blocks^(4/3) in the circuit.
-    The number of blocks in a circuit is the number of pads plus the number of clbs.
     Changing inner_num is the best way to change the speed/quality tradeoff of the placer, as it leaves the highly-efficient automatic annealing schedule on and simply changes the number of moves per temperature.
 
     Specifying ``-inner_num 10`` will slow the placer by a factor of 10 while typically improving placement quality only by 10% or less (depends on the architecture).
     Hence users more concerned with quality than CPU time may find this a more appropriate value of inner_num.
 
-    **Default:** ``1.0``
+    **Default:** ``0.5``
+
+.. option:: --place_effort_scaling {circuit | device_circuit}
+
+    Controls how the number of placer moves level scales with circuit and device size:
+
+    * ``circuit``: The number of moves attempted at each temperature is inner_num *  num_blocks^(4/3) in the circuit.
+    * ``device_circuit``: The number of moves attempted at each temperature is inner_num * grid_size^(2/3) * num_blocks^(4/3) in the circuit.
+
+    The number of blocks in a circuit is the number of pads plus the number of clbs.
+
+    **Default:** ``circuit``
 
 .. option:: --init_t <float>
 

doc/src/vpr/graphics.rst

@@ -182,6 +182,11 @@ Button Description Table
 |                   |                   |                              |                              |
 |                   |                   |                              |                              |
 +-------------------+-------------------+------------------------------+------------------------------+
+| Draw Partitions   | Placement/Routing | Visualizes placement         |                              |
+|                   |                   | constraints                  |                              |
+|                   |                   |                              |                              |
+|                   |                   |                              |                              |
++-------------------+-------------------+------------------------------+------------------------------+
 | Place Macros      | Placement/Routing | Visualizes placement macros  |                              |
 |                   |                   |                              |                              |
 |                   |                   |                              |                              |

libs/libarchfpga/src/parse_switchblocks.cpp

@@ -41,16 +41,16 @@ using vtr::t_formula_data;
 /*---- Functions for Parsing Switchblocks from Architecture ----*/
 
 //Load an XML wireconn specification into a t_wireconn_inf
-t_wireconn_inf parse_wireconn(pugi::xml_node node, const pugiutil::loc_data& loc_data);
+t_wireconn_inf parse_wireconn(pugi::xml_node node, const pugiutil::loc_data& loc_data, const t_arch_switch_inf* switches, int num_switches);
 
 //Process the desired order of a wireconn
 static void parse_switchpoint_order(const char* order, SwitchPointOrder& switchpoint_order);
 
 //Process a wireconn defined in the inline style (using attributes)
-void parse_wireconn_inline(pugi::xml_node node, const pugiutil::loc_data& loc_data, t_wireconn_inf& wc);
+void parse_wireconn_inline(pugi::xml_node node, const pugiutil::loc_data& loc_data, t_wireconn_inf& wc, const t_arch_switch_inf* switches, int num_switches);
 
 //Process a wireconn defined in the multinode style (more advanced specification)
-void parse_wireconn_multinode(pugi::xml_node node, const pugiutil::loc_data& loc_data, t_wireconn_inf& wc);
+void parse_wireconn_multinode(pugi::xml_node node, const pugiutil::loc_data& loc_data, t_wireconn_inf& wc, const t_arch_switch_inf* switches, int num_switches);
 
 //Process a <from> or <to> sub-node of a multinode wireconn
 t_wire_switchpoints parse_wireconn_from_to_node(pugi::xml_node node, const pugiutil::loc_data& loc_data);
@@ -65,6 +65,9 @@ static void parse_comma_separated_wire_points(const char* ch, std::vector<t_wire
 /* Parses the number of connections type */
 static void parse_num_conns(std::string num_conns, t_wireconn_inf& wireconn);
 
+/* parse switch_override in wireconn */
+static void parse_switch_override(const char* switch_override, t_wireconn_inf& wireconn, const t_arch_switch_inf* switches, int num_switches);
+
 /* checks for correctness of a unidir switchblock. */
 static void check_unidir_switchblock(const t_switchblock_inf* sb);
 
@@ -79,7 +82,7 @@ static void check_wireconn(const t_arch* arch, const t_wireconn_inf& wireconn);
 /*---- Functions for Parsing Switchblocks from Architecture ----*/
 
 /* Reads-in the wire connections specified for the switchblock in the xml arch file */
-void read_sb_wireconns(const t_arch_switch_inf* /*switches*/, int /*num_switches*/, pugi::xml_node Node, t_switchblock_inf* sb, const pugiutil::loc_data& loc_data) {
+void read_sb_wireconns(const t_arch_switch_inf* switches, int num_switches, pugi::xml_node Node, t_switchblock_inf* sb, const pugiutil::loc_data& loc_data) {
     /* Make sure that Node is a switchblock */
     check_node(Node, "switchblock", loc_data);
 
@@ -94,33 +97,33 @@ void read_sb_wireconns(const t_arch_switch_inf* /*switches*/, int /*num_switches
         SubElem = get_first_child(Node, "wireconn", loc_data);
     }
     for (int i = 0; i < num_wireconns; i++) {
-        t_wireconn_inf wc = parse_wireconn(SubElem, loc_data);
+        t_wireconn_inf wc = parse_wireconn(SubElem, loc_data, switches, num_switches); // need to pass in switch info for switch override
         sb->wireconns.push_back(wc);
         SubElem = SubElem.next_sibling(SubElem.name());
     }
 
     return;
 }
 
-t_wireconn_inf parse_wireconn(pugi::xml_node node, const pugiutil::loc_data& loc_data) {
+t_wireconn_inf parse_wireconn(pugi::xml_node node, const pugiutil::loc_data& loc_data, const t_arch_switch_inf* switches, int num_switches) {
     t_wireconn_inf wc;
 
     size_t num_children = count_children(node, "from", loc_data, ReqOpt::OPTIONAL);
     num_children += count_children(node, "to", loc_data, ReqOpt::OPTIONAL);
 
     if (num_children == 0) {
-        parse_wireconn_inline(node, loc_data, wc);
+        parse_wireconn_inline(node, loc_data, wc, switches, num_switches);
     } else {
         VTR_ASSERT(num_children > 0);
-        parse_wireconn_multinode(node, loc_data, wc);
+        parse_wireconn_multinode(node, loc_data, wc, switches, num_switches);
     }
 
     return wc;
 }
 
-void parse_wireconn_inline(pugi::xml_node node, const pugiutil::loc_data& loc_data, t_wireconn_inf& wc) {
+void parse_wireconn_inline(pugi::xml_node node, const pugiutil::loc_data& loc_data, t_wireconn_inf& wc, const t_arch_switch_inf* switches, int num_switches) {
     //Parse an inline wireconn definition, using attributes
-    expect_only_attributes(node, {"num_conns", "from_type", "to_type", "from_switchpoint", "to_switchpoint", "from_order", "to_order"}, loc_data);
+    expect_only_attributes(node, {"num_conns", "from_type", "to_type", "from_switchpoint", "to_switchpoint", "from_order", "to_order", "switch_override"}, loc_data);
 
     /* get the connection style */
     const char* char_prop = get_attribute(node, "num_conns", loc_data).value();
@@ -147,9 +150,13 @@ void parse_wireconn_inline(pugi::xml_node node, const pugiutil::loc_data& loc_da
 
     char_prop = get_attribute(node, "to_order", loc_data, ReqOpt::OPTIONAL).value();
     parse_switchpoint_order(char_prop, wc.to_switchpoint_order);
+
+    // parse switch overrides if they exist:
+    char_prop = get_attribute(node, "switch_override", loc_data, ReqOpt::OPTIONAL).value();
+    parse_switch_override(char_prop, wc, switches, num_switches);
 }
 
-void parse_wireconn_multinode(pugi::xml_node node, const pugiutil::loc_data& loc_data, t_wireconn_inf& wc) {
+void parse_wireconn_multinode(pugi::xml_node node, const pugiutil::loc_data& loc_data, t_wireconn_inf& wc, const t_arch_switch_inf* switches, int num_switches) {
     expect_only_children(node, {"from", "to"}, loc_data);
 
     /* get the connection style */
@@ -162,6 +169,9 @@ void parse_wireconn_multinode(pugi::xml_node node, const pugiutil::loc_data& loc
     char_prop = get_attribute(node, "to_order", loc_data, ReqOpt::OPTIONAL).value();
     parse_switchpoint_order(char_prop, wc.to_switchpoint_order);
 
+    char_prop = get_attribute(node, "switch_override", loc_data, ReqOpt::OPTIONAL).value();
+    parse_switch_override(char_prop, wc, switches, num_switches);
+
     size_t num_from_children = count_children(node, "from", loc_data);
     size_t num_to_children = count_children(node, "to", loc_data);
 
@@ -331,6 +341,24 @@ void read_sb_switchfuncs(pugi::xml_node Node, t_switchblock_inf* sb, const pugiu
     return;
 }
 
+static void parse_switch_override(const char* switch_override, t_wireconn_inf& wireconn, const t_arch_switch_inf* switches, int num_switches) {
+    // sentinel value to use default driving switch for the receiving wire type
+    if (switch_override == std::string("")) {
+        wireconn.switch_override_indx = DEFAULT_SWITCH; //Default
+        return;
+    }
+
+    // iterate through the valid switch names in the arch looking for the requested switch_override
+    for (int i = 0; i < num_switches; i++) {
+        if (0 == strcmp(switch_override, switches[i].name)) {
+            wireconn.switch_override_indx = i;
+            return;
+        }
+    }
+    // if we haven't found a switch that matched, then throw an error
+    archfpga_throw(__FILE__, __LINE__, "Unknown switch_override specified in wireconn of custom switch blocks: \"%s\"\n", switch_override);
+}
+
 /* checks for correctness of switch block read-in from the XML architecture file */
 void check_switchblock(const t_switchblock_inf* sb, const t_arch* arch) {
     /* get directionality */

libs/libarchfpga/src/physical_types.h

@@ -450,6 +450,10 @@ struct t_class {
 struct t_class_range {
     int low = 0;
     int high = 0;
+    // Returns the total number of classes
+    int total_num() const {
+        return high - low + 1;
+    }
 };
 
 enum e_power_wire_type {
@@ -613,11 +617,14 @@ struct t_physical_tile_type {
 
     std::vector<t_class> class_inf; /* [0..num_class-1] */
 
+    std::unordered_map<int, t_class> internal_class_inf;
+
     std::vector<int> pin_width_offset;  // [0..num_pins-1]
     std::vector<int> pin_height_offset; // [0..num_pins-1]
     std::vector<int> pin_class;         // [0..num_pins-1]
-    std::vector<bool> is_ignored_pin;   // [0..num_pins-1]
-    std::vector<bool> is_pin_global;    // [0..num_pins-1]
+    std::unordered_map<int, int> internal_pin_class;
+    std::vector<bool> is_ignored_pin; // [0..num_pins-1]
+    std::vector<bool> is_pin_global;  // [0..num_pins-1]
 
     std::vector<t_fc_specification> fc_specs;
 
@@ -725,6 +732,9 @@ struct t_sub_tile {
                                ///>      indices ranging from 4 to 7.
     t_class_range class_range;
 
+    std::vector<std::unordered_map<t_logical_block_type_ptr, int>> starting_internal_class_idx;
+    std::vector<std::unordered_map<t_logical_block_type_ptr, int>> starting_internal_pin_idx;
+
     int num_phy_pins = 0;
 
     int index = -1;
@@ -818,6 +828,15 @@ struct t_physical_tile_port {
  * index: Keep track of type in array for easy access
  * physical_tile_index: index of the corresponding physical tile type
  *
+ * pin_logical_num_to_pb_pin_mapping: Contains all the pins, including pins on the root-level block and internal pins, in
+ * the logical block. The key of this map is the logical number of the pin, and the value is a pointer to the
+ * corresponding pb_graph_pin
+ *
+ * pb_pin_to_class_logical_num_mapping: Maps each pin to its corresponding class's logical number. To retrieve the actual class, use this number as an
+ * index to logical_class_inf.
+ *
+ * logical_class_inf: Contains all the classes inside the logical block. The index of each class is the logical number associate with the class.
+ *
  * A logical block is the implementation of a component's functionality of the FPGA device
  * and it identifies its logical behaviour and internal connections.
  *
@@ -840,6 +859,10 @@ struct t_logical_block_type {
     std::vector<t_physical_tile_type_ptr> equivalent_tiles; ///>List of physical tiles at which one could
                                                             ///>place this type of netlist block.
 
+    std::unordered_map<int, const t_pb_graph_pin*> pin_logical_num_to_pb_pin_mapping;   /* pin_logical_num_to_pb_pin_mapping[pin logical number] -> pb_graph_pin ptr} */
+    std::unordered_map<const t_pb_graph_pin*, int> pb_pin_to_class_logical_num_mapping; /* pb_pin_to_class_logical_num_mapping[pb_graph_pin ptr] -> class logical number */
+    std::vector<t_class> logical_class_inf;                                             /* logical_class_inf[class_logical_number] -> class */
+
     // Is this t_logical_block_type empty?
     bool is_empty() const;
 };
@@ -1688,6 +1711,8 @@ struct t_wireconn_inf {
     std::vector<t_wire_switchpoints> to_switchpoint_set;               //The set of segment/wirepoints representing the 'to' set (union of all t_wire_switchpoints in vector)
     SwitchPointOrder from_switchpoint_order = SwitchPointOrder::FIXED; //The desired from_switchpoint_set ordering
     SwitchPointOrder to_switchpoint_order = SwitchPointOrder::FIXED;   //The desired to_switchpoint_set ordering
+    int switch_override_indx = DEFAULT_SWITCH;                         // index in switch array of the switch used to override wire_switch of the 'to' set.
+                                                                       // DEFAULT_SWITCH is a sentinel value (i.e. the usual driving switch from a wire for the receiving wire will be used)
 
     std::string num_conns_formula; /* Specifies how many connections should be made for this wireconn.
                                     *