add rr_chanx/y_list to device context

Author: soheilshahrouz

vpr/src/base/vpr_context.h

@@ -268,6 +268,9 @@ struct DeviceContext : public Context {
     /// Stores the number of CHANY wire segments in each routing channel at [layer][x][y]
     vtr::NdMatrix<int, 3> rr_chany_width;
 
+    std::vector<int> rr_chanx_list;
+    std::vector<int> rr_chany_list;
+
     bool rr_graph_is_flat = false;
 
     /*

vpr/src/draw/draw.cpp

@@ -463,25 +463,17 @@ void init_draw_coords(float clb_width, const BlkLocRegistry& blk_loc_registry) {
         }
     }
 
-    std::vector<int> chanx_width_list(grid.height(), 0);
-    std::vector<int> chany_width_list(grid.width(), 0);
-
-    for (t_physical_tile_loc loc : grid.all_locations()) {
-        chanx_width_list[loc.y] = std::max(device_ctx.rr_chanx_width[loc.layer_num][loc.x][loc.y], chanx_width_list[loc.y]);
-        chany_width_list[loc.x] = std::max(device_ctx.rr_chany_width[loc.layer_num][loc.x][loc.y], chany_width_list[loc.x]);
-    }
-
     size_t j = 0;
     for (size_t i = 0; i < grid.width() - 1; i++) {
         draw_coords->tile_x[i] = (i * draw_coords->get_tile_width()) + j;
-        j += chany_width_list[i] + 1; // N wires need N+1 units of space
+        j += device_ctx.rr_chany_list[i] + 1; // N wires need N+1 units of space
     }
     draw_coords->tile_x[grid.width() - 1] = (grid.width() - 1) * draw_coords->get_tile_width() + j;
 
     j = 0;
     for (size_t i = 0; i < device_ctx.grid.height() - 1; ++i) {
         draw_coords->tile_y[i] = (i * draw_coords->get_tile_width()) + j;
-        j += chanx_width_list[i] + 1;
+        j += device_ctx.rr_chanx_list[i] + 1;
     }
     draw_coords->tile_y[grid.height() - 1] = (grid.height() - 1) * draw_coords->get_tile_width() + j;
 

vpr/src/route/rr_graph_generation/rr_graph.cpp

@@ -379,14 +379,10 @@ static int get_delayless_switch_id(const t_det_routing_arch& det_routing_arch,
 /**
  * @brief Calculates the routing channel width at each grid location.
  *
- * Iterates through all RR nodes and counts how many wires pass through each (x, y) location
+ * Iterates through all RR nodes and counts how many wires pass through each (layer, x, y) location
  * for both horizontal (CHANX) and vertical (CHANY) channels.
- *
- * @return A pair of 3D matrices:
- *         - First: CHANX width per [layer][x][y]
- *         - Second: CHANY width per [layer][x][y]
  */
-static std::pair<vtr::NdMatrix<int, 3>, vtr::NdMatrix<int, 3>> calculate_channel_width();
+static void alloc_and_init_channel_width();
 
 /******************* Subroutine definitions *******************************/
 
@@ -545,7 +541,7 @@ void create_rr_graph(e_graph_type graph_type,
                            device_ctx.rr_graph.rr_nodes(),
                            is_flat);
 
-    std::tie(mutable_device_ctx.rr_chanx_width, mutable_device_ctx.rr_chany_width) = calculate_channel_width();
+    alloc_and_init_channel_width();
 
     print_rr_graph_stats();
 
@@ -1130,19 +1126,19 @@ static int get_delayless_switch_id(const t_det_routing_arch& det_routing_arch,
     return delayless_switch;
 }
 
-static std::pair<vtr::NdMatrix<int, 3>, vtr::NdMatrix<int, 3>> calculate_channel_width() {
-    const auto& device_ctx = g_vpr_ctx.device();
-    const auto& rr_graph = device_ctx.rr_graph;
+static void alloc_and_init_channel_width() {
+    DeviceContext& mutable_device_ctx = g_vpr_ctx.mutable_device();
+    const DeviceGrid& grid = mutable_device_ctx.grid;
+    const auto& rr_graph = mutable_device_ctx.rr_graph;
+
+    vtr::NdMatrix<int, 3>& chanx_width = mutable_device_ctx.rr_chanx_width;
+    vtr::NdMatrix<int, 3>& chany_width = mutable_device_ctx.rr_chany_width;
 
-    auto chanx_width = vtr::NdMatrix<int, 3>({{device_ctx.grid.get_num_layers(),
-                                               device_ctx.grid.width(),
-                                               device_ctx.grid.height()}},
-                                             0);
+    chanx_width.resize({grid.get_num_layers(), grid.width(), grid.height()});
+    chany_width.resize({grid.get_num_layers(), grid.width(), grid.height()});
 
-    auto chany_width = vtr::NdMatrix<int, 3>({{device_ctx.grid.get_num_layers(),
-                                               device_ctx.grid.width(),
-                                               device_ctx.grid.height()}},
-                                             0);
+    chanx_width.fill(0);
+    chany_width.fill(0);
 
     for (RRNodeId node_id : rr_graph.nodes()) {
         e_rr_type rr_type = rr_graph.node_type(node_id);
@@ -1162,7 +1158,19 @@ static std::pair<vtr::NdMatrix<int, 3>, vtr::NdMatrix<int, 3>> calculate_channel
         }
     }
 
-    return {chanx_width, chany_width};
+    std::vector<int>& chanx_width_list = mutable_device_ctx.rr_chanx_list;
+    std::vector<int>& chany_width_list = mutable_device_ctx.rr_chany_list;
+
+    chanx_width_list.resize(grid.height());
+    chany_width_list.resize(grid.width());
+
+    std::ranges::fill(chanx_width_list, 0);
+    std::ranges::fill(chany_width_list, 0);
+
+    for (t_physical_tile_loc loc : grid.all_locations()) {
+        chanx_width_list[loc.y] = std::max(chanx_width[loc.layer_num][loc.x][loc.y], chanx_width_list[loc.y]);
+        chany_width_list[loc.x] = std::max(chany_width[loc.layer_num][loc.x][loc.y], chany_width_list[loc.x]);
+    }
 }
 
 void build_tile_rr_graph(RRGraphBuilder& rr_graph_builder,