rename Switchblock_Lookup --> SwitchblockLookupKey

Author: soheilshahrouz

vpr/src/route/rr_graph_generation/build_switchblocks.cpp

@@ -226,7 +226,7 @@ static void compute_wireconn_connections(
     e_directionality directionality,
     const t_chan_details& from_chan_details,
     const t_chan_details& to_chan_details,
-    Switchblock_Lookup sb_conn,
+    SwitchblockLookupKey sb_conn,
     int from_x,
     int from_y,
     int from_layer,
@@ -793,7 +793,7 @@ static void compute_wire_connections(int x_coord,
     from_x = from_y = to_x = to_y = from_layer = to_layer = UNDEFINED;
 
     SBSideConnection side_conn(from_side, to_side);                              /* for indexing into this switchblock's permutation funcs */
-    Switchblock_Lookup sb_conn(x_coord, y_coord, layer_coord, from_side, to_side); /* for indexing into FPGA's switchblock map */
+    SwitchblockLookupKey sb_conn(x_coord, y_coord, layer_coord, from_side, to_side); /* for indexing into FPGA's switchblock map */
 
     // Can't connect a switchblock side to itself
     if (from_side == to_side) {
@@ -853,7 +853,7 @@ static void compute_wireconn_connections(
     e_directionality directionality,
     const t_chan_details& from_chan_details,
     const t_chan_details& to_chan_details,
-    Switchblock_Lookup sb_conn,
+    SwitchblockLookupKey sb_conn,
     int from_x,
     int from_y,
     int from_layer,
@@ -1024,7 +1024,7 @@ static void compute_wireconn_connections(
                 //
                 //Coverity flags this (false positive), so annotate coverity ignores it:
                 // coverity[swapped_arguments : Intentional]
-                Switchblock_Lookup sb_conn_reverse(sb_conn.x_coord, sb_conn.y_coord, sb_conn.layer_coord, sb_conn.to_side, sb_conn.from_side);
+                SwitchblockLookupKey sb_conn_reverse(sb_conn.x_coord, sb_conn.y_coord, sb_conn.layer_coord, sb_conn.to_side, sb_conn.from_side);
                 (*sb_conns)[sb_conn_reverse].push_back(sb_reverse_edge);
             }
         }

vpr/src/route/rr_graph_generation/build_switchblocks.h

@@ -16,7 +16,7 @@
  * Used to index into a map which specifies which destination wire segments this source wire should
  * connect to.
  */
-class Switchblock_Lookup {
+class SwitchblockLookupKey {
   public:
     int x_coord;      ///< x coordinate of switchblock connection
     int y_coord;      ///< y coordinate of switchblock connection
@@ -25,17 +25,17 @@ class Switchblock_Lookup {
     e_side to_side;   ///< destination side of switchblock connection
 
     /// @brief Empty constructor initializes everything to 0
-    Switchblock_Lookup() {
+    SwitchblockLookupKey() {
         x_coord = y_coord = layer_coord = -1; //TODO: use set function
     }
 
     /// @brief Constructor for initializing member variables
-    Switchblock_Lookup(int set_x, int set_y, int set_layer, e_side set_from, e_side set_to) {
+    SwitchblockLookupKey(int set_x, int set_y, int set_layer, e_side set_from, e_side set_to) {
         this->set_coords(set_x, set_y, set_layer, set_from, set_to);
     }
 
     /// @brief Constructor for initializing member variables with default layer number (0), used for single die FPGA
-    Switchblock_Lookup(int set_x, int set_y, e_side set_from, e_side set_to) {
+    SwitchblockLookupKey(int set_x, int set_y, e_side set_from, e_side set_to) {
         this->set_coords(set_x, set_y, 0, set_from, set_to);
     }
 
@@ -49,7 +49,7 @@ class Switchblock_Lookup {
     }
 
     /// @brief Overload == operator which is used by std::unordered_map
-    bool operator==(const Switchblock_Lookup& obj) const {
+    bool operator==(const SwitchblockLookupKey& obj) const {
         bool result;
         if (x_coord == obj.x_coord && y_coord == obj.y_coord
             && from_side == obj.from_side && to_side == obj.to_side
@@ -63,7 +63,7 @@ class Switchblock_Lookup {
 };
 
 struct t_hash_Switchblock_Lookup {
-    size_t operator()(const Switchblock_Lookup& obj) const noexcept {
+    size_t operator()(const SwitchblockLookupKey& obj) const noexcept {
         std::size_t hash = std::hash<int>{}(obj.x_coord);
         vtr::hash_combine(hash, obj.y_coord);
         vtr::hash_combine(hash, obj.layer_coord);
@@ -106,7 +106,7 @@ struct t_switchblock_edge {
  * A matrix specifying connections for all switchblocks in an FPGA would be sparse and possibly very large,
  * so we use an unordered map to take advantage of the sparsity.
  */
-typedef std::unordered_map<Switchblock_Lookup, std::vector<t_switchblock_edge>, t_hash_Switchblock_Lookup> t_sb_connection_map;
+typedef std::unordered_map<SwitchblockLookupKey, std::vector<t_switchblock_edge>, t_hash_Switchblock_Lookup> t_sb_connection_map;
 
 /************ Functions ************/
 

vpr/src/route/rr_graph_generation/rr_graph2.cpp

@@ -1085,7 +1085,7 @@ vtr::NdMatrix<int, 2> get_number_track_to_track_inter_die_conn(t_sb_connection_m
                         if (!is_sb_conn_layer_crossing(from_side, to_side)) { //this connection is not crossing any layer
                             continue;
                         } else {
-                            Switchblock_Lookup sb_coord(x, y, layer, from_side, to_side);
+                            SwitchblockLookupKey sb_coord(x, y, layer, from_side, to_side);
                             if (sb_conn_map->count(sb_coord) > 0) {
                                 std::vector<t_switchblock_edge>& conn_vector = (*sb_conn_map)[sb_coord];
                                 for (int iconn = 0; iconn < (int)conn_vector.size(); ++iconn) {
@@ -1533,7 +1533,7 @@ static void get_switchblocks_edges(RRGraphBuilder& rr_graph_builder,
     auto& device_ctx = g_vpr_ctx.device();
 
     /* get coordinate to index into the SB map */
-    Switchblock_Lookup sb_coord(tile_x, tile_y, layer, from_side, to_side);
+    SwitchblockLookupKey sb_coord(tile_x, tile_y, layer, from_side, to_side);
     if (sb_conn_map->count(sb_coord) > 0) {
         /* get reference to the connections vector which lists all destination wires for a given source wire
          * at a specific coordinate sb_coord */