lint error solved

amirarjmand93 · amirarjmand93 · commit bddc654b3e43 · 2024-12-16T00:23:48.000-04:00
diff --git a/vtr_flow/benchmarks/system_verilog/f4pga/button_controller/make_sv_flattened.py b/vtr_flow/benchmarks/system_verilog/f4pga/button_controller/make_sv_flattened.py
diff --git a/vtr_flow/benchmarks/system_verilog/f4pga/pulse_width_led/make_sv_flattened.py b/vtr_flow/benchmarks/system_verilog/f4pga/pulse_width_led/make_sv_flattened.py
@@ -1,3 +1,7 @@
+"""
+Module for flattening the SV design files.
+"""
+
 import os
 import re
 
diff --git a/vtr_flow/benchmarks/system_verilog/f4pga/timer/make_sv_flattened.py b/vtr_flow/benchmarks/system_verilog/f4pga/timer/make_sv_flattened.py
@@ -1,3 +1,7 @@
+"""
+Module for flattening the SV design files.
+"""
+
 import os
 import re
 
