[core] resolve conflicts

Author: tangxifan

vpr/src/route/rr_graph.cpp

@@ -593,14 +593,6 @@ static void alloc_rr_switch_inf(RRGraphBuilder& rr_graph_builder,
                                 t_arch_switch_fanin& arch_switch_fanins,
                                 const std::map<int, t_arch_switch_inf>& arch_sw_map);
 
-static void rr_graph_externals(const std::vector<t_segment_inf>& segment_inf,
-                               const std::vector<t_segment_inf>& segment_inf_x,
-                               const std::vector<t_segment_inf>& segment_inf_y,
-                               int wire_to_rr_ipin_switch,
-                               enum e_base_cost_type base_cost_type);
-
-static t_clb_to_clb_directs* alloc_and_load_clb_to_clb_directs(const std::vector<t_direct_inf>& directs, const int delayless_switch);
-
 static t_seg_details* alloc_and_load_global_route_seg_details(const int global_route_switch,
                                                               int* num_seg_details = nullptr);
 
@@ -838,7 +830,7 @@ void create_rr_graph(const t_graph_type graph_type,
                                                det_routing_arch->R_minW_nmos,
                                                det_routing_arch->R_minW_pmos,
                                                router_opts.base_cost_type,
-                                               directs, directs.size(),
+                                               directs,
                                                &det_routing_arch->wire_to_rr_ipin_switch,
                                                det_routing_arch->shrink_boundary,                                  /* Shrink to the smallest boundary, no routing wires for empty zone */
                                                det_routing_arch->perimeter_cb,                                  /* Now I/O or any programmable blocks on perimeter can have full cb access (both cbx and cby) */
@@ -4348,7 +4340,7 @@ static void build_unidir_rr_opins(RRGraphBuilder& rr_graph_builder,
  * This data structure supplements the the info in the "directs" data structure
  * TODO: The function that does this parsing in placement is poorly done because it lacks generality on heterogeniety, should replace with this one
  */
-static t_clb_to_clb_directs* alloc_and_load_clb_to_clb_directs(const std::vector<t_direct_inf>& directs, int delayless_switch) {
+t_clb_to_clb_directs* alloc_and_load_clb_to_clb_directs(const std::vector<t_direct_inf>& directs, int delayless_switch) {
     t_clb_to_clb_directs* clb_to_clb_directs;
     t_physical_tile_type_ptr physical_tile = nullptr;
     t_physical_tile_port tile_port;

vpr/src/route/rr_graph.h

@@ -62,7 +62,7 @@ void rr_graph_externals(const std::vector<t_segment_inf>& segment_inf,
                         int wire_to_rr_ipin_switch,
                         enum e_base_cost_type base_cost_type);
 
-t_clb_to_clb_directs* alloc_and_load_clb_to_clb_directs(const t_direct_inf* directs, const int num_directs, int delayless_switch);
+t_clb_to_clb_directs* alloc_and_load_clb_to_clb_directs(const std::vector<t_direct_inf>& directs, const int delayless_switch);
 
 std::vector<vtr::Matrix<int>> alloc_and_load_actual_fc(const std::vector<t_physical_tile_type>& types,
                                                        const int max_pins,

vpr/src/tileable_rr_graph/tileable_rr_graph_builder.cpp

@@ -81,8 +81,7 @@ void build_tileable_unidir_rr_graph(const std::vector<t_physical_tile_type>& typ
                                     const float R_minW_nmos,
                                     const float R_minW_pmos,
                                     const enum e_base_cost_type& base_cost_type,
-                                    const t_direct_inf* directs,
-                                    const int& num_directs,
+                                    const std::vector<t_direct_inf>& directs,
                                     int* wire_to_rr_ipin_switch,
                                     const bool& shrink_boundary,
                                     const bool& perimeter_cb,
@@ -269,20 +268,18 @@ void build_tileable_unidir_rr_graph(const std::vector<t_physical_tile_type>& typ
      ***********************************************************************/
     /* Create data structure of direct-connections */
     t_clb_to_clb_directs* clb_to_clb_directs = NULL;
-    if (num_directs > 0) {
-        clb_to_clb_directs = alloc_and_load_clb_to_clb_directs(directs, num_directs, delayless_switch);
+    if (!directs.empty()) {
+        clb_to_clb_directs = alloc_and_load_clb_to_clb_directs(directs, delayless_switch);
     }
-    std::vector<t_direct_inf> arch_directs;
     std::vector<t_clb_to_clb_directs> clb2clb_directs;
-    for (int idirect = 0; idirect < num_directs; ++idirect) {
-        arch_directs.push_back(directs[idirect]);
+    for (size_t idirect = 0; idirect < directs.size(); ++idirect) {
         /* Sanity checks on rr switch id */
         VTR_ASSERT(true == device_ctx.rr_graph.valid_switch(RRSwitchId(clb_to_clb_directs[idirect].switch_index)));
         clb2clb_directs.push_back(clb_to_clb_directs[idirect]);
     }
 
     build_rr_graph_direct_connections(device_ctx.rr_graph, device_ctx.rr_graph_builder, device_ctx.grid, 0,
-                                      arch_directs, clb2clb_directs);
+                                      directs, clb2clb_directs);
 
     /* Allocate and load routing resource switches, which are derived from the switches from the architecture file,
      * based on their fanin in the rr graph. This routine also adjusts the rr nodes to point to these new rr switches */

vpr/src/tileable_rr_graph/tileable_rr_graph_builder.h

@@ -26,8 +26,7 @@ void build_tileable_unidir_rr_graph(const std::vector<t_physical_tile_type>& typ
                                     const float R_minW_nmos,
                                     const float R_minW_pmos,
                                     const enum e_base_cost_type& base_cost_type,
-                                    const t_direct_inf* directs,
-                                    const int& num_directs,
+                                    const std::vector<t_direct_inf>& directs,
                                     int* wire_to_rr_ipin_switch,
                                     const bool& shrink_boundary,
                                     const bool& perimeter_cb,