Merge branch 'master' of https://github.com/verilog-to-routing/vtr-verilog-to-routing into remove_node

Author: amin1377

libs/EXTERNAL/libblifparse/src/blif_parser.y

@@ -193,12 +193,12 @@ subckt: DOT_SUBCKT STRING       { $$ = SubCkt(); $$.model = $2; }
 latch: DOT_LATCH STRING STRING {
                                     //Input and output only
                                     callback.lineno(lexer.lineno()); 
-                                    callback.latch($2, $3, LatchType::UNSPECIFIED, "", LogicValue::UNKOWN);
+                                    callback.latch($2, $3, LatchType::UNSPECIFIED, "", LogicValue::UNKNOWN);
                                }
     | DOT_LATCH STRING STRING latch_type latch_control {
                                     //Input, output, type and control
                                     callback.lineno(lexer.lineno()); 
-                                    callback.latch($2, $3, $4, $5, LogicValue::UNKOWN);
+                                    callback.latch($2, $3, $4, $5, LogicValue::UNKNOWN);
                                }
     | DOT_LATCH STRING STRING latch_type latch_control latch_init {
                                     //Input, output, type, control and init-value
@@ -215,7 +215,7 @@ latch: DOT_LATCH STRING STRING {
 latch_init: LOGIC_TRUE { $$ = LogicValue::TRUE; }
     | LOGIC_FALSE { $$ = LogicValue::FALSE; }
     | LATCH_INIT_2 { $$ = LogicValue::DONT_CARE; }
-    | LATCH_INIT_3 { $$ = LogicValue::UNKOWN; }
+    | LATCH_INIT_3 { $$ = LogicValue::UNKNOWN; }
     ;
 
 latch_control: STRING { $$ = $1;}

libs/EXTERNAL/libblifparse/src/blif_pretty_print.cpp

@@ -112,7 +112,7 @@ void BlifPrettyPrinter::latch(std::string input, std::string output, LatchType t
         case LogicValue::FALSE:     printf("%s0", indent().c_str()); break;
         case LogicValue::TRUE:      printf("%s1", indent().c_str()); break;
         case LogicValue::DONT_CARE: printf("%s2", indent().c_str()); break;
-        case LogicValue::UNKOWN:    printf("%s3", indent().c_str()); break;
+        case LogicValue::UNKNOWN:   printf("%s3", indent().c_str()); break;
         default: assert(false);
     }
     --indent_level_;

libs/EXTERNAL/libblifparse/src/blifparse.hpp

@@ -108,7 +108,7 @@ enum class LogicValue {
     FALSE = 0,  //Logic zero
     TRUE = 1,   //Logic one
     DONT_CARE,     //Don't care
-    UNKOWN  //Unkown (e.g. latch initial state)
+    UNKNOWN  //Unkown (e.g. latch initial state)
 };
 
 enum class LatchType {

libs/EXTERNAL/libtatum/libtatum/tatum/base/TimingType.hpp

@@ -7,7 +7,7 @@ namespace tatum {
 enum class TimingType {
     SETUP,
     HOLD,
-    UNKOWN
+    UNKNOWN
 };
 
 } //namespace

libs/EXTERNAL/libtatum/libtatum/tatum/report/TimingPath.hpp

@@ -39,7 +39,7 @@ class TimingPathInfo {
         DomainId capture_domain() const { return capture_domain_; }
 
     private:
-        TimingType path_type_ = TimingType::UNKOWN;
+        TimingType path_type_ = TimingType::UNKNOWN;
 
         Time delay_;
         Time slack_;

libs/EXTERNAL/libtatum/libtatum/tatum/report/graphviz_dot_writer.cpp

@@ -38,7 +38,7 @@ void GraphvizDotWriter::write_dot_file(std::ostream& os) {
     for(NodeId node : nodes_to_dump_) {
         node_slacks[node] = std::vector<TimingTag>(); //No slacks
     }
-    TimingType timing_type = TimingType::UNKOWN;
+    TimingType timing_type = TimingType::UNKNOWN;
 
     write_dot_format(os, node_tags, node_slacks, timing_type);
 }
@@ -175,7 +175,7 @@ void GraphvizDotWriter::write_dot_edge(std::ostream& os, const EdgeId edge, cons
             } else if (timing_type == TimingType::HOLD) {
                 os << "\\n"<< delay_calc_.hold_time(tg_, edge) << " (thld)";
             } else {
-                TATUM_ASSERT(timing_type == TimingType::UNKOWN);
+                TATUM_ASSERT(timing_type == TimingType::UNKNOWN);
                 //Create both setup and hold edges if type is unknown
                 os << "\\n"<< -delay_calc_.setup_time(tg_, edge) << " (-tsu)";
                 os << "\\n"<< delay_calc_.hold_time(tg_, edge) << " (thld)";
@@ -190,7 +190,7 @@ void GraphvizDotWriter::write_dot_edge(std::ostream& os, const EdgeId edge, cons
             } else if (timing_type == TimingType::HOLD) {
                 os << "\\n" << delay_calc_.min_edge_delay(tg_, edge);
             } else {
-                TATUM_ASSERT(timing_type == TimingType::UNKOWN);
+                TATUM_ASSERT(timing_type == TimingType::UNKNOWN);
                 os << "\\n" << delay_calc_.max_edge_delay(tg_, edge) << " (tmax)";
                 os << "\\n" << delay_calc_.min_edge_delay(tg_, edge) << " (tmin)";
             }

libs/librrgraph/src/io/rr_graph_reader.cpp

@@ -66,8 +66,6 @@ void load_rr_file(RRGraphBuilder* rr_graph_builder,
                   const t_arch* arch,
                   t_chan_width* chan_width,
                   const e_base_cost_type base_cost_type,
-                  RRSwitchId* wire_to_rr_ipin_switch,
-                  int* wire_to_rr_ipin_switch_between_dice,
                   const char* read_rr_graph_name,
                   std::string* loaded_rr_graph_filename,
                   bool read_edge_metadata,
@@ -90,8 +88,6 @@ void load_rr_file(RRGraphBuilder* rr_graph_builder,
     RrGraphSerializer reader(
         graph_type,
         base_cost_type,
-        wire_to_rr_ipin_switch,
-        wire_to_rr_ipin_switch_between_dice,
         do_check_rr_graph,
         read_rr_graph_name,
         loaded_rr_graph_filename,

libs/librrgraph/src/io/rr_graph_reader.h

@@ -23,8 +23,6 @@ void load_rr_file(RRGraphBuilder* rr_graph_builder,
                   const t_arch* arch,
                   t_chan_width* chan_width,
                   const e_base_cost_type base_cost_type,
-                  RRSwitchId* wire_to_rr_ipin_switch,
-                  int* wire_to_rr_ipin_switch_between_dice,
                   const char* read_rr_graph_name,
                   std::string* loaded_rr_graph_filename,
                   bool read_edge_metadata,

libs/librrgraph/src/io/rr_graph_uxsdcxx_serializer.h

@@ -274,8 +274,6 @@ class RrGraphSerializer final : public uxsd::RrGraphBase<RrGraphContextTypes> {
     RrGraphSerializer(
         const e_graph_type graph_type,
         const enum e_base_cost_type base_cost_type,
-        RRSwitchId* wire_to_rr_ipin_switch,
-        int* wire_to_rr_ipin_switch_between_dice,
         bool do_check_rr_graph,
         const char* read_rr_graph_name,
         std::string* loaded_rr_graph_filename,
@@ -297,9 +295,7 @@ class RrGraphSerializer final : public uxsd::RrGraphBase<RrGraphContextTypes> {
         MetadataStorage<std::tuple<int, int, short>>* rr_edge_metadata,
         vtr::string_internment* strings,
         bool is_flat)
-        : wire_to_rr_ipin_switch_(wire_to_rr_ipin_switch)
-        , wire_to_rr_ipin_switch_between_dice_(wire_to_rr_ipin_switch_between_dice)
-        , chan_width_(chan_width)
+        : chan_width_(chan_width)
         , rr_nodes_(rr_nodes)
         , rr_graph_builder_(rr_graph_builder)
         , rr_graph_(rr_graph)
@@ -1147,20 +1143,6 @@ class RrGraphSerializer final : public uxsd::RrGraphBase<RrGraphContextTypes> {
         return nullptr;
     }
     inline void finish_rr_graph_rr_edges(void*& /*ctx*/) final {
-        /*initialize a vector that keeps track of the number of wire to ipin switches
-         * There should be only one wire to ipin switch. In case there are more, make sure to
-         * store the most frequent switch */
-        const auto& rr_graph = (*rr_graph_);
-        std::vector<int> count_for_wire_to_ipin_switches;
-        count_for_wire_to_ipin_switches.resize(rr_switch_inf_->size(), 0);
-        //switch for same layer Track to IPIN connection
-        //first is index, second is count
-        std::pair<int, int> most_frequent_switch(-1, 0);
-        //switch for different layer Track to IPIN connection
-        std::vector<int> count_for_wire_to_ipin_switches_between_dice;
-        count_for_wire_to_ipin_switches_between_dice.resize(rr_switch_inf_->size(), 0);
-        std::pair<int,int> most_frequent_switch_between_dice(-1,0);
-
         // Partition the rr graph edges for efficient access to
         // configurable/non-configurable edge subsets. Must be done after RR
         // switches have been allocated.
@@ -1183,36 +1165,8 @@ class RrGraphSerializer final : public uxsd::RrGraphBase<RrGraphContextTypes> {
                         "switch_id %zu is larger than num_rr_switches %zu",
                         switch_id, rr_switch_inf_->size());
                 }
-                auto node = (*rr_nodes_)[source_node];
-
-                /*Keeps track of the number of the specific type of switch that connects a wire to an ipin
-                 * use the pair data structure to keep the maximum*/
-                if (rr_graph.node_type(node.id()) == e_rr_type::CHANX || rr_graph.node_type(node.id()) == e_rr_type::CHANY) {
-                    if(rr_graph.node_type(RRNodeId(sink_node)) == e_rr_type::IPIN){
-                        if (rr_graph.node_layer_low(RRNodeId(sink_node)) == rr_graph.node_layer_low(RRNodeId(source_node))) {
-                            count_for_wire_to_ipin_switches[switch_id]++;
-                            if (count_for_wire_to_ipin_switches[switch_id] > most_frequent_switch.second) {
-                                most_frequent_switch.first = switch_id;
-                                most_frequent_switch.second = count_for_wire_to_ipin_switches[switch_id];
-                            }
-                        } else {
-                            VTR_ASSERT(rr_graph.node_layer_low(RRNodeId(sink_node)) != rr_graph.node_layer_low(RRNodeId(source_node)));
-                            count_for_wire_to_ipin_switches_between_dice[switch_id]++;
-                            if(count_for_wire_to_ipin_switches_between_dice[switch_id] > most_frequent_switch_between_dice.second){
-                                most_frequent_switch_between_dice.first = switch_id;
-                                most_frequent_switch_between_dice.second = count_for_wire_to_ipin_switches_between_dice[switch_id];
-                            }
-                        }
-                    }
-                }
             }
         }
-
-        VTR_ASSERT(wire_to_rr_ipin_switch_ != nullptr);
-        *wire_to_rr_ipin_switch_ = (RRSwitchId)most_frequent_switch.first;
-
-        VTR_ASSERT(wire_to_rr_ipin_switch_between_dice_ != nullptr);
-        *wire_to_rr_ipin_switch_between_dice_ = most_frequent_switch_between_dice.first;
     }
 
     inline EdgeWalker get_rr_graph_rr_edges(void*& /*ctx*/) final {
@@ -1844,7 +1798,6 @@ class RrGraphSerializer final : public uxsd::RrGraphBase<RrGraphContextTypes> {
             segment_inf_y_,
             segment_inf_z_,
             *rr_indexed_data_,
-            *wire_to_rr_ipin_switch_,
             base_cost_type_,
             echo_enabled_,
             echo_file_name_);
@@ -2194,8 +2147,6 @@ class RrGraphSerializer final : public uxsd::RrGraphBase<RrGraphContextTypes> {
     std::array<uxsd::enum_loc_side, 16> side_map_;
 
     // Output for loads, and constant data for writes.
-    RRSwitchId* wire_to_rr_ipin_switch_;
-    int* wire_to_rr_ipin_switch_between_dice_;
     t_chan_width* chan_width_;
     t_rr_graph_storage* rr_nodes_;
     RRGraphBuilder* rr_graph_builder_;

libs/librrgraph/src/io/rr_graph_writer.cpp

@@ -42,8 +42,6 @@ void write_rr_graph(RRGraphBuilder* rr_graph_builder,
     RrGraphSerializer reader(
         /*graph_type=*/e_graph_type(),
         /*base_cost_type=*/e_base_cost_type(),
-        /*wire_to_rr_ipin_switch=*/nullptr,
-        /*wire_to_rr_ipin_switch_between_dice=*/nullptr,
         /*do_check_rr_graph=*/false,
         /*read_rr_graph_name=*/nullptr,
         /*read_rr_graph_filename=*/nullptr,