make format

Author: soheilshahrouz

libs/libarchfpga/src/parse_switchblocks.cpp

@@ -150,7 +150,6 @@ static t_wireconn_inf parse_wireconn(pugi::xml_node node,
         VTR_ASSERT(num_children > 0);
         return parse_wireconn_multinode(node, loc_data, switches);
     }
-
 }
 
 static t_wireconn_inf parse_wireconn_inline(pugi::xml_node node,

libs/librrgraph/src/base/check_rr_graph.cpp

@@ -165,7 +165,7 @@ void check_rr_graph(const RRGraphView& rr_graph,
                           inode, rr_node_typename[rr_type], to_node, rr_node_typename[to_rr_type], num_edges_to_node);
             }
 
-            //Between two wire segments
+            // Between two wire segments
             VTR_ASSERT_MSG(to_rr_type == e_rr_type::CHANX || to_rr_type == e_rr_type::CHANY || to_rr_type == e_rr_type::IPIN, "Expect channel type or input pin type");
             VTR_ASSERT_MSG(rr_type == e_rr_type::CHANX || rr_type == e_rr_type::CHANY || rr_type == e_rr_type::OPIN, "Expect channel type or output pin type");
 
@@ -190,7 +190,7 @@ void check_rr_graph(const RRGraphView& rr_graph,
                  */
                 if ((to_rr_type == e_rr_type::CHANX || to_rr_type == e_rr_type::CHANY)
                     && (rr_type == e_rr_type::CHANX || rr_type == e_rr_type::CHANY)) {
-                    auto switch_type = rr_graph.rr_switch_inf(RRSwitchId(kv.first)).type();
+                    SwitchType switch_type = rr_graph.rr_switch_inf(RRSwitchId(kv.first)).type();
 
                     VPR_ERROR(VPR_ERROR_ROUTE, "in check_rr_graph: node %d has %d redundant connections to node %d of switch type %d (%s)",
                               inode, kv.second, to_node, kv.first, SWITCH_TYPE_STRINGS[size_t(switch_type)]);
@@ -202,14 +202,14 @@ void check_rr_graph(const RRGraphView& rr_graph,
         check_unbuffered_edges(rr_graph, inode);
 
         //Check that all config/non-config edges are appropriately organized
-        for (auto edge : rr_graph.configurable_edges(RRNodeId(inode))) {
+        for (t_edge_size edge : rr_graph.configurable_edges(RRNodeId(inode))) {
             if (!rr_graph.edge_is_configurable(RRNodeId(inode), edge)) {
                 VPR_FATAL_ERROR(VPR_ERROR_ROUTE, "in check_rr_graph: node %d edge %d is non-configurable, but in configurable edges",
                                 inode, edge);
             }
         }
 
-        for (auto edge : rr_graph.non_configurable_edges(RRNodeId(inode))) {
+        for (t_edge_size edge : rr_graph.non_configurable_edges(RRNodeId(inode))) {
             if (rr_graph.edge_is_configurable(RRNodeId(inode), edge)) {
                 VPR_FATAL_ERROR(VPR_ERROR_ROUTE, "in check_rr_graph: node %d edge %d is configurable, but in non-configurable edges",
                                 inode, edge);
@@ -528,40 +528,33 @@ void check_rr_node(const RRGraphView& rr_graph,
 static void check_unbuffered_edges(const RRGraphView& rr_graph, int from_node) {
     /* This routine checks that all pass transistors in the routing truly are  *
      * bidirectional.  It may be a slow check, so don't use it all the time.   */
-
-    int from_edge, to_node, to_edge, from_num_edges, to_num_edges;
-    e_rr_type from_rr_type, to_rr_type;
-    short from_switch_type;
-    bool trans_matched;
-
-    from_rr_type = rr_graph.node_type(RRNodeId(from_node));
+    e_rr_type from_rr_type = rr_graph.node_type(RRNodeId(from_node));
     if (from_rr_type != e_rr_type::CHANX && from_rr_type != e_rr_type::CHANY)
         return;
 
-    from_num_edges = rr_graph.num_edges(RRNodeId(from_node));
+    int from_num_edges = rr_graph.num_edges(RRNodeId(from_node));
 
-    for (from_edge = 0; from_edge < from_num_edges; from_edge++) {
-        to_node = size_t(rr_graph.edge_sink_node(RRNodeId(from_node), from_edge));
-        to_rr_type = rr_graph.node_type(RRNodeId(to_node));
+    for (int from_edge = 0; from_edge < from_num_edges; from_edge++) {
+        RRNodeId to_node = rr_graph.edge_sink_node(RRNodeId(from_node), from_edge);
+        e_rr_type to_rr_type = rr_graph.node_type(to_node);
 
         if (to_rr_type != e_rr_type::CHANX && to_rr_type != e_rr_type::CHANY)
             continue;
 
-        from_switch_type = rr_graph.edge_switch(RRNodeId(from_node), from_edge);
+        short from_switch_type = rr_graph.edge_switch(RRNodeId(from_node), from_edge);
 
         if (rr_graph.rr_switch_inf(RRSwitchId(from_switch_type)).buffered())
             continue;
 
-        /* We know that we have a pass transistor from from_node to to_node. Now *
-         * check that there is a corresponding edge from to_node back to         *
-         * from_node.                                                            */
+        // We know that we have a pass transistor from from_node to to_node. Now
+        // check that there is a corresponding edge from to_node back to from_node.
 
-        to_num_edges = rr_graph.num_edges(RRNodeId(to_node));
-        trans_matched = false;
+        int to_num_edges = rr_graph.num_edges(to_node);
+        bool trans_matched = false;
 
-        for (to_edge = 0; to_edge < to_num_edges; to_edge++) {
-            if (size_t(rr_graph.edge_sink_node(RRNodeId(to_node), to_edge)) == size_t(from_node)
-                && rr_graph.edge_switch(RRNodeId(to_node), to_edge) == from_switch_type) {
+        for (int to_edge = 0; to_edge < to_num_edges; to_edge++) {
+            if (size_t(rr_graph.edge_sink_node(to_node, to_edge)) == size_t(from_node)
+                && rr_graph.edge_switch(to_node, to_edge) == from_switch_type) {
                 trans_matched = true;
                 break;
             }

libs/librrgraph/src/base/rr_graph_obj.cpp

@@ -152,7 +152,7 @@ RRIndexedDataId RRGraph::node_cost_index(const RRNodeId& node) const {
     return RRIndexedDataId(node_cost_indices_[node]);
 }
 
-Direction RRGraph::node_direction(const RRNodeId& node) const {
+Direction RRGraph::node_direction(RRNodeId node) const {
     VTR_ASSERT_SAFE(valid_node_id(node));
     VTR_ASSERT_MSG(node_type(node) == e_rr_type::CHANX || node_type(node) == e_rr_type::CHANY, "Direction valid only for CHANX/CHANY RR nodes");
     return node_directions_[node];

libs/librrgraph/src/base/rr_graph_obj.h

@@ -414,7 +414,7 @@ class RRGraph {
      * see node coordinate for details 
      * only matters the routing track nodes (CHANX and CHANY) 
      */
-    Direction node_direction(const RRNodeId& node) const;
+    Direction node_direction(RRNodeId node) const;
 
     /* Get the side where the node physically locates on a logic block. 
      * Mainly applicable to IPIN and OPIN nodes, which locates on the perimeter of logic block 

libs/libvtrutil/src/vtr_string_view.h

@@ -43,8 +43,6 @@ class string_view {
         return *this;
     }
 
-
-
     ///@brief indexing [] operator (immutable)
     constexpr char operator[](size_t pos) const {
         return data_[pos];

vpr/src/route/rr_graph_generation/build_switchblocks.cpp

@@ -821,7 +821,7 @@ static void compute_wire_connections(int x_coord,
     }
 
     const t_wire_type_sizes& wire_type_sizes_from = (from_chan_type == e_rr_type::CHANY) ? wire_type_sizes_y : wire_type_sizes_x;
-    const t_wire_type_sizes& wire_type_sizes_to = (to_chan_type   == e_rr_type::CHANY) ? wire_type_sizes_y : wire_type_sizes_x;
+    const t_wire_type_sizes& wire_type_sizes_to = (to_chan_type == e_rr_type::CHANY) ? wire_type_sizes_y : wire_type_sizes_x;
 
     // Iterate over all the wire connections specified for this switch block
     for (int iconn = 0; iconn < (int)sb.wireconns.size(); iconn++) {

vpr/src/route/rr_graph_generation/rr_graph2.cpp

@@ -1109,7 +1109,6 @@ vtr::NdMatrix<int, 2> get_number_track_to_track_inter_die_conn(t_sb_connection_m
                                 }
                             }
                         }
-
                     }
                 }
                 extra_nodes_per_switchblocks[x][y] += ((num_of_3d_conn + custom_3d_sb_fanin_fanout - 1) / custom_3d_sb_fanin_fanout);