@@ -609,164 +609,142 @@ void draw_routed_net(ParentNetId net_id, ezgl::renderer* g) {
609609// Draws the set of rr_nodes specified, using the colors set in draw_state
610610void draw_partial_route (const std::vector<RRNodeId>& rr_nodes_to_draw, ezgl::renderer* g) {
611611 t_draw_state* draw_state = get_draw_state_vars ();
612- t_draw_coords* draw_coords = get_draw_coords_vars ();
613612 auto & device_ctx = g_vpr_ctx.device ();
614613 const auto & rr_graph = device_ctx.rr_graph ;
615614
616615 // Draw Pins
617- for (RRNodeId inode : rr_nodes_to_draw) {
618-
616+ for (size_t i = 1 ; i < rr_nodes_to_draw.size (); ++i) {
617+ RRNodeId inode = rr_nodes_to_draw[i];
618+ auto rr_type = rr_graph.node_type (inode);
619619 bool is_inode_inter_cluster = is_inter_cluster_node (rr_graph, inode);
620+ int node_layer = rr_graph.node_layer (inode);
620621
622+ ezgl::color color = draw_state->draw_rr_node [inode].color ;
621623
622- }
624+ // For 3D architectures, draw only visible layers
625+ if (!draw_state->draw_layer_display [node_layer].visible ) {
626+ continue ;
627+ }
623628
629+ // Skip drawing sources and sinks
630+ if (rr_type == e_rr_type::SINK || rr_type == e_rr_type::SOURCE){
631+ continue ;
632+ }
633+
634+ // Draw intra-cluster nodes
635+ if (!is_inode_inter_cluster) {
636+ draw_rr_intrapin (inode, color, g);
637+ continue ;
638+ }
639+
640+ // Draw IO Pins
641+ if (rr_type == e_rr_type::OPIN || rr_type == e_rr_type::IPIN) {
642+ draw_rr_pin (inode, color, g);
643+ continue ;
644+ }
624645
646+ // Draw Channels
647+ if (rr_type == e_rr_type::CHANY || rr_type == e_rr_type::CHANX) {
648+ draw_rr_chan (inode, color, g);
649+ continue ;
650+ }
651+ }
625652
626653 // Draw Edges
627654 for (size_t i = 1 ; i < rr_nodes_to_draw.size (); ++i) {
655+
628656 RRNodeId inode = rr_nodes_to_draw[i];
629657 auto rr_type = rr_graph.node_type (inode);
658+ bool is_inode_inter_cluster = is_inter_cluster_node (rr_graph, inode);
659+ int current_node_layer = rr_graph.node_layer (inode);
630660
631661 RRNodeId prev_node = rr_nodes_to_draw[i - 1 ];
632662 auto prev_type = rr_graph.node_type (RRNodeId (prev_node));
633-
634- bool is_inode_inter_cluster = is_inter_cluster_node (rr_graph, inode);
635663 bool is_prev_node_inter_cluster = is_inter_cluster_node (rr_graph, prev_node);
636-
637- int current_node_layer = rr_graph.node_layer (inode);
638664 int prev_node_layer = rr_graph.node_layer (prev_node);
665+
639666 t_draw_layer_display edge_visibility = get_element_visibility_and_transparency (prev_node_layer, current_node_layer);
667+ ezgl::color color = draw_state->draw_rr_node [inode].color ;
640668
641- // Don't draw node if the layer of the node is not set to visible on screen
642- if (!draw_state->draw_layer_display [current_node_layer].visible ) {
669+ // For 3D architectures, draw only visible layers
670+ if (!draw_state->draw_layer_display [current_node_layer].visible || !edge_visibility. visible ) {
643671 continue ;
644672 }
645673
646- ezgl::color color = draw_state->draw_rr_node [inode].color ;
647-
648674 // Skip drawing sources and sinks
649- if (rr_graph. node_type (inode) == e_rr_type::SINK || rr_graph. node_type (inode) == e_rr_type::SOURCE || rr_graph. node_type (prev_node) == e_rr_type::SINK || rr_graph. node_type (prev_node) == e_rr_type::SOURCE) {
675+ if (rr_type == e_rr_type::SINK || rr_type == e_rr_type::SOURCE || prev_type == e_rr_type::SINK || prev_type == e_rr_type::SOURCE) {
650676 continue ;
651677 }
652678
653- if (!is_inode_inter_cluster && !is_prev_node_inter_cluster) {
654-
655- auto blk_id_pin_id1 = get_rr_node_cluster_blk_id_pb_graph_pin (inode);
656- auto blk_id_pin_id2 = get_rr_node_cluster_blk_id_pb_graph_pin (prev_node);
657-
658- ezgl::point2d p1 = draw_coords->get_absolute_pin_location (blk_id_pin_id1.first , blk_id_pin_id1.second );
659- ezgl::point2d p2 = draw_coords->get_absolute_pin_location (blk_id_pin_id2.first , blk_id_pin_id2.second );
660-
661- g->set_color (color, edge_visibility.alpha );
662- g->draw_line (p1, p2);
663- g->draw_text (p1, blk_id_pin_id1.second ->parent_node ->pb_type ->name , 50 , 0.5 * 20 );
679+ g->set_color (color, edge_visibility.alpha );
664680
681+ if (!is_inode_inter_cluster && !is_prev_node_inter_cluster) {
682+ draw_intrapin_to_intrapin (inode, prev_node, g);
665683 continue ;
666684 }
667685
668686 if (!is_inode_inter_cluster || !is_prev_node_inter_cluster) {
669- bool swap = false ;
670- if (!is_inode_inter_cluster && is_prev_node_inter_cluster) {
671- // Swap the nodes so that the inter-cluster node is always the current node
672- std::swap (inode, prev_node);
673- swap = true ;
674- }
675-
676- auto blk_id_pin_id = get_rr_node_cluster_blk_id_pb_graph_pin (prev_node);
677- float x1, y1;
678- ezgl::point2d p2 = draw_coords->get_absolute_pin_location (blk_id_pin_id.first , blk_id_pin_id.second );
679-
680-
681- for (const e_side& pin_side : TOTAL_2D_SIDES) {
682- if (!rr_graph.is_node_on_specific_side (RRNodeId (inode), pin_side)) {
683- continue ;
684- }
685- draw_get_rr_pin_coords (inode, &x1, &y1, pin_side);
686- g->set_color (color, edge_visibility.alpha );
687- g->draw_line ({x1, y1}, p2);
688- }
689-
687+ draw_intrapin_to_pin (inode, prev_node, g);
690688 continue ;
691-
692689 }
693690
694691 auto iedge = find_edge (prev_node, inode);
695692 auto switch_type = rr_graph.edge_switch (RRNodeId (prev_node), iedge);
696693
697694 switch (rr_type) {
698- case e_rr_type::OPIN: {
699- draw_rr_pin (inode, color, g);
700- break ;
701- }
702695 case e_rr_type::IPIN: {
703- draw_rr_pin (inode, color, g);
704- if (edge_visibility.visible ) {
705- g->set_color (color, edge_visibility.alpha );
706- if (rr_graph.node_type (prev_node) == e_rr_type::OPIN) {
707- draw_pin_to_pin (prev_node, inode, g);
708- } else {
709- draw_pin_to_chan_edge (inode, prev_node, g);
710- }
696+ if (rr_graph.node_type (prev_node) == e_rr_type::OPIN) {
697+ draw_pin_to_pin (prev_node, inode, g);
698+ } else {
699+ draw_pin_to_chan_edge (inode, prev_node, g);
711700 }
712701 break ;
713702 }
714703 case e_rr_type::CHANX: {
715- draw_rr_chan (inode, color, g);
716- if (edge_visibility.visible ) {
717- g->set_color (color, edge_visibility.alpha );
718- switch (prev_type) {
719- case e_rr_type::CHANX: {
720- draw_chanx_to_chanx_edge (prev_node, inode, switch_type, g);
721- break ;
722- }
723- case e_rr_type::CHANY: {
724- draw_chanx_to_chany_edge (inode, prev_node, FROM_Y_TO_X, switch_type, g);
725- break ;
726- }
727- case e_rr_type::OPIN: {
728- draw_pin_to_chan_edge (prev_node, inode, g);
729- break ;
730- }
731- default : {
732- VPR_ERROR (VPR_ERROR_OTHER,
733- " Unexpected connection from an rr_node of type %d to one of type %d.\n " ,
734- prev_type, rr_type);
735- }
704+ switch (prev_type) {
705+ case e_rr_type::CHANX: {
706+ draw_chanx_to_chanx_edge (prev_node, inode, switch_type, g);
707+ break ;
708+ }
709+ case e_rr_type::CHANY: {
710+ draw_chanx_to_chany_edge (inode, prev_node, FROM_Y_TO_X, switch_type, g);
711+ break ;
712+ }
713+ case e_rr_type::OPIN: {
714+ draw_pin_to_chan_edge (prev_node, inode, g);
715+ break ;
716+ }
717+ default : {
718+ VPR_ERROR (VPR_ERROR_OTHER,
719+ " Unexpected connection from an rr_node of type %d to one of type %d.\n " ,
720+ prev_type, rr_type);
736721 }
737722 }
738-
739723 break ;
740724 }
741725 case e_rr_type::CHANY: {
742- draw_rr_chan (inode, color, g);
743-
744- if (edge_visibility.visible ) {
745- g->set_color (color, edge_visibility.alpha );
746- switch (prev_type) {
747- case e_rr_type::CHANX: {
748- draw_chanx_to_chany_edge (prev_node, inode,
749- FROM_X_TO_Y, switch_type, g);
750- break ;
751- }
752- case e_rr_type::CHANY: {
753- draw_chany_to_chany_edge (RRNodeId (prev_node), RRNodeId (inode),
754- switch_type, g);
755- break ;
756- }
757- case e_rr_type::OPIN: {
758- draw_pin_to_chan_edge (prev_node, inode, g);
726+ switch (prev_type) {
727+ case e_rr_type::CHANX: {
728+ draw_chanx_to_chany_edge (prev_node, inode,
729+ FROM_X_TO_Y, switch_type, g);
730+ break ;
731+ }
732+ case e_rr_type::CHANY: {
733+ draw_chany_to_chany_edge (RRNodeId (prev_node), RRNodeId (inode),
734+ switch_type, g);
735+ break ;
736+ }
737+ case e_rr_type::OPIN: {
738+ draw_pin_to_chan_edge (prev_node, inode, g);
759739
760- break ;
761- }
762- default : {
763- VPR_ERROR (VPR_ERROR_OTHER,
764- " Unexpected connection from an rr_node of type %d to one of type %d.\n " ,
765- prev_type, rr_type);
766- }
740+ break ;
741+ }
742+ default : {
743+ VPR_ERROR (VPR_ERROR_OTHER,
744+ " Unexpected connection from an rr_node of type %d to one of type %d.\n " ,
745+ prev_type, rr_type);
767746 }
768747 }
769-
770748 break ;
771749 }
772750 default : {
0 commit comments