33 * "LICENSE" for information on usage and redistribution of this file.
44 */
55
6+ #if !RV32_HAS (SYSTEM )
7+ #error "Do not manage to build this file unless you enable system support."
8+ #endif
9+
610#include "riscv_private.h"
711
812static bool ppn_is_valid (riscv_t * rv , uint32_t ppn )
@@ -153,8 +157,7 @@ MMU_FAULT_CHECK_IMPL(write, pagefault_store)
153157 : addr & MASK(RV_PG_SHIFT); \
154158 } while (0)
155159
156- /*
157- * The IO handler that operates when the Memory Management Unit (MMU)
160+ /* The IO handler that operates when the Memory Management Unit (MMU)
158161 * is enabled during system emulation is responsible for managing
159162 * input/output operations. These callbacks are designed to implement
160163 * the riscv_io_t interface, ensuring compatibility and consistency to
@@ -178,9 +181,8 @@ static uint32_t mmu_ifetch(riscv_t *rv, const uint32_t addr)
178181 uint32_t level ;
179182 uint32_t * pte = mmu_walk (rv , addr , & level );
180183 bool ok = MMU_FAULT_CHECK (ifetch , rv , pte , addr , PTE_X );
181- if (unlikely (!ok )) {
184+ if (unlikely (!ok ))
182185 pte = mmu_walk (rv , addr , & level );
183- }
184186
185187 get_ppn_and_offset ();
186188 return memory_ifetch (ppn | offset );
@@ -194,9 +196,8 @@ static uint32_t mmu_read_w(riscv_t *rv, const uint32_t addr)
194196 uint32_t level ;
195197 uint32_t * pte = mmu_walk (rv , addr , & level );
196198 bool ok = MMU_FAULT_CHECK (read , rv , pte , addr , PTE_R );
197- if (unlikely (!ok )) {
199+ if (unlikely (!ok ))
198200 pte = mmu_walk (rv , addr , & level );
199- }
200201
201202 get_ppn_and_offset ();
202203 return memory_read_w (ppn | offset );
@@ -210,9 +211,8 @@ static uint16_t mmu_read_s(riscv_t *rv, const uint32_t addr)
210211 uint32_t level ;
211212 uint32_t * pte = mmu_walk (rv , addr , & level );
212213 bool ok = MMU_FAULT_CHECK (read , rv , pte , addr , PTE_R );
213- if (unlikely (!ok )) {
214+ if (unlikely (!ok ))
214215 pte = mmu_walk (rv , addr , & level );
215- }
216216
217217 get_ppn_and_offset ();
218218 return memory_read_s (ppn | offset );
@@ -226,9 +226,8 @@ static uint8_t mmu_read_b(riscv_t *rv, const uint32_t addr)
226226 uint32_t level ;
227227 uint32_t * pte = mmu_walk (rv , addr , & level );
228228 bool ok = MMU_FAULT_CHECK (read , rv , pte , addr , PTE_R );
229- if (unlikely (!ok )) {
229+ if (unlikely (!ok ))
230230 pte = mmu_walk (rv , addr , & level );
231- }
232231
233232 get_ppn_and_offset ();
234233 return memory_read_b (ppn | offset );
@@ -242,9 +241,8 @@ static void mmu_write_w(riscv_t *rv, const uint32_t addr, const uint32_t val)
242241 uint32_t level ;
243242 uint32_t * pte = mmu_walk (rv , addr , & level );
244243 bool ok = MMU_FAULT_CHECK (write , rv , pte , addr , PTE_W );
245- if (unlikely (!ok )) {
244+ if (unlikely (!ok ))
246245 pte = mmu_walk (rv , addr , & level );
247- }
248246
249247 get_ppn_and_offset ();
250248 memory_write_w (ppn | offset , (uint8_t * ) & val );
@@ -258,9 +256,8 @@ static void mmu_write_s(riscv_t *rv, const uint32_t addr, const uint16_t val)
258256 uint32_t level ;
259257 uint32_t * pte = mmu_walk (rv , addr , & level );
260258 bool ok = MMU_FAULT_CHECK (write , rv , pte , addr , PTE_W );
261- if (unlikely (!ok )) {
259+ if (unlikely (!ok ))
262260 pte = mmu_walk (rv , addr , & level );
263- }
264261
265262 get_ppn_and_offset ();
266263 memory_write_s (ppn | offset , (uint8_t * ) & val );
@@ -274,9 +271,8 @@ static void mmu_write_b(riscv_t *rv, const uint32_t addr, const uint8_t val)
274271 uint32_t level ;
275272 uint32_t * pte = mmu_walk (rv , addr , & level );
276273 bool ok = MMU_FAULT_CHECK (write , rv , pte , addr , PTE_W );
277- if (unlikely (!ok )) {
274+ if (unlikely (!ok ))
278275 pte = mmu_walk (rv , addr , & level );
279- }
280276
281277 get_ppn_and_offset ();
282278 memory_write_b (ppn | offset , (uint8_t * ) & val );
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