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system(l5) update STM32L5xx HAL Drivers to v1.0.7
Included in STM32CubeL5 FW v1.6.0 Signed-off-by: Frederic Pillon <frederic.pillon@st.com>
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‎system/Drivers/STM32L5xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h‎

Lines changed: 119 additions & 26 deletions
Large diffs are not rendered by default.

‎system/Drivers/STM32L5xx_HAL_Driver/Inc/stm32l5xx_hal_cortex.h‎

Lines changed: 30 additions & 22 deletions
Original file line numberDiff line numberDiff line change
@@ -121,49 +121,49 @@ typedef struct
121121
/** @defgroup CORTEX_MPU_HFNMI_PRIVDEF_Control CORTEX MPU HFNMI and PRIVILEGED Access control
122122
* @{
123123
*/
124-
#define MPU_HFNMI_PRIVDEF_NONE 0U
125-
#define MPU_HARDFAULT_NMI 2U
126-
#define MPU_PRIVILEGED_DEFAULT 4U
127-
#define MPU_HFNMI_PRIVDEF 6U
124+
#define MPU_HFNMI_PRIVDEF_NONE 0U /*!< Background region access not allowed, MPU disabled for Hardfaults, NMIs, and exception handlers when FAULTMASK=1 */
125+
#define MPU_HARDFAULT_NMI 2U /*!< Background region access not allowed, MPU enabled for Hardfaults, NMIs, and exception handlers when FAULTMASK=1 */
126+
#define MPU_PRIVILEGED_DEFAULT 4U /*!< Background region privileged-only access allowed, MPU disabled for Hardfaults, NMIs, and exception handlers when FAULTMASK=1 */
127+
#define MPU_HFNMI_PRIVDEF 6U /*!< Background region privileged-only access allowed, MPU enabled for Hardfaults, NMIs, and exception handlers when FAULTMASK=1 */
128128
/**
129129
* @}
130130
*/
131131

132132
/** @defgroup CORTEX_MPU_Region_Enable CORTEX MPU Region Enable
133133
* @{
134134
*/
135-
#define MPU_REGION_ENABLE 1U
136-
#define MPU_REGION_DISABLE 0U
135+
#define MPU_REGION_ENABLE 1U /*!< Enable region */
136+
#define MPU_REGION_DISABLE 0U /*!< Disable region */
137137
/**
138138
* @}
139139
*/
140140

141141
/** @defgroup CORTEX_MPU_Instruction_Access CORTEX MPU Instruction Access
142142
* @{
143143
*/
144-
#define MPU_INSTRUCTION_ACCESS_ENABLE 0U
145-
#define MPU_INSTRUCTION_ACCESS_DISABLE 1U
144+
#define MPU_INSTRUCTION_ACCESS_ENABLE 0U /*!< Execute attribute */
145+
#define MPU_INSTRUCTION_ACCESS_DISABLE 1U /*!< Execute never attribute */
146146
/**
147147
* @}
148148
*/
149149

150150
/** @defgroup CORTEX_MPU_Access_Shareable CORTEX MPU Instruction Access Shareable
151151
* @{
152152
*/
153-
#define MPU_ACCESS_NOT_SHAREABLE 0U
154-
#define MPU_ACCESS_OUTER_SHAREABLE 2U
155-
#define MPU_ACCESS_INNER_SHAREABLE 3U
153+
#define MPU_ACCESS_NOT_SHAREABLE 0U /*!< Not shareable attribute */
154+
#define MPU_ACCESS_OUTER_SHAREABLE 2U /*!< Outer shareable attribute */
155+
#define MPU_ACCESS_INNER_SHAREABLE 3U /*!< Inner shareable attribute */
156156
/**
157157
* @}
158158
*/
159159

160160
/** @defgroup CORTEX_MPU_Region_Permission_Attributes CORTEX MPU Region Permission Attributes
161161
* @{
162162
*/
163-
#define MPU_REGION_PRIV_RW 0U
164-
#define MPU_REGION_ALL_RW 1U
165-
#define MPU_REGION_PRIV_RO 2U
166-
#define MPU_REGION_ALL_RO 3U
163+
#define MPU_REGION_PRIV_RW 0U /*!< Read/write privileged-only attribute */
164+
#define MPU_REGION_ALL_RW 1U /*!< Read/write privileged/unprivileged attribute */
165+
#define MPU_REGION_PRIV_RO 2U /*!< Read-only privileged-only attribute */
166+
#define MPU_REGION_ALL_RO 3U /*!< Read-only privileged/unprivileged attribute */
167167
/**
168168
* @}
169169
*/
@@ -201,18 +201,26 @@ typedef struct
201201
/** @defgroup CORTEX_MPU_Attributes CORTEX MPU Attributes
202202
* @{
203203
*/
204-
#define MPU_DEVICE_nGnRnE 0x0U /* Device, noGather, noReorder, noEarly acknowledge. */
205-
#define MPU_DEVICE_nGnRE 0x4U /* Device, noGather, noReorder, Early acknowledge. */
206-
#define MPU_DEVICE_nGRE 0x8U /* Device, noGather, Reorder, Early acknowledge. */
207-
#define MPU_DEVICE_GRE 0xCU /* Device, Gather, Reorder, Early acknowledge. */
204+
/* Device memory attributes */
205+
#define MPU_DEVICE_nGnRnE 0x0U /*!< Device non-Gathering, non-Reordering, no Early write acknowledgement */
206+
#define MPU_DEVICE_nGnRE 0x4U /*!< Device non-Gathering, non-Reordering, Early write acknowledgement */
207+
#define MPU_DEVICE_nGRE 0x8U /*!< Device non-Gathering, Reordering, Early write acknowledgement */
208+
#define MPU_DEVICE_GRE 0xCU /*!< Device Gathering, Reordering, Early write acknowledgement */
208209

210+
/* Normal memory attributes */
211+
/* To set with INNER_OUTER() macro for both inner/outer cache attributes */
212+
213+
/* Non-cacheable memory attribute */
214+
#define MPU_NOT_CACHEABLE 0x4U /*!< Normal memory, non-cacheable */
215+
216+
/* Cacheable memory attributes: combination of cache write policy, transient and allocation */
217+
/* - cache write policy */
209218
#define MPU_WRITE_THROUGH 0x0U /* Normal memory, write-through. */
210-
#define MPU_NOT_CACHEABLE 0x4U /* Normal memory, non-cacheable. */
211219
#define MPU_WRITE_BACK 0x4U /* Normal memory, write-back. */
212-
220+
/* - transient mode attribute */
213221
#define MPU_TRANSIENT 0x0U /* Normal memory, transient. */
214222
#define MPU_NON_TRANSIENT 0x8U /* Normal memory, non-transient. */
215-
223+
/* - allocation attribute */
216224
#define MPU_NO_ALLOCATE 0x0U /* Normal memory, no allocate. */
217225
#define MPU_W_ALLOCATE 0x1U /* Normal memory, write allocate. */
218226
#define MPU_R_ALLOCATE 0x2U /* Normal memory, read allocate. */

‎system/Drivers/STM32L5xx_HAL_Driver/Inc/stm32l5xx_hal_cryp_ex.h‎

Lines changed: 4 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -93,8 +93,10 @@ extern "C" {
9393
/** @addtogroup CRYPEx_Exported_Functions_Group1
9494
* @{
9595
*/
96-
HAL_StatusTypeDef HAL_CRYPEx_AESGCM_GenerateAuthTAG(CRYP_HandleTypeDef *hcryp, uint32_t *AuthTag, uint32_t Timeout);
97-
HAL_StatusTypeDef HAL_CRYPEx_AESCCM_GenerateAuthTAG(CRYP_HandleTypeDef *hcryp, uint32_t *AuthTag, uint32_t Timeout);
96+
HAL_StatusTypeDef HAL_CRYPEx_AESGCM_GenerateAuthTAG(CRYP_HandleTypeDef *hcryp, const uint32_t *AuthTag,
97+
uint32_t Timeout);
98+
HAL_StatusTypeDef HAL_CRYPEx_AESCCM_GenerateAuthTAG(CRYP_HandleTypeDef *hcryp, const uint32_t *AuthTag,
99+
uint32_t Timeout);
98100

99101
/**
100102
* @}

‎system/Drivers/STM32L5xx_HAL_Driver/Inc/stm32l5xx_hal_dac.h‎

Lines changed: 10 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -276,9 +276,16 @@ typedef void (*pDAC_CallbackTypeDef)(DAC_HandleTypeDef *hdac);
276276
/** @defgroup DAC_ConnectOnChipPeripheral DAC ConnectOnChipPeripheral
277277
* @{
278278
*/
279-
#define DAC_CHIPCONNECT_DISABLE (0x00000000UL)
280-
#define DAC_CHIPCONNECT_ENABLE (DAC_MCR_MODE1_0)
281-
279+
#define DAC_CHIPCONNECT_DISABLE (0x00000000UL) /*!< DAC channel output is connected to external
280+
pin.
281+
Note: Depending on other parameters (mode normal or sample and hold,
282+
output buffer state), output can also be connected to on-chip
283+
peripherals, refer to ref manual. */
284+
#define DAC_CHIPCONNECT_ENABLE (DAC_MCR_MODE1_0) /*!< DAC channel output is connected to on-chip
285+
peripherals (via internal paths).
286+
Note: Depending on other parameters (mode normal or sample and hold,
287+
output buffer state), output can also be connected to external pin,
288+
refer to ref manual. */
282289
/**
283290
* @}
284291
*/

‎system/Drivers/STM32L5xx_HAL_Driver/Inc/stm32l5xx_hal_exti.h‎

Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -313,8 +313,8 @@ typedef struct
313313
*/
314314
/* Configuration functions ****************************************************/
315315
HAL_StatusTypeDef HAL_EXTI_SetConfigLine(EXTI_HandleTypeDef *hexti, EXTI_ConfigTypeDef *pExtiConfig);
316-
HAL_StatusTypeDef HAL_EXTI_GetConfigLine(EXTI_HandleTypeDef *hexti, EXTI_ConfigTypeDef *pExtiConfig);
317-
HAL_StatusTypeDef HAL_EXTI_ClearConfigLine(EXTI_HandleTypeDef *hexti);
316+
HAL_StatusTypeDef HAL_EXTI_GetConfigLine(const EXTI_HandleTypeDef *hexti, EXTI_ConfigTypeDef *pExtiConfig);
317+
HAL_StatusTypeDef HAL_EXTI_ClearConfigLine(const EXTI_HandleTypeDef *hexti);
318318
HAL_StatusTypeDef HAL_EXTI_RegisterCallback(EXTI_HandleTypeDef *hexti, EXTI_CallbackIDTypeDef CallbackID, void (*pPendingCbfn)(void));
319319
HAL_StatusTypeDef HAL_EXTI_GetHandle(EXTI_HandleTypeDef *hexti, uint32_t ExtiLine);
320320
/**
@@ -326,10 +326,10 @@ HAL_StatusTypeDef HAL_EXTI_GetHandle(EXTI_HandleTypeDef *hexti, uint32_t ExtiLin
326326
* @{
327327
*/
328328
/* IO operation functions *****************************************************/
329-
void HAL_EXTI_IRQHandler(EXTI_HandleTypeDef *hexti);
330-
uint32_t HAL_EXTI_GetPending(EXTI_HandleTypeDef *hexti, uint32_t Edge);
331-
void HAL_EXTI_ClearPending(EXTI_HandleTypeDef *hexti, uint32_t Edge);
332-
void HAL_EXTI_GenerateSWI(EXTI_HandleTypeDef *hexti);
329+
void HAL_EXTI_IRQHandler(const EXTI_HandleTypeDef *hexti);
330+
uint32_t HAL_EXTI_GetPending(const EXTI_HandleTypeDef *hexti, uint32_t Edge);
331+
void HAL_EXTI_ClearPending(const EXTI_HandleTypeDef *hexti, uint32_t Edge);
332+
void HAL_EXTI_GenerateSWI(const EXTI_HandleTypeDef *hexti);
333333

334334
/**
335335
* @}

‎system/Drivers/STM32L5xx_HAL_Driver/Inc/stm32l5xx_hal_fdcan.h‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -517,8 +517,8 @@ typedef void (*pFDCAN_ErrorStatusCallbackTypeDef)(FDCAN_HandleTypeDef *hfdcan,
517517
#define HAL_FDCAN_ERROR_PARAM ((uint32_t)0x00000020U) /*!< Parameter error */
518518
#define HAL_FDCAN_ERROR_PENDING ((uint32_t)0x00000040U) /*!< Pending operation */
519519
#define HAL_FDCAN_ERROR_RAM_ACCESS ((uint32_t)0x00000080U) /*!< Message RAM Access Failure */
520-
#define HAL_FDCAN_ERROR_FIFO_EMPTY ((uint32_t)0x00000100U) /*!< Put element in full FIFO */
521-
#define HAL_FDCAN_ERROR_FIFO_FULL ((uint32_t)0x00000200U) /*!< Get element from empty FIFO */
520+
#define HAL_FDCAN_ERROR_FIFO_EMPTY ((uint32_t)0x00000100U) /*!< Get element from empty FIFO */
521+
#define HAL_FDCAN_ERROR_FIFO_FULL ((uint32_t)0x00000200U) /*!< Put element in full FIFO */
522522
#define HAL_FDCAN_ERROR_LOG_OVERFLOW FDCAN_IR_ELO /*!< Overflow of CAN Error Logging Counter */
523523
#define HAL_FDCAN_ERROR_RAM_WDG FDCAN_IR_WDI /*!< Message RAM Watchdog event occurred */
524524
#define HAL_FDCAN_ERROR_PROTOCOL_ARBT FDCAN_IR_PEA /*!< Protocol Error in Arbitration Phase (Nominal Bit Time is used) */

‎system/Drivers/STM32L5xx_HAL_Driver/Inc/stm32l5xx_hal_gpio.h‎

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -340,7 +340,7 @@ typedef enum
340340
*/
341341

342342
/* Initialization and de-initialization functions *****************************/
343-
void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init);
343+
void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, const GPIO_InitTypeDef *GPIO_Init);
344344
void HAL_GPIO_DeInit(GPIO_TypeDef *GPIOx, uint32_t GPIO_Pin);
345345

346346
/**
@@ -353,7 +353,7 @@ void HAL_GPIO_DeInit(GPIO_TypeDef *GPIOx, uint32_t GPIO_Pin);
353353
*/
354354

355355
/* IO operation functions *****************************************************/
356-
GPIO_PinState HAL_GPIO_ReadPin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin);
356+
GPIO_PinState HAL_GPIO_ReadPin(const GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin);
357357
void HAL_GPIO_WritePin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin, GPIO_PinState PinState);
358358
void HAL_GPIO_TogglePin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin);
359359
HAL_StatusTypeDef HAL_GPIO_LockPin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin);
@@ -373,7 +373,7 @@ void HAL_GPIO_EXTI_Falling_Callback(uint16_t GPIO_Pin);
373373

374374
/* IO attributes management functions *****************************************/
375375
void HAL_GPIO_ConfigPinAttributes(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin, uint32_t PinAttributes);
376-
HAL_StatusTypeDef HAL_GPIO_GetConfigPinAttributes(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin, uint32_t *pPinAttributes);
376+
HAL_StatusTypeDef HAL_GPIO_GetConfigPinAttributes(const GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin, uint32_t *pPinAttributes);
377377

378378
/**
379379
* @}

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