From 5502f08e46723989a7aa4a2249c2dc990c1cd9a9 Mon Sep 17 00:00:00 2001 From: Javier Alvarez Date: Sat, 31 May 2025 13:01:37 +0200 Subject: [PATCH] Fix OSPEEDR and PUPDR indexing The field width of 2 was being applied twice in these two registers, because the PAC already accounts for it, so there is no need to apply it externally. Thankfully the PAC triggers and out-of-bounds access to an array when this happens in debug builds, so it can be easily caught. --- src/gpio.rs | 7 ++----- 1 file changed, 2 insertions(+), 5 deletions(-) diff --git a/src/gpio.rs b/src/gpio.rs index f414d0a..dfc353d 100644 --- a/src/gpio.rs +++ b/src/gpio.rs @@ -316,12 +316,10 @@ where { /// Set pin speed pub fn set_speed(&mut self, speed: Speed) { - let offset = 2 * { N }; - unsafe { (*Gpio::

::ptr()) .ospeedr() - .modify(|_r, w| w.ospeed(offset).bits(speed as u8)); + .modify(|_r, w| w.ospeed(N).bits(speed as u8)); } } @@ -338,12 +336,11 @@ where { /// Set the internal pull-up and pull-down resistor pub fn set_internal_resistor(&mut self, resistor: Pull) { - let offset = 2 * { N }; let value = resistor as u8; unsafe { (*Gpio::

::ptr()) .pupdr() - .modify(|_r, w| w.pupd(offset).bits(value)); + .modify(|_r, w| w.pupd(N).bits(value)); } }