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Changing TYPE to PROP
- Consistent with other lambdalibs - Moving documentation to README
1 parent 6b212ea commit db4ddf0

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18 files changed

+211
-186
lines changed

18 files changed

+211
-186
lines changed

lambdalib/iolib/rtl/la_ioanalog.v

Lines changed: 5 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -1,10 +1,12 @@
11
/*****************************************************************************
2-
* Function: IO analog pass-through cell
2+
* Function: Analog Passthrough IO cell
33
* Copyright: Lambda Project Authors. All rights Reserved.
44
* License: MIT (see LICENSE file in Lambda repository)
55
*
66
* Docs:
77
*
8+
* ../README.md
9+
*
810
* aio[0] = pass through from pad (with esd clamp)
911
* aio[1] = small series resistance
1012
* aio[2] = big series resistance
@@ -22,9 +24,9 @@ module la_ioanalog
2224
inout vss, // core ground
2325
inout vddio, // io supply
2426
inout vssio, // io ground
25-
inout [RINGW-1:0] ioring, // generic io ring
27+
inout [RINGW-1:0] ioring, // generic ioring
2628
// core interface
27-
inout [2:0] aio // analog core signal
29+
inout [2:0] aio // analog core signals
2830
);
2931

3032
`ifdef VERILATOR

lambdalib/iolib/rtl/la_iobidir.v

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
/**************************************************************************
2-
* Function: IO digital bidirectional buffer
2+
* Function: Digital Bidirectional IO Buffer
33
* Copyright: Lambda Project Authors. All rights Reserved.
44
* License: MIT (see LICENSE file in Lambda repository)
55
*

lambdalib/iolib/rtl/la_ioclamp.v

Lines changed: 10 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -1,22 +1,25 @@
11
/*****************************************************************************
2-
* Function: IO ESD clamp cell
2+
* Function: ESD Clamp IO cell
33
* Copyright: Lambda Project Authors. All rights Reserved.
44
* License: MIT (see LICENSE file in Lambda repository)
55
*
66
* Docs:
77
*
8+
* ../README.md
9+
*
810
****************************************************************************/
9-
module la_ioclamp #(
10-
parameter PROP = "DEFAULT", // cell property
11-
parameter SIDE = "NO", // "NO", "SO", "EA", "WE"
12-
parameter RINGW = 8 // width of io ring
13-
)
11+
module la_ioclamp
12+
#(
13+
parameter PROP = "DEFAULT", // cell property
14+
parameter SIDE = "NO", // "NO", "SO", "EA", "WE"
15+
parameter RINGW = 8 // width of io ring
16+
)
1417
(// io pad signals
1518
inout vdd, // core supply
1619
inout vss, // core ground
1720
inout vddio, // io supply
1821
inout vssio, // io ground
19-
inout [RINGW-1:0] ioring // generic io-ring interface
22+
inout [RINGW-1:0] ioring // generic io ring interface
2023
);
2124

2225
endmodule

lambdalib/iolib/rtl/la_iocorner.v

Lines changed: 15 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -1,22 +1,25 @@
11
/*****************************************************************************
2-
* Function: IO corner cell
2+
* Function: Corner IO Cell
33
* Copyright: Lambda Project Authors. All rights Reserved.
44
* License: MIT (see LICENSE file in Lambda repository)
55
*
66
* Docs:
77
*
8+
* ../README.md
89
*
910
****************************************************************************/
10-
module la_iocorner #(
11-
parameter PROP = "DEFAULT", // cell type
12-
parameter SIDE = "NO", // "NO", "SO", "EA", "WE"
13-
parameter RINGW = 8 // width of io ring
14-
) (
15-
inout vdd, // core supply
16-
inout vss, // core ground
17-
inout vddio, // io supply
18-
inout vssio, // io ground
19-
inout [RINGW-1:0] ioring // generic io-ring interface
20-
);
11+
module la_iocorner
12+
#(
13+
parameter PROP = "DEFAULT", // cell property
14+
parameter SIDE = "NO", // "NO", "SO", "EA", "WE"
15+
parameter RINGW = 8 // width of io ring
16+
)
17+
(
18+
inout vdd, // core supply
19+
inout vss, // core ground
20+
inout vddio, // io supply
21+
inout vssio, // io ground
22+
inout [RINGW-1:0] ioring // generic ioring interface
23+
);
2124

2225
endmodule

lambdalib/iolib/rtl/la_iocut.v

Lines changed: 12 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -1,19 +1,24 @@
11
/*****************************************************************************
2-
* Function: IO cut cell
2+
* Function: Supply Ring Cut IO Cell
33
* Copyright: Lambda Project Authors. All rights Reserved.
44
* License: MIT (see LICENSE file in Lambda repository)
55
*
66
* Docs:
77
*
8+
* ../README.md
89
*
910
****************************************************************************/
10-
module la_iocut #(
11-
parameter TYPE = "DEFAULT", // cell type
12-
parameter SIDE = "NO", // "NO", "SO", "EA", "WE"
13-
parameter RINGW = 8 // width of io ring
14-
) (
11+
module la_iocut
12+
#(
13+
parameter PROP = "DEFAULT", // cell property
14+
parameter SIDE = "NO", // "NO", "SO", "EA", "WE"
15+
parameter RINGW = 8 // width of io ring
16+
)
17+
(
1518
// ground never cut
1619
inout vss
17-
);
20+
);
21+
22+
// TODO: interface?
1823

1924
endmodule

lambdalib/iolib/rtl/la_ioinput.v

Lines changed: 5 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
/**************************************************************************
2-
* Function: IO digital input
2+
* Function: Digital Input IO Cell
33
* Copyright: Lambda Project Authors. All rights Reserved.
44
* License: MIT (see LICENSE file in Lambda repository)
55
*
@@ -16,19 +16,19 @@ module la_ioinput
1616
parameter RINGW = 8 // width of io ring
1717
)
1818
(// io pad signals
19-
inout pad, // bidirectional pad signal
19+
inout pad, // input pad
2020
inout vdd, // core supply
2121
inout vss, // core ground
2222
inout vddio, // io supply
2323
inout vssio, // io ground
2424
// core facing signals
2525
output z, // output to core
2626
input ie, // input enable, 1 = active
27-
inout [RINGW-1:0] ioring, // generic io-ring interface
27+
inout [RINGW-1:0] ioring, // generic ioring interface
2828
input [CFGW-1:0] cfg // generic config interface
2929
);
3030

31-
// to core
32-
assign z = ie ? pad : 1'b0;
31+
// to core
32+
assign z = ie ? pad : 1'b0;
3333

3434
endmodule

lambdalib/iolib/rtl/la_iopoc.v

Lines changed: 15 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -1,22 +1,25 @@
11
/*****************************************************************************
2-
* Function: IO power-on-control cell
2+
* Function: Power-On Control IO Cell
33
* Copyright: Lambda Project Authors. All rights Reserved.
44
* License: MIT (see LICENSE file in Lambda repository)
55
*
66
* Docs:
77
*
8+
* ../README.md
89
*
910
****************************************************************************/
10-
module la_iopoc #(
11-
parameter TYPE = "DEFAULT", // cell type
12-
parameter SIDE = "NO", // "NO", "SO", "EA", "WE"
13-
parameter RINGW = 8 // width of io ring
14-
) (
15-
inout vdd, // core supply
16-
inout vss, // core ground
17-
inout vddio, // io supply
18-
inout vssio, // io ground
19-
inout [RINGW-1:0] ioring // generic io-ring interface
20-
);
11+
module la_iopoc
12+
#(
13+
parameter PROP = "DEFAULT", // cell property
14+
parameter SIDE = "NO", // "NO", "SO", "EA", "WE"
15+
parameter RINGW = 8 // width of io ring
16+
)
17+
(
18+
inout vdd, // core supply
19+
inout vss, // core ground
20+
inout vddio, // io supply
21+
inout vssio, // io ground
22+
inout [RINGW-1:0] ioring // generic ioring interface
23+
);
2124

2225
endmodule

lambdalib/iolib/rtl/la_iorxdiff.v

Lines changed: 17 additions & 23 deletions
Original file line numberDiff line numberDiff line change
@@ -1,39 +1,33 @@
11
/*****************************************************************************
2-
* Function: IO differential receiver
2+
* Function: Digital Differential Receiver IO Cell
33
* Copyright: Lambda Project Authors. All rights Reserved.
44
* License: MIT (see LICENSE file in Lambda repository)
55
*
66
* Docs:
77
*
8-
* This is a generic cell that defines the standard interface of the lambda
9-
* differential IO receiver cell. It is only suitable for FPGA synthesis.
10-
*
11-
* ASIC specific libraries will need to use the TYPE field to select an
12-
* appropriate hardcoded physical cell based on the the process constraints
13-
* and library composition. For example, modern nodes will usually have
14-
* different IP cells for placing cells vertically or horizontally.
8+
* ../README.md
159
*
1610
****************************************************************************/
1711
module la_iorxdiff
1812
#(
19-
parameter TYPE = "DEFAULT", // cell type
20-
parameter SIDE = "NO", // "NO", "SO", "EA", "WE"
21-
parameter CFGW = 16, // width of core config bus
22-
parameter RINGW = 8 // width of io ring
13+
parameter PROP = "DEFAULT", // cell property
14+
parameter SIDE = "NO", // "NO", "SO", "EA", "WE"
15+
parameter CFGW = 16, // width of core config bus
16+
parameter RINGW = 8 // width of io ring
2317
)
2418
(// io pad signals
25-
inout padp, // differential pad input (positive)
26-
inout padn, // differential pad input (negative)
27-
inout vdd, // core supply
28-
inout vss, // core ground
29-
inout vddio, // io supply
30-
inout vssio, // io ground
19+
inout padp, // differential pad input (positive)
20+
inout padn, // differential pad input (negative)
21+
inout vdd, // core supply
22+
inout vss, // core ground
23+
inout vddio, // io supply
24+
inout vssio, // io ground
3125
// core facing signals
32-
output zp, // digital output to core (positive)
33-
output zn, // digital output to core (negative)
34-
input ie, // input enable, 1 = active
35-
inout [RINGW-1:0] ioring, // generic io-ring interface
36-
input [ CFGW-1:0] cfg // generic config interface
26+
output zp, // digital output to core (positive)
27+
output zn, // digital output to core (negative)
28+
input ie, // input enable, 1 = active
29+
inout [RINGW-1:0] ioring, // generic ioring interface
30+
input [CFGW-1:0] cfg // generic config interface
3731
);
3832

3933
// gated differential non inverting buffer

lambdalib/iolib/rtl/la_ioshort.v

Lines changed: 6 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
/*****************************************************************************
2-
* Function: Shorting two wires together
2+
* Function: Inout Port Short
33
* Copyright: Lambda Project Authors. All rights Reserved.
44
* License: MIT (see LICENSE file in Lambda repository)
55
*
@@ -11,11 +11,10 @@
1111
* connection in RTL.
1212
*
1313
****************************************************************************/
14-
module la_ioshort (
15-
inout a,
16-
inout b,
17-
input a2b
18-
);
14+
module la_ioshort (inout a,
15+
inout b,
16+
input a2b
17+
);
1918

2019
`ifdef VERILATOR
2120
// Using direction to break the loop
@@ -31,4 +30,4 @@ module la_ioshort (
3130
// verilog_lint: waive-end module-port
3231
`endif
3332

34-
endmodule // la_ioshort
33+
endmodule

lambdalib/iolib/rtl/la_iotxdiff.v

Lines changed: 18 additions & 24 deletions
Original file line numberDiff line numberDiff line change
@@ -1,42 +1,36 @@
11
/*****************************************************************************
2-
* Function: IO bi-directional transmitter
2+
* Function: Digital Differential Transmitter IO Cell
33
* Copyright: Lambda Project Authors. All rights Reserved.
44
* License: MIT (see LICENSE file in Lambda repository)
55
*
66
* Docs:
77
*
8-
* This is a generic cell that defines the standard interface of the lambda
9-
* differential IO transmit cell. It is not generally synthesizable.
10-
*
11-
* ASIC specific libraries will need to use the TYPE field to select an
12-
* appropriate hardcoded physical cell based on the the process constraints
13-
* and library composition. For example, modern nodes will usually have
14-
* different IP cells for placing cells vertically or horizontally.
8+
* ../README.md
159
*
1610
****************************************************************************/
1711
module la_iotxdiff
1812
#(
19-
parameter TYPE = "DEFAULT", // cell type
20-
parameter SIDE = "NO", // "NO", "SO", "EA", "WE"
21-
parameter CFGW = 16, // width of core config bus
22-
parameter RINGW = 8 // width of io ring
13+
parameter PROP = "DEFAULT", // cell property
14+
parameter SIDE = "NO", // "NO", "SO", "EA", "WE"
15+
parameter CFGW = 16, // width of core config bus
16+
parameter RINGW = 8 // width of io ring
2317
)
2418
(// io pad signals
25-
inout padp, // differential pad output (positive)
26-
inout padn, // differential pad output (negative)
27-
inout vdd, // core supply
28-
inout vss, // core ground
29-
inout vddio, // io supply
30-
inout vssio, // io ground
19+
inout padp, // differential pad output (positive)
20+
inout padn, // differential pad output (negative)
21+
inout vdd, // core supply
22+
inout vss, // core ground
23+
inout vddio, // io supply
24+
inout vssio, // io ground
3125
// core facing signals
32-
input a, // input from core
33-
input oe, // output enable, 1 = active
34-
inout [RINGW-1:0] ioring, // generic io-ring interface
35-
input [ CFGW-1:0] cfg // generic config interface
26+
input a, // input from core
27+
input oe, // output enable, 1 = active
28+
inout [RINGW-1:0] ioring, // generic ioring interface
29+
input [CFGW-1:0] cfg // generic config interface
3630
);
3731

38-
// output driver with tr
39-
assign padp = oe ? a : 1'bz;
32+
// output driver
33+
assign padp = oe ? a : 1'bz;
4034
assign padn = oe ? ~a : 1'bz;
4135

4236
endmodule

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