Skip to content

Commit 37c5b31

Browse files
committed
split into seperate importable modules
1 parent dd0e30f commit 37c5b31

File tree

13 files changed

+218
-52
lines changed

13 files changed

+218
-52
lines changed

lambdalib/__init__.py

Lines changed: 28 additions & 41 deletions
Original file line numberDiff line numberDiff line change
@@ -1,60 +1,47 @@
1-
from siliconcompiler import Chip, Library
1+
from siliconcompiler import Chip
22
import siliconcompiler.package as sc_package
33
import glob
44
import os
55
import shutil
66

7-
__version__ = "0.2.7"
7+
from lambdalib import _common
8+
from lambdalib import \
9+
auxlib, \
10+
fpgalib, \
11+
iolib, \
12+
padring, \
13+
ramlib, \
14+
stdlib, \
15+
syslib, \
16+
vectorlib
817

9-
_libraries = (
10-
'iolib',
11-
'stdlib',
12-
'auxlib',
13-
'ramlib',
14-
'padring',
15-
'syslib',
16-
'vectorlib',
17-
'fpgalib'
18-
)
18+
19+
__version__ = _common._version
1920

2021

2122
########################
2223
# SiliconCompiler Setup
2324
########################
2425
def setup(chip):
25-
'''Lambdalib library setup script'''
26-
27-
add_idirs = ('padring',)
28-
29-
libs = []
30-
# Iterate over all libs
31-
for name in _libraries:
32-
lib = Library(chip, f'lambdalib_{name}', package='lambdalib')
33-
register_data_source(lib)
34-
35-
lib.add('option', 'ydir', f"lambdalib/{name}/rtl")
36-
37-
if name in add_idirs:
38-
lib.add('option', 'idir', f"lambdalib/{name}/rtl")
39-
40-
libs.append(lib)
41-
42-
return libs
43-
44-
45-
def register_data_source(chip):
46-
sc_package.register_python_data_source(
47-
chip,
48-
"lambdalib",
49-
"lambdalib",
50-
"git+https://github.com/siliconcompiler/lambdalib.git",
51-
alternative_ref=f"v{__version__}",
52-
python_module_path_append="..")
26+
'''
27+
Lambdalib library setup script
28+
'''
29+
30+
return [
31+
auxlib.setup(chip),
32+
fpgalib.setup(chip),
33+
iolib.setup(chip),
34+
padring.setup(chip),
35+
ramlib.setup(chip),
36+
stdlib.setup(chip),
37+
syslib.setup(chip),
38+
vectorlib.setup(chip)
39+
]
5340

5441

5542
def __get_lambdalib_dir(la_lib):
5643
path_assert = Chip('lambdalib')
57-
register_data_source(path_assert)
44+
_common.register_data_source(path_assert)
5845
lambdalib_path = sc_package.path(path_assert, 'lambdalib')
5946
return f'{lambdalib_path}/lambdalib/{la_lib}/rtl'
6047

lambdalib/_common.py

Lines changed: 14 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,14 @@
1+
import siliconcompiler.package as sc_package
2+
3+
4+
_version = "0.2.7"
5+
6+
7+
def register_data_source(chip):
8+
sc_package.register_python_data_source(
9+
chip,
10+
"lambdalib",
11+
"lambdalib",
12+
"git+https://github.com/siliconcompiler/lambdalib.git",
13+
alternative_ref=f"v{_version}",
14+
python_module_path_append="..")

lambdalib/auxlib/__init__.py

Lines changed: 18 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,18 @@
1+
from siliconcompiler import Library
2+
from lambdalib._common import register_data_source
3+
4+
5+
########################
6+
# SiliconCompiler Setup
7+
########################
8+
def setup(chip):
9+
'''
10+
Lambdalib auxlib
11+
'''
12+
13+
lib = Library(chip, 'lambdalib_auxlib', package='lambdalib', auto_enable=True)
14+
register_data_source(lib)
15+
16+
lib.add('option', 'ydir', "lambdalib/auxlib/rtl")
17+
18+
return lib

lambdalib/fpgalib/__init__.py

Lines changed: 18 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,18 @@
1+
from siliconcompiler import Library
2+
from lambdalib._common import register_data_source
3+
4+
5+
########################
6+
# SiliconCompiler Setup
7+
########################
8+
def setup(chip):
9+
'''
10+
Lambdalib fpgalib
11+
'''
12+
13+
lib = Library(chip, 'lambdalib_fpgalib', package='lambdalib', auto_enable=True)
14+
register_data_source(lib)
15+
16+
lib.add('option', 'ydir', "lambdalib/fpgalib/rtl")
17+
18+
return lib

lambdalib/iolib/__init__.py

Lines changed: 18 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,18 @@
1+
from siliconcompiler import Library
2+
from lambdalib._common import register_data_source
3+
4+
5+
########################
6+
# SiliconCompiler Setup
7+
########################
8+
def setup(chip):
9+
'''
10+
Lambdalib iolib
11+
'''
12+
13+
lib = Library(chip, 'lambdalib_iolib', package='lambdalib', auto_enable=True)
14+
register_data_source(lib)
15+
16+
lib.add('option', 'ydir', "lambdalib/iolib/rtl")
17+
18+
return lib

lambdalib/padring/__init__.py

Lines changed: 19 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,19 @@
1+
from siliconcompiler import Library
2+
from lambdalib._common import register_data_source
3+
4+
5+
########################
6+
# SiliconCompiler Setup
7+
########################
8+
def setup(chip):
9+
'''
10+
Lambdalib pandring
11+
'''
12+
13+
lib = Library(chip, 'lambdalib_padring', package='lambdalib', auto_enable=True)
14+
register_data_source(lib)
15+
16+
lib.add('option', 'idir', "lambdalib/padring/rtl")
17+
lib.add('option', 'ydir', "lambdalib/padring/rtl")
18+
19+
return lib

lambdalib/ramlib/__init__.py

Lines changed: 18 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,18 @@
1+
from siliconcompiler import Library
2+
from lambdalib._common import register_data_source
3+
4+
5+
########################
6+
# SiliconCompiler Setup
7+
########################
8+
def setup(chip):
9+
'''
10+
Lambdalib ramlib
11+
'''
12+
13+
lib = Library(chip, 'lambdalib_ramlib', package='lambdalib', auto_enable=True)
14+
register_data_source(lib)
15+
16+
lib.add('option', 'ydir', "lambdalib/ramlib/rtl")
17+
18+
return lib

lambdalib/stdlib/__init__.py

Lines changed: 18 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,18 @@
1+
from siliconcompiler import Library
2+
from lambdalib._common import register_data_source
3+
4+
5+
########################
6+
# SiliconCompiler Setup
7+
########################
8+
def setup(chip):
9+
'''
10+
Lambdalib stdlib
11+
'''
12+
13+
lib = Library(chip, 'lambdalib_stdlib', package='lambdalib', auto_enable=True)
14+
register_data_source(lib)
15+
16+
lib.add('option', 'ydir', "lambdalib/stdlib/rtl")
17+
18+
return lib

lambdalib/syslib/__init__.py

Lines changed: 18 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,18 @@
1+
from siliconcompiler import Library
2+
from lambdalib._common import register_data_source
3+
4+
5+
########################
6+
# SiliconCompiler Setup
7+
########################
8+
def setup(chip):
9+
'''
10+
Lambdalib syslib
11+
'''
12+
13+
lib = Library(chip, 'lambdalib_syslib', package='lambdalib', auto_enable=True)
14+
register_data_source(lib)
15+
16+
lib.add('option', 'ydir', "lambdalib/syslib/rtl")
17+
18+
return lib

lambdalib/vectorlib/__init__.py

Lines changed: 18 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,18 @@
1+
from siliconcompiler import Library
2+
from lambdalib._common import register_data_source
3+
4+
5+
########################
6+
# SiliconCompiler Setup
7+
########################
8+
def setup(chip):
9+
'''
10+
Lambdalib vectorlib
11+
'''
12+
13+
lib = Library(chip, 'lambdalib_vectorlib', package='lambdalib', auto_enable=True)
14+
register_data_source(lib)
15+
16+
lib.add('option', 'ydir', "lambdalib/vectorlib/rtl")
17+
18+
return lib

0 commit comments

Comments
 (0)