refactor readme

Author: kevaundray

src/doc/rustc/src/platform-support/riscv64im-unknown-none-elf.md

@@ -12,7 +12,7 @@ Bare-metal target for RISC-V CPUs with the RV64IM ISA.
 
 This target is cross-compiled and uses static linking. The target supports `core` and `alloc`, but not `std`.
 
-The target does not support atomic compare-and-swap operations, as the RV64IM ISA lacks the "A" (Atomics) extension. Atomic operations are emulated using the `+forced-atomics` feature.
+As the RV64IM ISA lacks the "A" (Atomics) extension, atomic operations are emulated using the `+forced-atomics` feature.
 
 No external toolchain is required and the default `rust-lld` linker works, but you must specify a linker script. The [`riscv-rt`] crate provides suitable linker scripts. The [`riscv-rust-quickstart`] repository gives examples of RISC-V bare-metal projects.
 
@@ -21,34 +21,27 @@ No external toolchain is required and the default `rust-lld` linker works, but y
 
 ## Building the target
 
-This target is included in Rust and can be installed via `rustup`:
+You can build Rust with support for the target by adding it to the `target` list in `bootstrap.toml`:
 
-```bash
-rustup target add riscv64im-unknown-none-elf
+```toml
+[build]
+target = ["riscv64im-unknown-none-elf"]
 ```
 
-## Building Rust programs
-
-Build using the standard Cargo workflow:
+Alternatively, you can use the `-Z build-std` flag to build the standard library on-demand:
 
 ```bash
-cargo build --target riscv64im-unknown-none-elf
+cargo build -Z build-std=core,alloc --target riscv64im-unknown-none-elf
 ```
 
-You will need to provide a linker script. The [`riscv-rt`] crate handles this automatically when used as a dependency.
+## Building Rust programs
+
+Rust does not yet ship pre-compiled artifacts for this target. To compile for this target (see "Building the target" above)
 
 ## Testing
 
 This is a cross-compiled `no-std` target, which must be run either in a simulator or by programming onto suitable hardware. It is not possible to run the Rust test-suite on this target.
 
-You can test the target in QEMU with:
-
-```bash
-qemu-system-riscv64 -machine virt -cpu rv64,a=false,c=false -nographic -semihosting -kernel your-binary
-```
-
-Note: You must explicitly disable the 'a' (atomics) and 'c' (compressed) extensions when using QEMU to accurately emulate an RV64IM-only CPU.
-
 ## Cross-compilation toolchains and C code
 
 This target supports C code. If interlinking with C or C++, you may need to use `riscv64-unknown-elf-gcc` with the appropriate `-march=rv64im -mabi=lp64` flags as a linker instead of `rust-lld`.