diff --git a/Deeploy/TilingExtension/CodeTransformationPasses/TilingHoistingMixIn.py b/Deeploy/TilingExtension/CodeTransformationPasses/TilingHoistingMixIn.py
index 8a0c1b9b54..5ec56e375f 100644
--- a/Deeploy/TilingExtension/CodeTransformationPasses/TilingHoistingMixIn.py
+++ b/Deeploy/TilingExtension/CodeTransformationPasses/TilingHoistingMixIn.py
@@ -60,7 +60,18 @@ def _hoistValues(self,
         else:
             cb._type = PointerClass(BasicDataTypes.minimalIntegerType(values))
         cb._instance = cb._type(cb.name, ctxt)
-        cb._memoryLevel = self.memory
+        # These are constant tile *control* tables (numTiles / DMA cmd / size /
+        # dims / offsets) read by the (cluster) controller to drive the tiling
+        # loop and program DMAs -- not bulk tile data. Putting them in the
+        # innermost tile memory (L1/TCDM) wastes scarce L1 and, on GAP9, places
+        # them in the contended L1 region next to the cluster master stack: a
+        # deep stack write can clobber a single table entry, turning a DMA `cmd`
+        # into a garbage code pointer so mchan_transfer_wait() hangs forever
+        # (observed on MobileNetV1 training). Keep them in the controller-
+        # addressable outer memory (L2) instead. Only redirect the L2->L1 pass;
+        # the L3->L2 pass keeps its tables in L2 (== self.memory), never L3.
+        # Platforms that don't tile into a level named "L1" are unaffected.
+        cb._memoryLevel = "L2" if self.memory == "L1" else self.memory
         return cb
 
     def _hoistReference(self,
diff --git a/TargetLibraries/GAP9/CMakeLists.txt b/TargetLibraries/GAP9/CMakeLists.txt
index ca4c3ffbeb..a6282c6785 100644
--- a/TargetLibraries/GAP9/CMakeLists.txt
+++ b/TargetLibraries/GAP9/CMakeLists.txt
@@ -31,6 +31,16 @@ target_compile_options(deeploygap9 PRIVATE
 
 target_link_libraries(deeploygap9 PUBLIC pmsis)
 
+# Compile the hot forward kernels at -O3 (set last so it wins over the SDK's
+# default -Os). Conv / depthwise-conv / Gemm dominate GAP9 inference cycles;
+# -O3 turns on the RISC-V (XpulpV2) hardware loops on their tight inner loops.
+set(_KERNEL_O3_FILES
+  ${CMAKE_CURRENT_LIST_DIR}/../PULPOpen/src/Convolution_fp32.c
+  ${CMAKE_CURRENT_LIST_DIR}/../PULPOpen/src/DWConvolution_fp32.c
+  ${CMAKE_CURRENT_LIST_DIR}/../PULPOpen/src/Gemm.c
+)
+set_source_files_properties(${_KERNEL_O3_FILES} PROPERTIES COMPILE_OPTIONS "-O3")
+
 #RW: Link PULP-NN
 #RW: Set PULP-NN version and bitwidth for pulp-nn-mixed
 set(PULPNNVERSION XPULPV2)