From 8c47b5b587726157bd08e407622707cd59a359e4 Mon Sep 17 00:00:00 2001 From: Joshua Wise Date: Sat, 17 Jan 2026 02:00:09 -0500 Subject: [PATCH] hardware-platforms: be more verbose about SF32LB Signed-off-by: Joshua Wise --- source/_includes/hardware-platforms.html | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/source/_includes/hardware-platforms.html b/source/_includes/hardware-platforms.html index 54104cb..f6bc6ec 100644 --- a/source/_includes/hardware-platforms.html +++ b/source/_includes/hardware-platforms.html @@ -56,7 +56,7 @@ Cortex-M3
64 MHz Cortex-M4
100 MHz Cortex-M4
64 MHz - Star-MC1
240 MHz + Star-MC1
(Cortex-M33-like)
240 MHz Max Resource Size @@ -67,7 +67,7 @@ Max App Size (code + heap) 24k 64k - 128k + 128k*5 Display Shape @@ -212,4 +212,5 @@

*3Rated waterproofing is applicable to new, sealed hardware. Age or repairs may compromise water resistance.

*4Rated battery life is applicable to new hardware in typical usage conditions. Heavy use or use of power intensive apps and watchfaces may lead to a lower battery life. Battery life will reduce as the watch ages. Aftermarket replacement batteries may have a lower capacity.

+

*5SF32LB52J SoCs also have 16MB of PSRAM that is not currently enabled in PebbleOS, but may be enabled in future versions.