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[WebAssembly] Implement more of getCastInstrCost (#164612)
Fill out more information for sign and zero extend and add some truncate information; however, the primary change is to int/fp conversions. In particular, fp to (narrow) int appears to be relatively expensive.
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llvm/lib/Target/WebAssembly/WebAssemblyTargetTransformInfo.cpp

Lines changed: 65 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -119,18 +119,82 @@ InstructionCost WebAssemblyTTIImpl::getCastInstrCost(
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}
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}
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122-
// extend_low
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static constexpr TypeConversionCostTblEntry ConversionTbl[] = {
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// extend_low
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{ISD::SIGN_EXTEND, MVT::v2i64, MVT::v2i32, 1},
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{ISD::ZERO_EXTEND, MVT::v2i64, MVT::v2i32, 1},
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{ISD::SIGN_EXTEND, MVT::v4i32, MVT::v4i16, 1},
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{ISD::ZERO_EXTEND, MVT::v4i32, MVT::v4i16, 1},
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{ISD::SIGN_EXTEND, MVT::v8i16, MVT::v8i8, 1},
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{ISD::ZERO_EXTEND, MVT::v8i16, MVT::v8i8, 1},
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// 2 x extend_low
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{ISD::SIGN_EXTEND, MVT::v2i64, MVT::v2i16, 2},
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{ISD::ZERO_EXTEND, MVT::v2i64, MVT::v2i16, 2},
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{ISD::SIGN_EXTEND, MVT::v4i32, MVT::v4i8, 2},
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{ISD::ZERO_EXTEND, MVT::v4i32, MVT::v4i8, 2},
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// extend_low, extend_high
136+
{ISD::SIGN_EXTEND, MVT::v4i64, MVT::v4i32, 2},
137+
{ISD::ZERO_EXTEND, MVT::v4i64, MVT::v4i32, 2},
138+
{ISD::SIGN_EXTEND, MVT::v8i32, MVT::v8i16, 2},
139+
{ISD::ZERO_EXTEND, MVT::v8i32, MVT::v8i16, 2},
140+
{ISD::SIGN_EXTEND, MVT::v16i16, MVT::v16i8, 2},
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{ISD::ZERO_EXTEND, MVT::v16i16, MVT::v16i8, 2},
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// 2x extend_low, extend_high
143+
{ISD::SIGN_EXTEND, MVT::v8i64, MVT::v8i32, 4},
144+
{ISD::ZERO_EXTEND, MVT::v8i64, MVT::v8i32, 4},
145+
{ISD::SIGN_EXTEND, MVT::v16i32, MVT::v16i16, 4},
146+
{ISD::ZERO_EXTEND, MVT::v16i32, MVT::v16i16, 4},
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// shuffle
148+
{ISD::TRUNCATE, MVT::v2i16, MVT::v2i32, 2},
149+
{ISD::TRUNCATE, MVT::v2i8, MVT::v2i32, 4},
150+
{ISD::TRUNCATE, MVT::v4i16, MVT::v4i32, 2},
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{ISD::TRUNCATE, MVT::v4i8, MVT::v4i32, 4},
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// narrow, and
153+
{ISD::TRUNCATE, MVT::v8i16, MVT::v8i32, 2},
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{ISD::TRUNCATE, MVT::v8i8, MVT::v8i16, 2},
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// narrow, 2x and
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{ISD::TRUNCATE, MVT::v16i8, MVT::v16i16, 3},
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// 3x narrow, 4x and
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{ISD::TRUNCATE, MVT::v8i16, MVT::v8i64, 7},
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{ISD::TRUNCATE, MVT::v16i8, MVT::v16i32, 7},
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// 7x narrow, 8x and
161+
{ISD::TRUNCATE, MVT::v16i8, MVT::v16i64, 15},
162+
// convert_i32x4
163+
{ISD::SINT_TO_FP, MVT::v2f32, MVT::v2i32, 1},
164+
{ISD::UINT_TO_FP, MVT::v2f32, MVT::v2i32, 1},
165+
{ISD::SINT_TO_FP, MVT::v4f32, MVT::v4i32, 1},
166+
{ISD::UINT_TO_FP, MVT::v4f32, MVT::v4i32, 1},
167+
// extend_low, convert
168+
{ISD::SINT_TO_FP, MVT::v2f32, MVT::v2i16, 2},
169+
{ISD::UINT_TO_FP, MVT::v2f32, MVT::v2i16, 2},
170+
{ISD::SINT_TO_FP, MVT::v4f32, MVT::v4i16, 2},
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{ISD::UINT_TO_FP, MVT::v4f32, MVT::v4i16, 2},
172+
// extend_low x 2, convert
173+
{ISD::SINT_TO_FP, MVT::v2f32, MVT::v2i8, 3},
174+
{ISD::UINT_TO_FP, MVT::v2f32, MVT::v2i8, 3},
175+
{ISD::SINT_TO_FP, MVT::v4f32, MVT::v4i8, 3},
176+
{ISD::UINT_TO_FP, MVT::v4f32, MVT::v4i8, 3},
177+
// several shuffles
178+
{ISD::SINT_TO_FP, MVT::v8f32, MVT::v8i8, 10},
179+
{ISD::UINT_TO_FP, MVT::v8f32, MVT::v8i8, 10},
180+
{ISD::SINT_TO_FP, MVT::v8f32, MVT::v8i16, 10},
181+
{ISD::UINT_TO_FP, MVT::v8f32, MVT::v8i8, 10},
182+
/// trunc_sat, const, and, 3x narrow
183+
{ISD::FP_TO_SINT, MVT::v2i8, MVT::v2f32, 6},
184+
{ISD::FP_TO_UINT, MVT::v2i8, MVT::v2f32, 6},
185+
{ISD::FP_TO_SINT, MVT::v4i8, MVT::v4f32, 6},
186+
{ISD::FP_TO_UINT, MVT::v4i8, MVT::v4f32, 6},
187+
/// trunc_sat, const, and, narrow
188+
{ISD::FP_TO_UINT, MVT::v2i16, MVT::v2f32, 4},
189+
{ISD::FP_TO_SINT, MVT::v2i16, MVT::v2f32, 4},
190+
{ISD::FP_TO_SINT, MVT::v4i16, MVT::v4f32, 4},
191+
{ISD::FP_TO_UINT, MVT::v4i16, MVT::v4f32, 4},
192+
// 2x trunc_sat, const, 2x and, 3x narrow
193+
{ISD::FP_TO_SINT, MVT::v8i8, MVT::v8f32, 8},
194+
{ISD::FP_TO_UINT, MVT::v8i8, MVT::v8f32, 8},
195+
// 2x trunc_sat, const, 2x and, narrow
196+
{ISD::FP_TO_SINT, MVT::v8i16, MVT::v8f32, 6},
197+
{ISD::FP_TO_UINT, MVT::v8i16, MVT::v8f32, 6},
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};
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if (const auto *Entry =

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