ARM: dts: at91: sama5d2: adapt CAN message ram size

CAN0 and CAN1 current configurations need 0x1C00 bytes each for their
message ram. Make it match exactly so that is easily understandable.
No functional change expected.

Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>

Author: noglitch

arch/arm/boot/dts/sama5d2.dtsi

@@ -722,7 +722,7 @@
 
 			can0: can@f8054000 {
 				compatible = "bosch,m_can";
-				reg = <0xf8054000 0x4000>, <0x210000 0x2000>;
+				reg = <0xf8054000 0x4000>, <0x210000 0x1c00>;
 				reg-names = "m_can", "message_ram";
 				interrupts = <56 IRQ_TYPE_LEVEL_HIGH 7>,
 					     <64 IRQ_TYPE_LEVEL_HIGH 7>;
@@ -947,7 +947,7 @@
 
 			can1: can@fc050000 {
 				compatible = "bosch,m_can";
-				reg = <0xfc050000 0x4000>, <0x210000 0x4000>;
+				reg = <0xfc050000 0x4000>, <0x210000 0x3800>;
 				reg-names = "m_can", "message_ram";
 				interrupts = <57 IRQ_TYPE_LEVEL_HIGH 7>,
 					     <65 IRQ_TYPE_LEVEL_HIGH 7>;