Looks like removing dessa WA still cause perf regression.

(This is weird, the applications must be sensitive to a
minor code sequence difference).

Enable WA for now and handle WA later.

This is in effect to revert the following commit
   36797185837fd7c2156f4f8c8a9500f7513a04f9

Change-Id: Id1e9b087c216c75a9e824c006eb09942135d5230

Author: jgu222

IGC/common/igc_flags.def

@@ -68,7 +68,7 @@ DECLARE_IGC_REGKEY(DWORD, LoopSinkMinSave,              5,  "If loop sink can ha
 DECLARE_IGC_REGKEY(DWORD, LoopSinkThresholdDelta,       50,  "Do loop sink If the estimated register pressure is higher than this + #avaialble registers")
 DECLARE_IGC_REGKEY(bool, DisableCodeHoisting,           false, "Setting this to 1/true adds a compiler switch to disable code-hoisting")
 DECLARE_IGC_REGKEY(bool, DisableDeSSA,                  false, "Setting this to 1/true adds a compiler switch to disable optimized De-SSA")
-DECLARE_IGC_REGKEY(bool, EnableDeSSAWA,                 false,  "[tmp]Keep some piece of code to avoid perf regression")
+DECLARE_IGC_REGKEY(bool, EnableDeSSAWA,                 true,  "[tmp]Keep some piece of code to avoid perf regression")
 DECLARE_IGC_REGKEY(DWORD, EnableDeSSAAlias,             0, "[tmp]Enable adding alias feature to DeSSA (using PrefCCMap, not InsEltMap")
 DECLARE_IGC_REGKEY(bool, DisablePayloadCoalescing,      false, "Setting this to 1/true adds a compiler switch to disable payload coalescing optimization for all types")
 DECLARE_IGC_REGKEY(bool, DisablePayloadCoalescing_RT,   false, "Setting this to 1/true adds a compiler switch to disable payload coalescing optimization for RT only")