@@ -140,8 +140,9 @@ void DeSSA::dump() const {
140140 print (ods ());
141141}
142142
143- bool DeSSA::runOnFunction (Function &MF) {
144-
143+ bool DeSSA::runOnFunction (Function &MF)
144+ {
145+ CurrColor = 0 ;
145146 MetaDataUtils *pMdUtils = getAnalysis<MetaDataUtilsWrapper>().getMetaDataUtils ();
146147 if (pMdUtils->findFunctionsInfoItem (&MF) == pMdUtils->end_FunctionsInfo ())
147148 {
@@ -299,7 +300,7 @@ bool DeSSA::runOnFunction(Function &MF) {
299300 // Perform a depth-first traversal of the dominator tree, splitting
300301 // interferences amongst PHI-congruence classes.
301302 if (!RegNodeMap.empty ()) {
302- DenseMap<Value* , Value*> CurrentDominatingParent;
303+ DenseMap<int , Value*> CurrentDominatingParent;
303304 DenseMap<Value*, Value*> ImmediateDominatingParent;
304305 // first, go through the function arguments
305306 SplitInterferencesForArgument (CurrentDominatingParent, ImmediateDominatingParent);
@@ -320,7 +321,7 @@ bool DeSSA::runOnFunction(Function &MF) {
320321void DeSSA::MapAddReg (MapVector<Value*, Node*> &Map, Value *Val, e_alignment Align) {
321322 if (Map.count (Val))
322323 return ;
323- Map[Val] = new (Allocator) Node (Val, Align);
324+ Map[Val] = new (Allocator) Node (Val, ++CurrColor, Align);
324325}
325326
326327DeSSA::Node*
@@ -352,6 +353,19 @@ Value* DeSSA::getRegRoot(Value* Val, e_alignment *pAlign) const {
352353 return TheLeader->value ;
353354}
354355
356+ int DeSSA::getRootColor (Value* V)
357+ {
358+ auto RI = RegNodeMap.find (V);
359+ if (RI == RegNodeMap.end ())
360+ return 0 ;
361+ Node *TheNode = RI->second ;
362+ if (TheNode->parent .getInt () &
363+ (Node::kRegisterIsolatedFlag | Node::kPHIIsolatedFlag ))
364+ return 0 ;
365+ Node *TheLeader = TheNode->getLeader ();
366+ return TheLeader->color ;
367+ }
368+
355369void DeSSA::MapUnionRegs (MapVector<Value*, Node*> &Map, Value* Val1, Value* Val2) {
356370 Node *Node1 = Map[Val1]->getLeader ();
357371 Node *Node2 = Map[Val2]->getLeader ();
@@ -466,7 +480,7 @@ bool DeSSA::isPHIIsolated(Instruction *PHI) const {
466480void
467481DeSSA::SplitInterferencesForBasicBlock (
468482 BasicBlock *MBB,
469- DenseMap<Value* , Value*> &CurrentDominatingParent,
483+ DenseMap<int , Value*> &CurrentDominatingParent,
470484 DenseMap<Value*, Value*> &ImmediateDominatingParent) {
471485 // Sort defs by their order in the original basic block, as the code below
472486 // assumes that it is processing definitions in dominance order.
@@ -480,8 +494,8 @@ DeSSA::SplitInterferencesForBasicBlock(
480494
481495 // If the virtual register being defined is not used in any PHI or has
482496 // already been isolated, then there are no more interferences to check.
483- Value* RootV = getRegRoot (DefMI);
484- if (!RootV )
497+ int RootC = getRootColor (DefMI);
498+ if (!RootC )
485499 continue ;
486500
487501 // The input to this pass sometimes is not in SSA form in every basic
@@ -490,7 +504,7 @@ DeSSA::SplitInterferencesForBasicBlock(
490504 // handle it here by tracking defining machine instructions rather than
491505 // virtual registers. For now, we just handle the situation conservatively
492506 // in a way that will possibly lead to false interferences.
493- Value* NewParent = CurrentDominatingParent[RootV ];
507+ Value* NewParent = CurrentDominatingParent[RootC ];
494508 if (NewParent == DefMI)
495509 continue ;
496510
@@ -524,12 +538,12 @@ DeSSA::SplitInterferencesForBasicBlock(
524538 // could be improved by using a heuristic that decides which of the two
525539 // registers to isolate.
526540 isolateReg (DefMI);
527- CurrentDominatingParent[RootV ] = NewParent;
541+ CurrentDominatingParent[RootC ] = NewParent;
528542 } else {
529543 // If there is no interference, update ImmediateDominatingParent and set
530544 // the CurrentDominatingParent for this color to the current register.
531545 ImmediateDominatingParent[DefMI] = NewParent;
532- CurrentDominatingParent[RootV ] = DefMI;
546+ CurrentDominatingParent[RootC ] = DefMI;
533547 }
534548 }
535549
@@ -576,7 +590,7 @@ DeSSA::SplitInterferencesForBasicBlock(
576590 }
577591
578592 // check live-out interference
579- Value *RootV = getRegRoot (PHI);
593+ int RootC = getRootColor (PHI);
580594#if 0
581595 for (unsigned i = 0; !RootV && i < PHI->getNumOperands(); i++) {
582596 Value* SrcVal = PHI->getOperand(i);
@@ -588,12 +602,12 @@ DeSSA::SplitInterferencesForBasicBlock(
588602 }
589603 }
590604#endif
591- if (!RootV )
605+ if (!RootC )
592606 continue ;
593607
594608 // Pop registers from the stack represented by ImmediateDominatingParent
595609 // until we find a parent that dominates the current instruction.
596- Value *NewParent = CurrentDominatingParent[RootV ];
610+ Value *NewParent = CurrentDominatingParent[RootC ];
597611 while (NewParent) {
598612 if (getRegRoot (NewParent)) {
599613 if (isa<Argument>(NewParent)) {
@@ -604,7 +618,7 @@ DeSSA::SplitInterferencesForBasicBlock(
604618 }
605619 NewParent = ImmediateDominatingParent[NewParent];
606620 }
607- CurrentDominatingParent[RootV ] = NewParent;
621+ CurrentDominatingParent[RootC ] = NewParent;
608622
609623 // If there is an interference with a register, always isolate the
610624 // register rather than the PHI. It is also possible to isolate the
@@ -619,22 +633,22 @@ DeSSA::SplitInterferencesForBasicBlock(
619633
620634void
621635DeSSA::SplitInterferencesForArgument (
622- DenseMap<Value* , Value*> &CurrentDominatingParent,
636+ DenseMap<int , Value*> &CurrentDominatingParent,
623637 DenseMap<Value*, Value*> &ImmediateDominatingParent) {
624638 // No two arguments can be in the same congruent class
625639 for (auto BBI = PHISrcArgs.begin (),
626640 BBE = PHISrcArgs.end (); BBI != BBE; ++BBI) {
627641 Value *AV = *BBI;
628642 // If the virtual register being defined is not used in any PHI or has
629643 // already been isolated, then there are no more interferences to check.
630- Value* RootV = getRegRoot (AV);
631- if (!RootV )
644+ int RootC = getRootColor (AV);
645+ if (!RootC )
632646 continue ;
633- Value* NewParent = CurrentDominatingParent[RootV ];
647+ Value* NewParent = CurrentDominatingParent[RootC ];
634648 if (NewParent) {
635649 isolateReg (AV);
636650 } else {
637- CurrentDominatingParent[RootV ] = AV;
651+ CurrentDominatingParent[RootC ] = AV;
638652 }
639653 }
640654}
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