Revert: Refactor Pre-RA Scheduling

Refactor Pre-RA Scheduling

Author: pszymich

visa/G4_Kernel.hpp

@@ -426,6 +426,7 @@ class G4_Kernel {
   bool m_hasIndirectCall = false;
 
   VarSplitPass *varSplitPass = nullptr;
+  GRFMode grfMode;
 
   // map key is filename string with complete path.
   // if first elem of pair is false, the file wasn't found.
@@ -493,7 +494,6 @@ class G4_Kernel {
   unsigned char minor_version;
 
   StackCallABI stackCall;
-  GRFMode grfMode;
 
   G4_Kernel(const PlatformInfo &pInfo, INST_LIST_NODE_ALLOCATOR &alloc,
             Mem_Manager &m, Options *options, Attributes *anAttr,

visa/LocalScheduler/G4_Sched.cpp

@@ -31,7 +31,6 @@ static const unsigned LARGE_BLOCK_SIZE = 20000;
 static const unsigned LARGE_BLOCK_SIZE_RPE = 32000;
 static const unsigned PRESSURE_REDUCTION_MIN_BENEFIT = 5; // percentage
 static const unsigned PRESSURE_REDUCTION_THRESHOLD = 110;
-static const unsigned PRESSURE_LATENCY_HIDING_THRESHOLD = 104;
 static const unsigned PRESSURE_HIGH_THRESHOLD = 128;
 static const unsigned PRESSURE_REDUCTION_THRESHOLD_SIMD32 = 120;
 
@@ -362,16 +361,12 @@ struct RegisterPressure {
   }
 
   void recompute(G4_BB *BB) { rpe->runBB(BB); }
-  void recompute() { rpe->run(); }
 
   // Return the register pressure in GRF for an instruction.
   unsigned getPressure(G4_INST *Inst) const {
     return rpe->getRegisterPressure(Inst);
   }
 
-  // Return the max register pressure
-  unsigned getMaxRP() const { return rpe->getMaxRP(); }
-
   // Return the max pressure in GRFs for this block.
   unsigned getPressure(G4_BB *bb, std::vector<G4_INST *> *Insts = nullptr) {
     unsigned Max = 0;
@@ -495,7 +490,7 @@ class BB_Scheduler {
   // ReassignID of PreNodes when this is not 1st-round scheduling
   // KernelRP is the measure max reg-pressure of this kernel before scheduling
   bool scheduleBlockForLatency(unsigned &MaxPressure, bool ReassignID,
-                               unsigned UpperBoundGRF);
+                               unsigned KernelRP);
 
 private:
   void SethiUllmanScheduling();
@@ -550,29 +545,29 @@ static unsigned getLatencyHidingThreshold(G4_Kernel &kernel, unsigned NumGrfs) {
   unsigned RPThreshold =
       kernel.getOptions()->getuInt32Option(vISA_preRA_ScheduleRPThreshold);
   if (RPThreshold == 0) {
-    RPThreshold = PRESSURE_LATENCY_HIDING_THRESHOLD;
+    RPThreshold = 104;
   }
-  return unsigned(RPThreshold * (std::max(NumGrfs, 128u) - 48u) / 80u);
+  return unsigned(RPThreshold * (std::max(NumGrfs, 128u) - 32u) / 96u);
 }
 
-preRA_Scheduler::preRA_Scheduler(G4_Kernel &k)
-    : kernel(k) {}
+preRA_Scheduler::preRA_Scheduler(G4_Kernel &k, RPE *rpe)
+    : kernel(k), rpe(rpe), m_options(kernel.getOptions()) {}
 
 preRA_Scheduler::~preRA_Scheduler() {}
 
-bool preRA_Scheduler::run(unsigned &KernelPressure) {
+bool preRA_Scheduler::run() {
   if (kernel.getInt32KernelAttr(Attributes::ATTR_Target) != VISA_3D) {
     // Do not run pre-RA scheduler for CM unless user forces it.
-    if (!kernel.getOption(vISA_preRA_ScheduleForce))
+    if (!m_options->getOption(vISA_preRA_ScheduleForce))
       return false;
   }
 
   unsigned Threshold = getRPReductionThreshold(kernel);
-  unsigned SchedCtrl = kernel.getuInt32Option(vISA_preRA_ScheduleCtrl);
+  unsigned SchedCtrl = m_options->getuInt32Option(vISA_preRA_ScheduleCtrl);
 
   auto LT = LatencyTable::createLatencyTable(*kernel.fg.builder);
   SchedConfig config(SchedCtrl);
-  RegisterPressure rp(kernel, nullptr);
+  RegisterPressure rp(kernel, rpe);
   // skip extreme test cases that scheduling does not good
   // if (kernel.fg.getNumBB() >= 10000 && rp.rpe->getMaxRP() >= 800)
   //   return false;
@@ -585,16 +580,16 @@ bool preRA_Scheduler::run(unsigned &KernelPressure) {
       continue;
     }
 
-    if (kernel.getuInt32Option(vISA_ScheduleStartBBID) &&
+    if (kernel.getOptions()->getuInt32Option(vISA_ScheduleStartBBID) &&
         (bb->getId() <
-         kernel.getuInt32Option(vISA_ScheduleStartBBID))) {
+         kernel.getOptions()->getuInt32Option(vISA_ScheduleStartBBID))) {
       SCHED_DUMP(std::cerr << "Skip BB" << bb->getId() << "\n");
       continue;
     }
 
-    if (kernel.getuInt32Option(vISA_ScheduleEndBBID) &&
+    if (kernel.getOptions()->getuInt32Option(vISA_ScheduleEndBBID) &&
         (bb->getId() >
-         kernel.getuInt32Option(vISA_ScheduleEndBBID))) {
+         kernel.getOptions()->getuInt32Option(vISA_ScheduleEndBBID))) {
       SCHED_DUMP(std::cerr << "Skip BB" << bb->getId() << "\n");
       continue;
     }
@@ -612,118 +607,120 @@ bool preRA_Scheduler::run(unsigned &KernelPressure) {
     Changed |= S.scheduleBlockForPressure(MaxPressure, Threshold);
     Changed |= S.scheduleBlockForLatency(MaxPressure, Changed, 0);
   }
-
-  if (Changed)
-    rp.recompute();
-  KernelPressure = rp.getMaxRP();
-
+  if (kernel.getOptions()->getOption(vISA_PreSchedGRFPressure)) {
+    rp.rpe->run();
+    kernel.fg.builder->getJitInfo()->stats.maxGRFPressure = rp.rpe->getMaxRP();
+  }
   return Changed;
 }
 
-preRA_RegSharing::preRA_RegSharing(G4_Kernel &k)
-    : kernel(k) {}
+preRA_RegSharing::preRA_RegSharing(G4_Kernel &k, RPE *rpe)
+    : kernel(k), rpe(rpe) {}
 
 preRA_RegSharing::~preRA_RegSharing() {}
 
-bool preRA_RegSharing::run(unsigned &KernelPressure) {
-
+bool preRA_RegSharing::run() {
+  // General algorithm:
+  //  1. Schedule for pressure
+  //      - If RP is low (e.g. < 64, based on platform), set maximum number of
+  //      threads
+  //  2. Estimate number of threads [4 .. 12] based on initial RP
+  //  3. Schedule for latency (obtain ILP, stalls, throughput)
+  //  4. Compute cost of schedule
+  //  5. Based on schedule cost:
+  //      - Return ok (keep best schedule)
+  //      - Goto 3
 
   if (kernel.getInt32KernelAttr(Attributes::ATTR_Target) != VISA_3D) {
     // Do not run pre-RA scheduler for CM unless user forces it.
-    if (!kernel.getOption(vISA_preRA_ScheduleForce))
+    if (!kernel.getOptions()->getOption(vISA_preRA_ScheduleForce))
       return false;
   }
 
-  bool Changed = false;
+  bool changed = false;
 
-  unsigned SchedCtrl = kernel.getuInt32Option(vISA_preRA_ScheduleCtrl);
+  unsigned SchedCtrl =
+      kernel.getOptions()->getuInt32Option(vISA_preRA_ScheduleCtrl);
   SchedConfig config(SchedCtrl);
-  RegisterPressure rp(kernel, nullptr);
-  KernelPressure = rp.getMaxRP();
-  unsigned RPReductionThreshold = getRPReductionThreshold(kernel);
-  auto LT = LatencyTable::createLatencyTable(*kernel.fg.builder);
 
-  // Schedule for reg pressure reduction if needed
+  RegisterPressure rp(kernel, rpe);
+
+  std::unordered_map<G4_BB *, unsigned int> rpBB;
+  unsigned KernelPressure = 0;
+
+  // Obtain register pressure estimate of every BB
   for (auto bb : kernel.fg) {
-    // Skip BBs:
-    if (bb->size() < SMALL_BLOCK_SIZE || bb->size() > LARGE_BLOCK_SIZE) {
+    if (bb->size() < SMALL_BLOCK_SIZE || bb->size() > LARGE_BLOCK_SIZE_RPE) {
       SCHED_DUMP(std::cerr << "Skip block with instructions " << bb->size()
                            << "\n");
       continue;
     }
 
-    if (kernel.getuInt32Option(vISA_ScheduleStartBBID) &&
-        (bb->getId() < kernel.getuInt32Option(vISA_ScheduleStartBBID))) {
-      SCHED_DUMP(std::cerr << "Skip BB" << bb->getId() << "\n");
-      continue;
-    }
+    unsigned pressure = rp.getPressure(bb);
+    rpBB[bb] = pressure;
 
-    if (kernel.getuInt32Option(vISA_ScheduleEndBBID) &&
-        (bb->getId() > kernel.getuInt32Option(vISA_ScheduleEndBBID))) {
-      SCHED_DUMP(std::cerr << "Skip BB" << bb->getId() << "\n");
-      continue;
+    if (pressure > KernelPressure) {
+      KernelPressure = pressure;
     }
-
-    // Schedule:
-    SCHED_DUMP(rp.dump(bb, "Before scheduling for pressure reduction, "));
-    preDDD ddd(kernel, bb);
-    BB_Scheduler S(kernel, ddd, rp, config, *LT);
-    unsigned BBRP = rp.getPressure(bb);
-    Changed |= S.scheduleBlockForPressure(BBRP, RPReductionThreshold);
   }
 
-  if (Changed) {
-    // Re-compute register pressure estimation
-    rp.recompute();
-    KernelPressure = rp.getMaxRP();
+  // Obs: Heuristic considering PVC with 2 GRF modes as of 03/2020
+  // If maximum register pressure is higher than default GRF mode,
+  // assign the smallest number of threads to this kernel.
+  if (!kernel.getOptions()->getuInt32Option(vISA_HWThreadNumberPerEU) &&
+      (KernelPressure >
+       kernel.getScaledGRFSize(PRESSURE_HIGH_THRESHOLD) -
+           kernel.getOptions()->getuInt32Option(vISA_ReservedGRFNum))) {
+    // Update number of threads, GRF, Acc and SWSB
+    kernel.updateKernelToLargerGRF();
   }
 
-  // Adjust GRF based on register pressure
-  unsigned oldGRFNum = kernel.getNumRegTotal();
-  kernel.updateKernelByRegPressure(KernelPressure);
-  bool GRFdecreased = kernel.getNumRegTotal() < oldGRFNum;
-  Changed = false;
+  // skip extreme test cases that scheduling does not good
+  // if (kernel.fg.getNumBB() >= 10000 && KernelPressure >= 800)
+  //   return false;
+
+  unsigned Threshold = getRPReductionThreshold(kernel);
+  auto LT = LatencyTable::createLatencyTable(*kernel.fg.builder);
 
-  // Schedule for latency hiding if needed
   for (auto bb : kernel.fg) {
-    // Skip BBs:
     if (bb->size() < SMALL_BLOCK_SIZE || bb->size() > LARGE_BLOCK_SIZE) {
       SCHED_DUMP(std::cerr << "Skip block with instructions " << bb->size()
                            << "\n");
       continue;
     }
 
-    if (kernel.getuInt32Option(vISA_ScheduleStartBBID) &&
-        (bb->getId() < kernel.getuInt32Option(vISA_ScheduleStartBBID))) {
+    if (kernel.getOptions()->getuInt32Option(vISA_ScheduleStartBBID) &&
+        (bb->getId() <
+         kernel.getOptions()->getuInt32Option(vISA_ScheduleStartBBID))) {
       SCHED_DUMP(std::cerr << "Skip BB" << bb->getId() << "\n");
       continue;
     }
 
-    if (kernel.getuInt32Option(vISA_ScheduleEndBBID) &&
-        (bb->getId() > kernel.getuInt32Option(vISA_ScheduleEndBBID))) {
+    if (kernel.getOptions()->getuInt32Option(vISA_ScheduleEndBBID) &&
+        (bb->getId() >
+         kernel.getOptions()->getuInt32Option(vISA_ScheduleEndBBID))) {
       SCHED_DUMP(std::cerr << "Skip BB" << bb->getId() << "\n");
       continue;
     }
 
-    // Schedule:
-    SCHED_DUMP(rp.dump(bb, "Before scheduling for latency hiding, "));
+    unsigned MaxPressure = rpBB.find(bb) == rpBB.end() ? 0 : rpBB[bb];
+    if (MaxPressure <= Threshold && !config.UseLatency) {
+      SCHED_DUMP(std::cerr << "Skip block with rp " << MaxPressure << "\n");
+      continue;
+    }
+
+    SCHED_DUMP(rp.dump(bb, "Before scheduling, "));
     preDDD ddd(kernel, bb);
     BB_Scheduler S(kernel, ddd, rp, config, *LT);
-    unsigned BBRP = rp.getPressure(bb);
 
-    unsigned UpperBoundGRF = 0;
-    if (GRFdecreased && KernelPressure < kernel.grfMode.getMaxGRF())
-      UpperBoundGRF = kernel.grfMode.getLargerGRF();
-    Changed |= S.scheduleBlockForLatency(BBRP, Changed, UpperBoundGRF);
+    changed |= S.scheduleBlockForPressure(MaxPressure, Threshold);
+      changed |= S.scheduleBlockForLatency(MaxPressure, changed, 0);
   }
-
-  if (Changed) {
-    rp.recompute();
-    KernelPressure = rp.getMaxRP();
+  if (kernel.getOptions()->getOption(vISA_PreSchedGRFPressure)) {
+    rp.rpe->run();
+    kernel.fg.builder->getJitInfo()->stats.maxGRFPressure = rp.rpe->getMaxRP();
   }
-  kernel.updateKernelByRegPressure(KernelPressure);
-
-  return Changed;
+  return changed;
 }
 
 bool BB_Scheduler::verifyScheduling() {
@@ -1434,14 +1431,13 @@ class LatencyQueue : public QueueBase {
 
 //
 bool BB_Scheduler::scheduleBlockForLatency(unsigned &MaxPressure,
-                                           bool ReassignID, unsigned UpperBoundGRF) {
+                                           bool ReassignID, unsigned KernelRP) {
   auto tryLatencyHiding = [=](unsigned nr) {
     if (!config.UseLatency)
       return false;
 
-    // UpperBoundGRF == 0 means we are scheduling for the fixed number of GRF
-    if (UpperBoundGRF == 0 &&
-        MaxPressure >= getLatencyHidingThreshold(kernel, nr))
+    // KernelRP == 0 means we are scheduling for the fixed number of GRF
+    if (KernelRP == 0 && MaxPressure >= getLatencyHidingThreshold(kernel, nr))
       return false;
 
     // simple ROI check.
@@ -1464,15 +1460,17 @@ bool BB_Scheduler::scheduleBlockForLatency(unsigned &MaxPressure,
   if (!tryLatencyHiding(NumGrfs))
     return false;
 
-  // UpperBoundGRF == 0 means we only schedule under single NumGRF
+  // UpperBoundGRF == NumGrfs means we only schedule under single NumGRF
   // setting for this block instead of trying to find the best schedule
-  // among multiple NumGRF settings.
-  if (UpperBoundGRF == 0)
-    UpperBoundGRF = NumGrfs;
-
+  // among multiple NumGRF setting.
+  unsigned UpperBoundGRF = NumGrfs;
   unsigned SavedEstimation = 0;
   std::vector<G4_INST *> SavedSchedule;
 
+  // multiple settings are applied only to some blocks to save time
+  if (KernelRP > 0 && MaxPressure > 40 && MaxPressure * 2 > KernelRP)
+    UpperBoundGRF = std::max(256U, UpperBoundGRF);
+
   for (; NumGrfs <= UpperBoundGRF; NumGrfs += 32) {
     // try grouping-threshold decremently until we find a schedule likely won't
     // spill

visa/LocalScheduler/LocalScheduler_G4IR.h

@@ -343,12 +343,14 @@ class LocalScheduler {
 
 class preRA_Scheduler {
 public:
-  preRA_Scheduler(G4_Kernel &k);
+  preRA_Scheduler(G4_Kernel &k, RPE *rpe);
   ~preRA_Scheduler();
-  bool run(unsigned &KernelPressure);
+  bool run();
 
 private:
   G4_Kernel &kernel;
+  RPE *rpe;
+  Options *m_options;
 };
 
 class preRA_ACC_Scheduler {
@@ -365,12 +367,13 @@ class preRA_ACC_Scheduler {
 
 class preRA_RegSharing {
 public:
-  preRA_RegSharing(G4_Kernel &k);
+  preRA_RegSharing(G4_Kernel &k, RPE *rpe);
   ~preRA_RegSharing();
-  bool run(unsigned &KernelPressure);
+  bool run();
 
 private:
   G4_Kernel &kernel;
+  RPE *rpe;
 };
 // Restrictions of candidate for 2xDP:
 //    1, Only support SIMD16 DF mad with M0

visa/Optimizer.cpp

@@ -137,28 +137,6 @@ void Optimizer::insertFallThroughJump() {
   }
 }
 
-void Optimizer::preRA_Schedule() {
-  bool Changed = false;
-  unsigned KernelPressure = 0;
-  if (kernel.useRegSharingHeuristics()) {
-    preRA_RegSharing Sched(kernel);
-    Changed = Sched.run(KernelPressure);
-  } else {
-    preRA_Scheduler Sched(kernel);
-    Changed = Sched.run(KernelPressure);
-  }
-  // Update Jit info for max register pressure
-  kernel.fg.builder->getJitInfo()->stats.maxGRFPressure = KernelPressure;
-
-  unsigned GRFChange = (KernelPressure * 100) / kernel.getNumRegTotal();
-  if (kernel.getOption(vISA_AbortOnSpill) &&
-      GRFChange > ABORT_ON_SPILL_IF_RP_HIGH) {
-    // If -abortOnSpill is set and register spills are anavoidable,
-    // compilation is aborted.
-    AbortHighRP = true;
-  }
-}
-
 void Optimizer::forceAssignRegs() {
   const char *rawStr =
       builder.getOptions()->getOptionCstr(vISA_ForceAssignRhysicalReg);