Add missing implicit acc dst for madw

madw has implicit def to acc.  Missing this implicit dst causes
copyprop incorrectly propagates acc src over madw.

Author: jgu222

visa/G4_IR.cpp

@@ -1573,8 +1573,7 @@ bool G4_INST::hasACCOpnd() const
         (dst && dst->isAccReg()) ||
         (srcs[0] && srcs[0]->isAccReg()) ||
         (srcs[1] && srcs[1]->isAccReg()) ||
-        (srcs[2] && srcs[2]->isAccReg()) ||
-        op == G4_madw);
+        (srcs[2] && srcs[2]->isAccReg()));
 }
 
 G4_Type G4_INST::getOpExecType(int& extypesize)

visa/HWConformity.cpp

@@ -9455,12 +9455,6 @@ INST_LIST_ITER HWConformity::fixMadwInst(INST_LIST_ITER it, G4_BB* bb)
                 madwInst->setSrc(insertMovBefore(it, 0, src0->getType(), bb), 0);
             }
         }
-
-        // add implicit acc dst to the madw instruction as acc will be used as dst of the expanded mul after local scheduling.
-        // it is a must to fix the WAR/WAW issue of acc in local scheduling.
-        G4_DstRegRegion* accDstOpnd = builder.createDst(builder.phyregpool.getAcc0Reg(), 0, 0, 1, madwInst->getDst()->getType());
-        madwInst->setImplAccDst(accDstOpnd);
-
         retIter = std::next(it);
     }
     else
@@ -9476,6 +9470,9 @@ INST_LIST_ITER HWConformity::fixMadwInst(INST_LIST_ITER it, G4_BB* bb)
         //     mach (16) dst_hi32<1>:d  src0<1;1,0>:d    src1<1;1,0>:d // High 32 bits
         //     mov  (16) dst_lo32<1>:d  acc0.0<1;1,0>:d                // Low 32 bits
 
+        // unset AccWrCtrl
+        madwInst->setOptionOff(InstOpt_AccWrCtrl);
+
         uint32_t origOptions = madwInst->getOption();
         G4_Predicate* origPredicate = madwInst->getPredicate();
         G4_Type tmpType = (IS_UNSIGNED_INT(src0->getType()) && IS_UNSIGNED_INT(src1->getType()) && IS_UNSIGNED_INT(src2->getType())) ? Type_UD : Type_D;

visa/Optimizer.cpp

@@ -16849,6 +16849,9 @@ void Optimizer::expandMadwPostSchedule()
                 continue;
             }
 
+            // Unset a AccWrCtrl first.
+            inst->setOptionOff(InstOpt_AccWrCtrl);
+
             G4_Operand* src0 = inst->getSrc(0);
             G4_Operand* src1 = inst->getSrc(1);
             G4_Operand* src2 = inst->getSrc(2);

visa/VisaToG4/TranslateALU.cpp

@@ -109,7 +109,7 @@ int IR_Builder::translateVISAArithmeticInst(
         }
 
         // do not check type of sources, float and integer are supported
-        createInst(
+        auto inst = createInst(
             predOpnd,
             GetGenOpcodeFromVISAOpcode(opcode),
             condMod,
@@ -121,6 +121,19 @@ int IR_Builder::translateVISAArithmeticInst(
             src2Opnd,
             instOpt,
             true);
+
+        if (opcode == ISA_MADW)
+        {
+            G4_DstRegRegion* accDstOpnd = createDst(
+                phyregpool.getAcc0Reg(),
+                0,
+                0,
+                1,
+                dstOpnd->getType());
+
+            inst->setImplAccDst(accDstOpnd);
+            inst->setOptionOn(InstOpt_AccWrCtrl); // to be consistent with impl Acc.
+        }
     }
     else
     {