GEPLowering improvement

GEPLowering for large constant addresses.

Author: gkluczek

IGC/Compiler/CISACodeGen/GenIRLowering.cpp

@@ -604,7 +604,7 @@ bool GEPLowering::lowerGetElementPtrInst(GetElementPtrInst* GEP) const
         else if (GEP->getAddressSpace() == ADDRESS_SPACE_CONSTANT || !modMD->compOpt.GreaterThan2GBBufferRequired)
         {
             canReduceNegativeOffset = true;
-            pointerMathSizeInBits = 32;
+            pointerMathSizeInBits = m_ctx->platform.hasLargeMaxConstantBufferSize() ? 64 : 32;
             reducePointerArith = true;
         }
     }

IGC/Compiler/CISACodeGen/Platform.hpp

@@ -597,6 +597,12 @@ bool has16OWSLMBlockRW() const
     return IGC_IS_FLAG_ENABLED(Enable16OWSLMBlockRW) && isProductChildOf(IGFX_XE_HP_SDV);
 }
 
+bool hasLargeMaxConstantBufferSize() const
+{
+    return IGC_IS_FLAG_DISABLED(Force32bitConstantGEPLowering) &&
+        m_platformInfo.eProductFamily == IGFX_PVC;
+}
+
 bool supportInlineData() const
 {
     return isProductChildOf(IGFX_XE_HP_SDV);

IGC/common/igc_flags.h

@@ -114,6 +114,7 @@ DECLARE_IGC_REGKEY(bool, AvoidDstSrcGRFOverlap,               false,  "avoid GRF
 DECLARE_IGC_REGKEY(bool, AvoidSrc1Src2Overlap,               false,  "avoid src1 and src2 GRF overlap to avoid the conflict without read suppression ", false)
 DECLARE_IGC_REGKEY(bool, UseLinearScanRA,               false,  "use Linear Scan as default register allocation algorithm ", false)
 DECLARE_IGC_REGKEY(bool, DisableWriteCombine, false, "Disable write combine. PVC+ only", false)
+DECLARE_IGC_REGKEY(bool, Force32bitConstantGEPLowering, false, "Go back to old version of GEP lowering for constant address space. PVC only", false)
 
 DECLARE_IGC_GROUP("IGC Optimization")
 DECLARE_IGC_REGKEY(bool, AllowMem2Reg,                  false, "Setting this to true makes IGC run mem2reg even when optimizations are disabled", true)