From 77606a4fbb728440a3282a2c1c06564d6adc0896 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Fr=C3=A9d=C3=A9ric=20Desbiens?= Date: Fri, 11 Sep 2026 03:06:23 -0400 Subject: [PATCH] Replaced the GNU-only dsb 0xF and isb 0xF barrier operands with the UAL sy form, so tx_port.h now assembles under IAR as well as GCC and armclang The inline _tx_thread_system_return_inline implementation in the Cortex-M tx_port.h headers issued its data and instruction barriers as "dsb 0xF" and "isb 0xF". A bare hexadecimal operand is a GNU assembler extension. IAR's inline assembler only accepts the architectural option names, so it rejected the line with "operand syntax error" and the header could not be included at all. The block is guarded for GCC, armclang and IAR together, so every IAR user of an affected port hit this the moment inlining was left enabled. Replaced both operands with "sy", the Arm UAL name for the full system domain and the exact value 0xF encodes. The generated instruction is unchanged; only the spelling of the operand differs. "sy" is the canonical form in the Arm Architecture Reference Manual and is accepted by GNU as, armclang and IAR alike, which is why every reporter converged on it independently as a local workaround. The change was applied to the two ports_arch master headers and to all thirty-two generated or hand-maintained copies under ports, covering the Cortex-M0, M23, M3, M33, M4, M52, M55, M7 and M85 families across the ac5, ac6, gnu, iar and keil toolchains. scripts/check_ports.sh probed for the literal strings "dsb 0xF" and "isb 0xF" when reporting toolchain divergence within the hand-maintained M0 and M23 families. Updated the probes to the new spelling so the check keeps working. Verified that arm-none-eabi-gcc assembles the new form for every Cortex-M target the ports cover, and confirmed the regenerated ports match their masters. Assisted-by: Copilot (Opus 5) --- ports/cortex_m0/ac6/inc/tx_port.h | 6 ++++-- ports/cortex_m0/gnu/inc/tx_port.h | 5 +++-- ports/cortex_m0/iar/inc/tx_port.h | 6 ++++-- ports/cortex_m23/ac6/inc/tx_port.h | 3 ++- ports/cortex_m23/gnu/inc/tx_port.h | 5 +++-- ports/cortex_m23/iar/inc/tx_port.h | 4 +++- ports/cortex_m3/ac5/inc/tx_port.h | 5 +++-- ports/cortex_m3/ac6/inc/tx_port.h | 5 +++-- ports/cortex_m3/gnu/inc/tx_port.h | 5 +++-- ports/cortex_m3/iar/inc/tx_port.h | 5 +++-- ports/cortex_m3/keil/inc/tx_port.h | 5 +++-- ports/cortex_m33/ac6/inc/tx_port.h | 5 +++-- ports/cortex_m33/gnu/inc/tx_port.h | 5 +++-- ports/cortex_m33/iar/inc/tx_port.h | 5 +++-- ports/cortex_m4/ac5/inc/tx_port.h | 5 +++-- ports/cortex_m4/ac6/inc/tx_port.h | 5 +++-- ports/cortex_m4/gnu/inc/tx_port.h | 5 +++-- ports/cortex_m4/iar/inc/tx_port.h | 5 +++-- ports/cortex_m4/keil/inc/tx_port.h | 5 +++-- ports/cortex_m52/ac6/inc/tx_port.h | 5 +++-- ports/cortex_m52/gnu/inc/tx_port.h | 5 +++-- ports/cortex_m52/iar/inc/tx_port.h | 5 +++-- ports/cortex_m55/ac6/inc/tx_port.h | 5 +++-- ports/cortex_m55/gnu/inc/tx_port.h | 5 +++-- ports/cortex_m55/iar/inc/tx_port.h | 5 +++-- ports/cortex_m7/ac5/inc/tx_port.h | 5 +++-- ports/cortex_m7/ac6/inc/tx_port.h | 5 +++-- ports/cortex_m7/gnu/inc/tx_port.h | 5 +++-- ports/cortex_m7/iar/inc/tx_port.h | 5 +++-- ports/cortex_m85/ac6/inc/tx_port.h | 5 +++-- ports/cortex_m85/gnu/inc/tx_port.h | 5 +++-- ports/cortex_m85/iar/inc/tx_port.h | 5 +++-- ports_arch/ARMv7-M/threadx/inc/tx_port.h | 5 +++-- ports_arch/ARMv8-M/threadx/inc/tx_port.h | 5 +++-- scripts/check_ports.sh | 2 +- 35 files changed, 104 insertions(+), 67 deletions(-) diff --git a/ports/cortex_m0/ac6/inc/tx_port.h b/ports/cortex_m0/ac6/inc/tx_port.h index 214ca8e86..d6e036270 100644 --- a/ports/cortex_m0/ac6/inc/tx_port.h +++ b/ports/cortex_m0/ac6/inc/tx_port.h @@ -9,6 +9,8 @@ * SPDX-License-Identifier: MIT **************************************************************************/ +// Some portions generated by Copilot (Opus 5). + /**************************************************************************/ /**************************************************************************/ @@ -322,13 +324,13 @@ unsigned int interrupt_save; /* Set PendSV to invoke ThreadX scheduler. */ *((volatile ULONG *) 0xE000ED04) = ((ULONG) 0x10000000); - __asm__ volatile ("dsb 0xF \n isb 0xF " : : : "memory"); + __asm__ volatile ("dsb sy \n isb sy " : : : "memory"); if (__get_ipsr_value() == 0) { interrupt_save = __get_primask_value(); __enable_interrupts(); __restore_interrupts(interrupt_save); - __asm__ volatile ("isb 0xF " : : : "memory"); + __asm__ volatile ("isb sy " : : : "memory"); } } diff --git a/ports/cortex_m0/gnu/inc/tx_port.h b/ports/cortex_m0/gnu/inc/tx_port.h index 4e5270de8..51f67b654 100644 --- a/ports/cortex_m0/gnu/inc/tx_port.h +++ b/ports/cortex_m0/gnu/inc/tx_port.h @@ -10,6 +10,7 @@ **************************************************************************/ // Some portions generated by Gemini (Gemini 2.0 Flash). +// Some portions generated by Copilot (Opus 5). /**************************************************************************/ @@ -324,13 +325,13 @@ unsigned int interrupt_save; /* Set PendSV to invoke ThreadX scheduler. */ *((volatile ULONG *) 0xE000ED04) = ((ULONG) 0x10000000); - __asm__ volatile ("dsb 0xF \n isb 0xF " : : : "memory"); + __asm__ volatile ("dsb sy \n isb sy " : : : "memory"); if (__get_ipsr_value() == 0) { interrupt_save = __get_primask_value(); __enable_interrupts(); __restore_interrupts(interrupt_save); - __asm__ volatile ("isb 0xF " : : : "memory"); + __asm__ volatile ("isb sy " : : : "memory"); } } diff --git a/ports/cortex_m0/iar/inc/tx_port.h b/ports/cortex_m0/iar/inc/tx_port.h index 035009e7f..cabb0402f 100644 --- a/ports/cortex_m0/iar/inc/tx_port.h +++ b/ports/cortex_m0/iar/inc/tx_port.h @@ -9,6 +9,8 @@ * SPDX-License-Identifier: MIT **************************************************************************/ +// Some portions generated by Copilot (Opus 5). + /**************************************************************************/ /**************************************************************************/ @@ -313,13 +315,13 @@ __istate_t interrupt_save; /* Set PendSV to invoke ThreadX scheduler. */ *((volatile ULONG *) 0xE000ED04) = ((ULONG) 0x10000000); - __asm__ volatile ("dsb 0xF \n isb 0xF " : : : "memory"); + __asm__ volatile ("dsb sy \n isb sy " : : : "memory"); if (__get_IPSR() == 0) { interrupt_save = __get_interrupt_state(); __enable_interrupt(); __set_interrupt_state(interrupt_save); - __asm__ volatile ("isb 0xF " : : : "memory"); + __asm__ volatile ("isb sy " : : : "memory"); } } diff --git a/ports/cortex_m23/ac6/inc/tx_port.h b/ports/cortex_m23/ac6/inc/tx_port.h index 97cc1feeb..dcd0f3542 100644 --- a/ports/cortex_m23/ac6/inc/tx_port.h +++ b/ports/cortex_m23/ac6/inc/tx_port.h @@ -10,6 +10,7 @@ **************************************************************************/ // Some portions generated by Gemini (Gemini 2.0 Flash). +// Some portions generated by Copilot (Opus 5). /**************************************************************************/ @@ -378,7 +379,7 @@ unsigned int was_masked; /* Set PendSV to invoke ThreadX scheduler. */ *((volatile ULONG *) 0xE000ED04) = ((ULONG) 0x10000000); - __asm__ volatile ("dsb 0xF \n isb 0xF " : : : "memory"); + __asm__ volatile ("dsb sy \n isb sy " : : : "memory"); if (_get_ipsr() == 0) { was_masked = __disable_irq(); diff --git a/ports/cortex_m23/gnu/inc/tx_port.h b/ports/cortex_m23/gnu/inc/tx_port.h index dac6fbb80..a8ec7db2b 100644 --- a/ports/cortex_m23/gnu/inc/tx_port.h +++ b/ports/cortex_m23/gnu/inc/tx_port.h @@ -10,6 +10,7 @@ **************************************************************************/ // Some portions generated by Gemini (Gemini 2.0 Flash). +// Some portions generated by Copilot (Opus 5). /**************************************************************************/ @@ -391,13 +392,13 @@ unsigned int interrupt_save; /* Set PendSV to invoke ThreadX scheduler. */ *((volatile ULONG *) 0xE000ED04) = ((ULONG) 0x10000000); - __asm__ volatile ("dsb 0xF \n isb 0xF " : : : "memory"); + __asm__ volatile ("dsb sy \n isb sy " : : : "memory"); if (_get_ipsr() == 0) { interrupt_save = __get_primask_value(); __enable_interrupts(); __restore_interrupts(interrupt_save); - __asm__ volatile ("isb 0xF " : : : "memory"); + __asm__ volatile ("isb sy " : : : "memory"); } } diff --git a/ports/cortex_m23/iar/inc/tx_port.h b/ports/cortex_m23/iar/inc/tx_port.h index 38649ac3b..50887409e 100644 --- a/ports/cortex_m23/iar/inc/tx_port.h +++ b/ports/cortex_m23/iar/inc/tx_port.h @@ -9,6 +9,8 @@ * SPDX-License-Identifier: MIT **************************************************************************/ +// Some portions generated by Copilot (Opus 5). + /**************************************************************************/ /**************************************************************************/ @@ -399,7 +401,7 @@ __istate_t interrupt_save; /* Set PendSV to invoke ThreadX scheduler. */ *((volatile ULONG *) 0xE000ED04) = ((ULONG) 0x10000000); - __asm__ volatile ("dsb 0xF \n isb 0xF " : : : "memory"); + __asm__ volatile ("dsb sy \n isb sy " : : : "memory"); if (__get_IPSR() == 0) { interrupt_save = __get_interrupt_state(); diff --git a/ports/cortex_m3/ac5/inc/tx_port.h b/ports/cortex_m3/ac5/inc/tx_port.h index 62cae66d0..21f2543aa 100644 --- a/ports/cortex_m3/ac5/inc/tx_port.h +++ b/ports/cortex_m3/ac5/inc/tx_port.h @@ -12,6 +12,7 @@ // Some portions generated by Gemini (Gemini 2.0 Flash). // Some portions generated by Copilot (Claude Sonnet 4.6). // Some portions generated by Claude Code (Opus 5). +// Some portions generated by Copilot (Opus 5). /**************************************************************************/ @@ -583,7 +584,7 @@ unsigned int interrupt_save; /* Set PendSV to invoke ThreadX scheduler. */ *((volatile ULONG *) 0xE000ED04) = ((ULONG) 0x10000000); - __asm__ volatile ("dsb 0xF \n isb 0xF " : : : "memory"); + __asm__ volatile ("dsb sy \n isb sy " : : : "memory"); if (__get_ipsr_value() == 0) { interrupt_save = __get_interrupt_posture(); @@ -593,7 +594,7 @@ unsigned int interrupt_save; __enable_interrupts(); #endif __restore_interrupt(interrupt_save); - __asm__ volatile ("isb 0xF " : : : "memory"); + __asm__ volatile ("isb sy " : : : "memory"); } } diff --git a/ports/cortex_m3/ac6/inc/tx_port.h b/ports/cortex_m3/ac6/inc/tx_port.h index 7265724ef..29e23a471 100644 --- a/ports/cortex_m3/ac6/inc/tx_port.h +++ b/ports/cortex_m3/ac6/inc/tx_port.h @@ -12,6 +12,7 @@ // Some portions generated by Gemini (Gemini 2.0 Flash). // Some portions generated by Copilot (Claude Sonnet 4.6). // Some portions generated by Claude Code (Opus 5). +// Some portions generated by Copilot (Opus 5). /**************************************************************************/ @@ -583,7 +584,7 @@ unsigned int interrupt_save; /* Set PendSV to invoke ThreadX scheduler. */ *((volatile ULONG *) 0xE000ED04) = ((ULONG) 0x10000000); - __asm__ volatile ("dsb 0xF \n isb 0xF " : : : "memory"); + __asm__ volatile ("dsb sy \n isb sy " : : : "memory"); if (__get_ipsr_value() == 0) { interrupt_save = __get_interrupt_posture(); @@ -593,7 +594,7 @@ unsigned int interrupt_save; __enable_interrupts(); #endif __restore_interrupt(interrupt_save); - __asm__ volatile ("isb 0xF " : : : "memory"); + __asm__ volatile ("isb sy " : : : "memory"); } } diff --git a/ports/cortex_m3/gnu/inc/tx_port.h b/ports/cortex_m3/gnu/inc/tx_port.h index d5299cb38..1db71238a 100644 --- a/ports/cortex_m3/gnu/inc/tx_port.h +++ b/ports/cortex_m3/gnu/inc/tx_port.h @@ -12,6 +12,7 @@ // Some portions generated by Gemini (Gemini 2.0 Flash). // Some portions generated by Copilot (Claude Sonnet 4.6). // Some portions generated by Claude Code (Opus 5). +// Some portions generated by Copilot (Opus 5). /**************************************************************************/ @@ -583,7 +584,7 @@ unsigned int interrupt_save; /* Set PendSV to invoke ThreadX scheduler. */ *((volatile ULONG *) 0xE000ED04) = ((ULONG) 0x10000000); - __asm__ volatile ("dsb 0xF \n isb 0xF " : : : "memory"); + __asm__ volatile ("dsb sy \n isb sy " : : : "memory"); if (__get_ipsr_value() == 0) { interrupt_save = __get_interrupt_posture(); @@ -593,7 +594,7 @@ unsigned int interrupt_save; __enable_interrupts(); #endif __restore_interrupt(interrupt_save); - __asm__ volatile ("isb 0xF " : : : "memory"); + __asm__ volatile ("isb sy " : : : "memory"); } } diff --git a/ports/cortex_m3/iar/inc/tx_port.h b/ports/cortex_m3/iar/inc/tx_port.h index 5b05c277a..f14b730a1 100644 --- a/ports/cortex_m3/iar/inc/tx_port.h +++ b/ports/cortex_m3/iar/inc/tx_port.h @@ -12,6 +12,7 @@ // Some portions generated by Gemini (Gemini 2.0 Flash). // Some portions generated by Copilot (Claude Sonnet 4.6). // Some portions generated by Claude Code (Opus 5). +// Some portions generated by Copilot (Opus 5). /**************************************************************************/ @@ -583,7 +584,7 @@ unsigned int interrupt_save; /* Set PendSV to invoke ThreadX scheduler. */ *((volatile ULONG *) 0xE000ED04) = ((ULONG) 0x10000000); - __asm__ volatile ("dsb 0xF \n isb 0xF " : : : "memory"); + __asm__ volatile ("dsb sy \n isb sy " : : : "memory"); if (__get_ipsr_value() == 0) { interrupt_save = __get_interrupt_posture(); @@ -593,7 +594,7 @@ unsigned int interrupt_save; __enable_interrupts(); #endif __restore_interrupt(interrupt_save); - __asm__ volatile ("isb 0xF " : : : "memory"); + __asm__ volatile ("isb sy " : : : "memory"); } } diff --git a/ports/cortex_m3/keil/inc/tx_port.h b/ports/cortex_m3/keil/inc/tx_port.h index 0fc2ea65a..13745458d 100644 --- a/ports/cortex_m3/keil/inc/tx_port.h +++ b/ports/cortex_m3/keil/inc/tx_port.h @@ -12,6 +12,7 @@ // Some portions generated by Gemini (Gemini 2.0 Flash). // Some portions generated by Copilot (Claude Sonnet 4.6). // Some portions generated by Claude Code (Opus 5). +// Some portions generated by Copilot (Opus 5). /**************************************************************************/ @@ -583,7 +584,7 @@ unsigned int interrupt_save; /* Set PendSV to invoke ThreadX scheduler. */ *((volatile ULONG *) 0xE000ED04) = ((ULONG) 0x10000000); - __asm__ volatile ("dsb 0xF \n isb 0xF " : : : "memory"); + __asm__ volatile ("dsb sy \n isb sy " : : : "memory"); if (__get_ipsr_value() == 0) { interrupt_save = __get_interrupt_posture(); @@ -593,7 +594,7 @@ unsigned int interrupt_save; __enable_interrupts(); #endif __restore_interrupt(interrupt_save); - __asm__ volatile ("isb 0xF " : : : "memory"); + __asm__ volatile ("isb sy " : : : "memory"); } } diff --git a/ports/cortex_m33/ac6/inc/tx_port.h b/ports/cortex_m33/ac6/inc/tx_port.h index 86411a859..98f953e4b 100644 --- a/ports/cortex_m33/ac6/inc/tx_port.h +++ b/ports/cortex_m33/ac6/inc/tx_port.h @@ -11,6 +11,7 @@ // Some portions generated by Gemini (Gemini 2.0 Flash). // Some portions generated by Claude Code (Opus 5). +// Some portions generated by Copilot (Opus 5). /**************************************************************************/ @@ -583,7 +584,7 @@ UINT interrupt_save; /* Set PendSV to invoke ThreadX scheduler. */ *((volatile ULONG *) 0xE000ED04) = ((ULONG) 0x10000000); - __asm__ volatile ("dsb 0xF \n isb 0xF " : : : "memory"); + __asm__ volatile ("dsb sy \n isb sy " : : : "memory"); if (_tx_ipsr_get() == 0) { interrupt_save = __get_interrupt_posture(); @@ -593,7 +594,7 @@ UINT interrupt_save; __enable_interrupts(); #endif __restore_interrupt(interrupt_save); - __asm__ volatile ("isb 0xF " : : : "memory"); + __asm__ volatile ("isb sy " : : : "memory"); } } diff --git a/ports/cortex_m33/gnu/inc/tx_port.h b/ports/cortex_m33/gnu/inc/tx_port.h index dc67c0015..828058ea9 100644 --- a/ports/cortex_m33/gnu/inc/tx_port.h +++ b/ports/cortex_m33/gnu/inc/tx_port.h @@ -11,6 +11,7 @@ // Some portions generated by Gemini (Gemini 2.0 Flash). // Some portions generated by Claude Code (Opus 5). +// Some portions generated by Copilot (Opus 5). /**************************************************************************/ @@ -583,7 +584,7 @@ UINT interrupt_save; /* Set PendSV to invoke ThreadX scheduler. */ *((volatile ULONG *) 0xE000ED04) = ((ULONG) 0x10000000); - __asm__ volatile ("dsb 0xF \n isb 0xF " : : : "memory"); + __asm__ volatile ("dsb sy \n isb sy " : : : "memory"); if (_tx_ipsr_get() == 0) { interrupt_save = __get_interrupt_posture(); @@ -593,7 +594,7 @@ UINT interrupt_save; __enable_interrupts(); #endif __restore_interrupt(interrupt_save); - __asm__ volatile ("isb 0xF " : : : "memory"); + __asm__ volatile ("isb sy " : : : "memory"); } } diff --git a/ports/cortex_m33/iar/inc/tx_port.h b/ports/cortex_m33/iar/inc/tx_port.h index 6527b34a1..1203e4019 100644 --- a/ports/cortex_m33/iar/inc/tx_port.h +++ b/ports/cortex_m33/iar/inc/tx_port.h @@ -11,6 +11,7 @@ // Some portions generated by Gemini (Gemini 2.0 Flash). // Some portions generated by Claude Code (Opus 5). +// Some portions generated by Copilot (Opus 5). /**************************************************************************/ @@ -583,7 +584,7 @@ UINT interrupt_save; /* Set PendSV to invoke ThreadX scheduler. */ *((volatile ULONG *) 0xE000ED04) = ((ULONG) 0x10000000); - __asm__ volatile ("dsb 0xF \n isb 0xF " : : : "memory"); + __asm__ volatile ("dsb sy \n isb sy " : : : "memory"); if (_tx_ipsr_get() == 0) { interrupt_save = __get_interrupt_posture(); @@ -593,7 +594,7 @@ UINT interrupt_save; __enable_interrupts(); #endif __restore_interrupt(interrupt_save); - __asm__ volatile ("isb 0xF " : : : "memory"); + __asm__ volatile ("isb sy " : : : "memory"); } } diff --git a/ports/cortex_m4/ac5/inc/tx_port.h b/ports/cortex_m4/ac5/inc/tx_port.h index ea89ed1aa..2b6361d4f 100644 --- a/ports/cortex_m4/ac5/inc/tx_port.h +++ b/ports/cortex_m4/ac5/inc/tx_port.h @@ -12,6 +12,7 @@ // Some portions generated by Gemini (Gemini 2.0 Flash). // Some portions generated by Copilot (Claude Sonnet 4.6). // Some portions generated by Claude Code (Opus 5). +// Some portions generated by Copilot (Opus 5). /**************************************************************************/ @@ -583,7 +584,7 @@ unsigned int interrupt_save; /* Set PendSV to invoke ThreadX scheduler. */ *((volatile ULONG *) 0xE000ED04) = ((ULONG) 0x10000000); - __asm__ volatile ("dsb 0xF \n isb 0xF " : : : "memory"); + __asm__ volatile ("dsb sy \n isb sy " : : : "memory"); if (__get_ipsr_value() == 0) { interrupt_save = __get_interrupt_posture(); @@ -593,7 +594,7 @@ unsigned int interrupt_save; __enable_interrupts(); #endif __restore_interrupt(interrupt_save); - __asm__ volatile ("isb 0xF " : : : "memory"); + __asm__ volatile ("isb sy " : : : "memory"); } } diff --git a/ports/cortex_m4/ac6/inc/tx_port.h b/ports/cortex_m4/ac6/inc/tx_port.h index 3946fec21..1db55ef54 100644 --- a/ports/cortex_m4/ac6/inc/tx_port.h +++ b/ports/cortex_m4/ac6/inc/tx_port.h @@ -12,6 +12,7 @@ // Some portions generated by Gemini (Gemini 2.0 Flash). // Some portions generated by Copilot (Claude Sonnet 4.6). // Some portions generated by Claude Code (Opus 5). +// Some portions generated by Copilot (Opus 5). /**************************************************************************/ @@ -583,7 +584,7 @@ unsigned int interrupt_save; /* Set PendSV to invoke ThreadX scheduler. */ *((volatile ULONG *) 0xE000ED04) = ((ULONG) 0x10000000); - __asm__ volatile ("dsb 0xF \n isb 0xF " : : : "memory"); + __asm__ volatile ("dsb sy \n isb sy " : : : "memory"); if (__get_ipsr_value() == 0) { interrupt_save = __get_interrupt_posture(); @@ -593,7 +594,7 @@ unsigned int interrupt_save; __enable_interrupts(); #endif __restore_interrupt(interrupt_save); - __asm__ volatile ("isb 0xF " : : : "memory"); + __asm__ volatile ("isb sy " : : : "memory"); } } diff --git a/ports/cortex_m4/gnu/inc/tx_port.h b/ports/cortex_m4/gnu/inc/tx_port.h index 98d81669f..fe240f62b 100644 --- a/ports/cortex_m4/gnu/inc/tx_port.h +++ b/ports/cortex_m4/gnu/inc/tx_port.h @@ -12,6 +12,7 @@ // Some portions generated by Gemini (Gemini 2.0 Flash). // Some portions generated by Copilot (Claude Sonnet 4.6). // Some portions generated by Claude Code (Opus 5). +// Some portions generated by Copilot (Opus 5). /**************************************************************************/ @@ -583,7 +584,7 @@ unsigned int interrupt_save; /* Set PendSV to invoke ThreadX scheduler. */ *((volatile ULONG *) 0xE000ED04) = ((ULONG) 0x10000000); - __asm__ volatile ("dsb 0xF \n isb 0xF " : : : "memory"); + __asm__ volatile ("dsb sy \n isb sy " : : : "memory"); if (__get_ipsr_value() == 0) { interrupt_save = __get_interrupt_posture(); @@ -593,7 +594,7 @@ unsigned int interrupt_save; __enable_interrupts(); #endif __restore_interrupt(interrupt_save); - __asm__ volatile ("isb 0xF " : : : "memory"); + __asm__ volatile ("isb sy " : : : "memory"); } } diff --git a/ports/cortex_m4/iar/inc/tx_port.h b/ports/cortex_m4/iar/inc/tx_port.h index 8acba9076..1ca170081 100644 --- a/ports/cortex_m4/iar/inc/tx_port.h +++ b/ports/cortex_m4/iar/inc/tx_port.h @@ -12,6 +12,7 @@ // Some portions generated by Gemini (Gemini 2.0 Flash). // Some portions generated by Copilot (Claude Sonnet 4.6). // Some portions generated by Claude Code (Opus 5). +// Some portions generated by Copilot (Opus 5). /**************************************************************************/ @@ -583,7 +584,7 @@ unsigned int interrupt_save; /* Set PendSV to invoke ThreadX scheduler. */ *((volatile ULONG *) 0xE000ED04) = ((ULONG) 0x10000000); - __asm__ volatile ("dsb 0xF \n isb 0xF " : : : "memory"); + __asm__ volatile ("dsb sy \n isb sy " : : : "memory"); if (__get_ipsr_value() == 0) { interrupt_save = __get_interrupt_posture(); @@ -593,7 +594,7 @@ unsigned int interrupt_save; __enable_interrupts(); #endif __restore_interrupt(interrupt_save); - __asm__ volatile ("isb 0xF " : : : "memory"); + __asm__ volatile ("isb sy " : : : "memory"); } } diff --git a/ports/cortex_m4/keil/inc/tx_port.h b/ports/cortex_m4/keil/inc/tx_port.h index 415d5f507..f54822ff0 100644 --- a/ports/cortex_m4/keil/inc/tx_port.h +++ b/ports/cortex_m4/keil/inc/tx_port.h @@ -12,6 +12,7 @@ // Some portions generated by Gemini (Gemini 2.0 Flash). // Some portions generated by Copilot (Claude Sonnet 4.6). // Some portions generated by Claude Code (Opus 5). +// Some portions generated by Copilot (Opus 5). /**************************************************************************/ @@ -583,7 +584,7 @@ unsigned int interrupt_save; /* Set PendSV to invoke ThreadX scheduler. */ *((volatile ULONG *) 0xE000ED04) = ((ULONG) 0x10000000); - __asm__ volatile ("dsb 0xF \n isb 0xF " : : : "memory"); + __asm__ volatile ("dsb sy \n isb sy " : : : "memory"); if (__get_ipsr_value() == 0) { interrupt_save = __get_interrupt_posture(); @@ -593,7 +594,7 @@ unsigned int interrupt_save; __enable_interrupts(); #endif __restore_interrupt(interrupt_save); - __asm__ volatile ("isb 0xF " : : : "memory"); + __asm__ volatile ("isb sy " : : : "memory"); } } diff --git a/ports/cortex_m52/ac6/inc/tx_port.h b/ports/cortex_m52/ac6/inc/tx_port.h index 18f28f0d9..db3284347 100644 --- a/ports/cortex_m52/ac6/inc/tx_port.h +++ b/ports/cortex_m52/ac6/inc/tx_port.h @@ -11,6 +11,7 @@ // Some portions generated by Gemini (Gemini 2.0 Flash). // Some portions generated by Claude Code (Opus 5). +// Some portions generated by Copilot (Opus 5). /**************************************************************************/ @@ -583,7 +584,7 @@ UINT interrupt_save; /* Set PendSV to invoke ThreadX scheduler. */ *((volatile ULONG *) 0xE000ED04) = ((ULONG) 0x10000000); - __asm__ volatile ("dsb 0xF \n isb 0xF " : : : "memory"); + __asm__ volatile ("dsb sy \n isb sy " : : : "memory"); if (_tx_ipsr_get() == 0) { interrupt_save = __get_interrupt_posture(); @@ -593,7 +594,7 @@ UINT interrupt_save; __enable_interrupts(); #endif __restore_interrupt(interrupt_save); - __asm__ volatile ("isb 0xF " : : : "memory"); + __asm__ volatile ("isb sy " : : : "memory"); } } diff --git a/ports/cortex_m52/gnu/inc/tx_port.h b/ports/cortex_m52/gnu/inc/tx_port.h index bdba07b2d..ca101c68d 100644 --- a/ports/cortex_m52/gnu/inc/tx_port.h +++ b/ports/cortex_m52/gnu/inc/tx_port.h @@ -11,6 +11,7 @@ // Some portions generated by Gemini (Gemini 2.0 Flash). // Some portions generated by Claude Code (Opus 5). +// Some portions generated by Copilot (Opus 5). /**************************************************************************/ @@ -583,7 +584,7 @@ UINT interrupt_save; /* Set PendSV to invoke ThreadX scheduler. */ *((volatile ULONG *) 0xE000ED04) = ((ULONG) 0x10000000); - __asm__ volatile ("dsb 0xF \n isb 0xF " : : : "memory"); + __asm__ volatile ("dsb sy \n isb sy " : : : "memory"); if (_tx_ipsr_get() == 0) { interrupt_save = __get_interrupt_posture(); @@ -593,7 +594,7 @@ UINT interrupt_save; __enable_interrupts(); #endif __restore_interrupt(interrupt_save); - __asm__ volatile ("isb 0xF " : : : "memory"); + __asm__ volatile ("isb sy " : : : "memory"); } } diff --git a/ports/cortex_m52/iar/inc/tx_port.h b/ports/cortex_m52/iar/inc/tx_port.h index 6a3b23a6e..493b54c16 100644 --- a/ports/cortex_m52/iar/inc/tx_port.h +++ b/ports/cortex_m52/iar/inc/tx_port.h @@ -11,6 +11,7 @@ // Some portions generated by Gemini (Gemini 2.0 Flash). // Some portions generated by Claude Code (Opus 5). +// Some portions generated by Copilot (Opus 5). /**************************************************************************/ @@ -583,7 +584,7 @@ UINT interrupt_save; /* Set PendSV to invoke ThreadX scheduler. */ *((volatile ULONG *) 0xE000ED04) = ((ULONG) 0x10000000); - __asm__ volatile ("dsb 0xF \n isb 0xF " : : : "memory"); + __asm__ volatile ("dsb sy \n isb sy " : : : "memory"); if (_tx_ipsr_get() == 0) { interrupt_save = __get_interrupt_posture(); @@ -593,7 +594,7 @@ UINT interrupt_save; __enable_interrupts(); #endif __restore_interrupt(interrupt_save); - __asm__ volatile ("isb 0xF " : : : "memory"); + __asm__ volatile ("isb sy " : : : "memory"); } } diff --git a/ports/cortex_m55/ac6/inc/tx_port.h b/ports/cortex_m55/ac6/inc/tx_port.h index f3cbba3a1..63a49e126 100644 --- a/ports/cortex_m55/ac6/inc/tx_port.h +++ b/ports/cortex_m55/ac6/inc/tx_port.h @@ -11,6 +11,7 @@ // Some portions generated by Gemini (Gemini 2.0 Flash). // Some portions generated by Claude Code (Opus 5). +// Some portions generated by Copilot (Opus 5). /**************************************************************************/ @@ -583,7 +584,7 @@ UINT interrupt_save; /* Set PendSV to invoke ThreadX scheduler. */ *((volatile ULONG *) 0xE000ED04) = ((ULONG) 0x10000000); - __asm__ volatile ("dsb 0xF \n isb 0xF " : : : "memory"); + __asm__ volatile ("dsb sy \n isb sy " : : : "memory"); if (_tx_ipsr_get() == 0) { interrupt_save = __get_interrupt_posture(); @@ -593,7 +594,7 @@ UINT interrupt_save; __enable_interrupts(); #endif __restore_interrupt(interrupt_save); - __asm__ volatile ("isb 0xF " : : : "memory"); + __asm__ volatile ("isb sy " : : : "memory"); } } diff --git a/ports/cortex_m55/gnu/inc/tx_port.h b/ports/cortex_m55/gnu/inc/tx_port.h index 3f91c12d4..eb7176f57 100644 --- a/ports/cortex_m55/gnu/inc/tx_port.h +++ b/ports/cortex_m55/gnu/inc/tx_port.h @@ -11,6 +11,7 @@ // Some portions generated by Gemini (Gemini 2.0 Flash). // Some portions generated by Claude Code (Opus 5). +// Some portions generated by Copilot (Opus 5). /**************************************************************************/ @@ -583,7 +584,7 @@ UINT interrupt_save; /* Set PendSV to invoke ThreadX scheduler. */ *((volatile ULONG *) 0xE000ED04) = ((ULONG) 0x10000000); - __asm__ volatile ("dsb 0xF \n isb 0xF " : : : "memory"); + __asm__ volatile ("dsb sy \n isb sy " : : : "memory"); if (_tx_ipsr_get() == 0) { interrupt_save = __get_interrupt_posture(); @@ -593,7 +594,7 @@ UINT interrupt_save; __enable_interrupts(); #endif __restore_interrupt(interrupt_save); - __asm__ volatile ("isb 0xF " : : : "memory"); + __asm__ volatile ("isb sy " : : : "memory"); } } diff --git a/ports/cortex_m55/iar/inc/tx_port.h b/ports/cortex_m55/iar/inc/tx_port.h index 3ff916b30..8f7105065 100644 --- a/ports/cortex_m55/iar/inc/tx_port.h +++ b/ports/cortex_m55/iar/inc/tx_port.h @@ -11,6 +11,7 @@ // Some portions generated by Gemini (Gemini 2.0 Flash). // Some portions generated by Claude Code (Opus 5). +// Some portions generated by Copilot (Opus 5). /**************************************************************************/ @@ -583,7 +584,7 @@ UINT interrupt_save; /* Set PendSV to invoke ThreadX scheduler. */ *((volatile ULONG *) 0xE000ED04) = ((ULONG) 0x10000000); - __asm__ volatile ("dsb 0xF \n isb 0xF " : : : "memory"); + __asm__ volatile ("dsb sy \n isb sy " : : : "memory"); if (_tx_ipsr_get() == 0) { interrupt_save = __get_interrupt_posture(); @@ -593,7 +594,7 @@ UINT interrupt_save; __enable_interrupts(); #endif __restore_interrupt(interrupt_save); - __asm__ volatile ("isb 0xF " : : : "memory"); + __asm__ volatile ("isb sy " : : : "memory"); } } diff --git a/ports/cortex_m7/ac5/inc/tx_port.h b/ports/cortex_m7/ac5/inc/tx_port.h index 8f84e7fe7..320f23d8f 100644 --- a/ports/cortex_m7/ac5/inc/tx_port.h +++ b/ports/cortex_m7/ac5/inc/tx_port.h @@ -12,6 +12,7 @@ // Some portions generated by Gemini (Gemini 2.0 Flash). // Some portions generated by Copilot (Claude Sonnet 4.6). // Some portions generated by Claude Code (Opus 5). +// Some portions generated by Copilot (Opus 5). /**************************************************************************/ @@ -583,7 +584,7 @@ unsigned int interrupt_save; /* Set PendSV to invoke ThreadX scheduler. */ *((volatile ULONG *) 0xE000ED04) = ((ULONG) 0x10000000); - __asm__ volatile ("dsb 0xF \n isb 0xF " : : : "memory"); + __asm__ volatile ("dsb sy \n isb sy " : : : "memory"); if (__get_ipsr_value() == 0) { interrupt_save = __get_interrupt_posture(); @@ -593,7 +594,7 @@ unsigned int interrupt_save; __enable_interrupts(); #endif __restore_interrupt(interrupt_save); - __asm__ volatile ("isb 0xF " : : : "memory"); + __asm__ volatile ("isb sy " : : : "memory"); } } diff --git a/ports/cortex_m7/ac6/inc/tx_port.h b/ports/cortex_m7/ac6/inc/tx_port.h index bf2276eb0..8a4981deb 100644 --- a/ports/cortex_m7/ac6/inc/tx_port.h +++ b/ports/cortex_m7/ac6/inc/tx_port.h @@ -12,6 +12,7 @@ // Some portions generated by Gemini (Gemini 2.0 Flash). // Some portions generated by Copilot (Claude Sonnet 4.6). // Some portions generated by Claude Code (Opus 5). +// Some portions generated by Copilot (Opus 5). /**************************************************************************/ @@ -583,7 +584,7 @@ unsigned int interrupt_save; /* Set PendSV to invoke ThreadX scheduler. */ *((volatile ULONG *) 0xE000ED04) = ((ULONG) 0x10000000); - __asm__ volatile ("dsb 0xF \n isb 0xF " : : : "memory"); + __asm__ volatile ("dsb sy \n isb sy " : : : "memory"); if (__get_ipsr_value() == 0) { interrupt_save = __get_interrupt_posture(); @@ -593,7 +594,7 @@ unsigned int interrupt_save; __enable_interrupts(); #endif __restore_interrupt(interrupt_save); - __asm__ volatile ("isb 0xF " : : : "memory"); + __asm__ volatile ("isb sy " : : : "memory"); } } diff --git a/ports/cortex_m7/gnu/inc/tx_port.h b/ports/cortex_m7/gnu/inc/tx_port.h index b01873cf1..c47b27fd0 100644 --- a/ports/cortex_m7/gnu/inc/tx_port.h +++ b/ports/cortex_m7/gnu/inc/tx_port.h @@ -12,6 +12,7 @@ // Some portions generated by Gemini (Gemini 2.0 Flash). // Some portions generated by Copilot (Claude Sonnet 4.6). // Some portions generated by Claude Code (Opus 5). +// Some portions generated by Copilot (Opus 5). /**************************************************************************/ @@ -583,7 +584,7 @@ unsigned int interrupt_save; /* Set PendSV to invoke ThreadX scheduler. */ *((volatile ULONG *) 0xE000ED04) = ((ULONG) 0x10000000); - __asm__ volatile ("dsb 0xF \n isb 0xF " : : : "memory"); + __asm__ volatile ("dsb sy \n isb sy " : : : "memory"); if (__get_ipsr_value() == 0) { interrupt_save = __get_interrupt_posture(); @@ -593,7 +594,7 @@ unsigned int interrupt_save; __enable_interrupts(); #endif __restore_interrupt(interrupt_save); - __asm__ volatile ("isb 0xF " : : : "memory"); + __asm__ volatile ("isb sy " : : : "memory"); } } diff --git a/ports/cortex_m7/iar/inc/tx_port.h b/ports/cortex_m7/iar/inc/tx_port.h index a9ebe3c88..bd0c8507f 100644 --- a/ports/cortex_m7/iar/inc/tx_port.h +++ b/ports/cortex_m7/iar/inc/tx_port.h @@ -12,6 +12,7 @@ // Some portions generated by Gemini (Gemini 2.0 Flash). // Some portions generated by Copilot (Claude Sonnet 4.6). // Some portions generated by Claude Code (Opus 5). +// Some portions generated by Copilot (Opus 5). /**************************************************************************/ @@ -583,7 +584,7 @@ unsigned int interrupt_save; /* Set PendSV to invoke ThreadX scheduler. */ *((volatile ULONG *) 0xE000ED04) = ((ULONG) 0x10000000); - __asm__ volatile ("dsb 0xF \n isb 0xF " : : : "memory"); + __asm__ volatile ("dsb sy \n isb sy " : : : "memory"); if (__get_ipsr_value() == 0) { interrupt_save = __get_interrupt_posture(); @@ -593,7 +594,7 @@ unsigned int interrupt_save; __enable_interrupts(); #endif __restore_interrupt(interrupt_save); - __asm__ volatile ("isb 0xF " : : : "memory"); + __asm__ volatile ("isb sy " : : : "memory"); } } diff --git a/ports/cortex_m85/ac6/inc/tx_port.h b/ports/cortex_m85/ac6/inc/tx_port.h index 38def972b..bc9dff5d5 100644 --- a/ports/cortex_m85/ac6/inc/tx_port.h +++ b/ports/cortex_m85/ac6/inc/tx_port.h @@ -11,6 +11,7 @@ // Some portions generated by Gemini (Gemini 2.0 Flash). // Some portions generated by Claude Code (Opus 5). +// Some portions generated by Copilot (Opus 5). /**************************************************************************/ @@ -583,7 +584,7 @@ UINT interrupt_save; /* Set PendSV to invoke ThreadX scheduler. */ *((volatile ULONG *) 0xE000ED04) = ((ULONG) 0x10000000); - __asm__ volatile ("dsb 0xF \n isb 0xF " : : : "memory"); + __asm__ volatile ("dsb sy \n isb sy " : : : "memory"); if (_tx_ipsr_get() == 0) { interrupt_save = __get_interrupt_posture(); @@ -593,7 +594,7 @@ UINT interrupt_save; __enable_interrupts(); #endif __restore_interrupt(interrupt_save); - __asm__ volatile ("isb 0xF " : : : "memory"); + __asm__ volatile ("isb sy " : : : "memory"); } } diff --git a/ports/cortex_m85/gnu/inc/tx_port.h b/ports/cortex_m85/gnu/inc/tx_port.h index 1f1702dfa..9a02f9405 100644 --- a/ports/cortex_m85/gnu/inc/tx_port.h +++ b/ports/cortex_m85/gnu/inc/tx_port.h @@ -11,6 +11,7 @@ // Some portions generated by Gemini (Gemini 2.0 Flash). // Some portions generated by Claude Code (Opus 5). +// Some portions generated by Copilot (Opus 5). /**************************************************************************/ @@ -583,7 +584,7 @@ UINT interrupt_save; /* Set PendSV to invoke ThreadX scheduler. */ *((volatile ULONG *) 0xE000ED04) = ((ULONG) 0x10000000); - __asm__ volatile ("dsb 0xF \n isb 0xF " : : : "memory"); + __asm__ volatile ("dsb sy \n isb sy " : : : "memory"); if (_tx_ipsr_get() == 0) { interrupt_save = __get_interrupt_posture(); @@ -593,7 +594,7 @@ UINT interrupt_save; __enable_interrupts(); #endif __restore_interrupt(interrupt_save); - __asm__ volatile ("isb 0xF " : : : "memory"); + __asm__ volatile ("isb sy " : : : "memory"); } } diff --git a/ports/cortex_m85/iar/inc/tx_port.h b/ports/cortex_m85/iar/inc/tx_port.h index 26ab0c756..1f8741cdc 100644 --- a/ports/cortex_m85/iar/inc/tx_port.h +++ b/ports/cortex_m85/iar/inc/tx_port.h @@ -11,6 +11,7 @@ // Some portions generated by Gemini (Gemini 2.0 Flash). // Some portions generated by Claude Code (Opus 5). +// Some portions generated by Copilot (Opus 5). /**************************************************************************/ @@ -583,7 +584,7 @@ UINT interrupt_save; /* Set PendSV to invoke ThreadX scheduler. */ *((volatile ULONG *) 0xE000ED04) = ((ULONG) 0x10000000); - __asm__ volatile ("dsb 0xF \n isb 0xF " : : : "memory"); + __asm__ volatile ("dsb sy \n isb sy " : : : "memory"); if (_tx_ipsr_get() == 0) { interrupt_save = __get_interrupt_posture(); @@ -593,7 +594,7 @@ UINT interrupt_save; __enable_interrupts(); #endif __restore_interrupt(interrupt_save); - __asm__ volatile ("isb 0xF " : : : "memory"); + __asm__ volatile ("isb sy " : : : "memory"); } } diff --git a/ports_arch/ARMv7-M/threadx/inc/tx_port.h b/ports_arch/ARMv7-M/threadx/inc/tx_port.h index b988675f1..1b1471397 100644 --- a/ports_arch/ARMv7-M/threadx/inc/tx_port.h +++ b/ports_arch/ARMv7-M/threadx/inc/tx_port.h @@ -12,6 +12,7 @@ // Some portions generated by Gemini (Gemini 2.0 Flash). // Some portions generated by Copilot (Claude Sonnet 4.6). // Some portions generated by Claude Code (Opus 5). +// Some portions generated by Copilot (Opus 5). /**************************************************************************/ @@ -583,7 +584,7 @@ unsigned int interrupt_save; /* Set PendSV to invoke ThreadX scheduler. */ *((volatile ULONG *) 0xE000ED04) = ((ULONG) 0x10000000); - __asm__ volatile ("dsb 0xF \n isb 0xF " : : : "memory"); + __asm__ volatile ("dsb sy \n isb sy " : : : "memory"); if (__get_ipsr_value() == 0) { interrupt_save = __get_interrupt_posture(); @@ -593,7 +594,7 @@ unsigned int interrupt_save; __enable_interrupts(); #endif __restore_interrupt(interrupt_save); - __asm__ volatile ("isb 0xF " : : : "memory"); + __asm__ volatile ("isb sy " : : : "memory"); } } diff --git a/ports_arch/ARMv8-M/threadx/inc/tx_port.h b/ports_arch/ARMv8-M/threadx/inc/tx_port.h index 1f088d412..cabf1c203 100644 --- a/ports_arch/ARMv8-M/threadx/inc/tx_port.h +++ b/ports_arch/ARMv8-M/threadx/inc/tx_port.h @@ -11,6 +11,7 @@ // Some portions generated by Gemini (Gemini 2.0 Flash). // Some portions generated by Claude Code (Opus 5). +// Some portions generated by Copilot (Opus 5). /**************************************************************************/ @@ -583,7 +584,7 @@ UINT interrupt_save; /* Set PendSV to invoke ThreadX scheduler. */ *((volatile ULONG *) 0xE000ED04) = ((ULONG) 0x10000000); - __asm__ volatile ("dsb 0xF \n isb 0xF " : : : "memory"); + __asm__ volatile ("dsb sy \n isb sy " : : : "memory"); if (_tx_ipsr_get() == 0) { interrupt_save = __get_interrupt_posture(); @@ -593,7 +594,7 @@ UINT interrupt_save; __enable_interrupts(); #endif __restore_interrupt(interrupt_save); - __asm__ volatile ("isb 0xF " : : : "memory"); + __asm__ volatile ("isb sy " : : : "memory"); } } diff --git a/scripts/check_ports.sh b/scripts/check_ports.sh index 1ba13ca03..19b350cae 100755 --- a/scripts/check_ports.sh +++ b/scripts/check_ports.sh @@ -261,7 +261,7 @@ say "== Families with no copy script (report only) ==" if [ "$quiet" -eq 0 ]; then for family in ports/cortex_m0 ports/cortex_m0+ ports/cortex_m23; do [ -d "$family" ] || continue - for probe in "dsb 0xF" "isb 0xF"; do + for probe in "dsb sy" "isb sy"; do have=""; missing="" for header in "$family"/*/inc/tx_port.h; do [ -f "$header" ] || continue