@@ -192,7 +192,7 @@ impl PciDevice {
192192
193193 //0x24 offset is last bar
194194 while current_bar_offset <= 0x24 {
195- #[ allow( clippy:: blacklisted_name ) ]
195+ #[ allow( clippy:: disallowed_names ) ]
196196 let bar = self . read_u32 ( current_bar_offset) ;
197197
198198 // lsb is 1 for I/O space bars
@@ -211,7 +211,7 @@ impl PciDevice {
211211 self . bars [ current_bar] . address = u64:: from ( bar & 0xffff_fff0 ) ;
212212 current_bar_offset += 4 ;
213213
214- #[ allow( clippy:: blacklisted_name ) ]
214+ #[ allow( clippy:: disallowed_names ) ]
215215 let bar = self . read_u32 ( current_bar_offset) ;
216216 self . bars [ current_bar] . address += u64:: from ( bar) << 32 ;
217217 }
@@ -223,7 +223,7 @@ impl PciDevice {
223223 current_bar_offset += 4 ;
224224 }
225225
226- #[ allow( clippy:: blacklisted_name ) ]
226+ #[ allow( clippy:: disallowed_names ) ]
227227 for bar in & self . bars {
228228 log ! ( "Bar: type={:?} address={:x}" , bar. bar_type, bar. address) ;
229229 }
@@ -308,7 +308,7 @@ impl VirtioTransport for VirtioPciTransport {
308308 // le32 length; /* Length of the structure, in bytes. */
309309 // };
310310 let cfg_type = self . device . read_u8 ( cap_next + 3 ) ;
311- #[ allow( clippy:: blacklisted_name ) ]
311+ #[ allow( clippy:: disallowed_names ) ]
312312 let bar = self . device . read_u8 ( cap_next + 4 ) ;
313313 let offset = self . device . read_u32 ( cap_next + 8 ) ;
314314 let length = self . device . read_u32 ( cap_next + 12 ) ;
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